sys/arch/mips/sibyte/include/sb1250_uart.h

   1 /*  *********************************************************************
   2     *  SB1250 Board Support Package
   3     *
   4     *  UART Constants                           File: sb1250_uart.h
   5     *
   6     *  This module contains constants and macros useful for
   7     *  manipulating the SB1250's UARTs
   8     *
   9     *  SB1250 specification level:  User's manual 1/02/02
  10     *
  11     *********************************************************************
  12     *
  13     *  Copyright 2000,2001,2002,2003,2004
  14     *  Broadcom Corporation. All rights reserved.
  15     *
  16     *  This software is furnished under license and may be used and
  17     *  copied only in accordance with the following terms and
  18     *  conditions.  Subject to these conditions, you may download,
  19     *  copy, install, use, modify and distribute modified or unmodified
  20     *  copies of this software in source and/or binary form.  No title
  21     *  or ownership is transferred hereby.
  22     *
  23     *  1) Any source code used, modified or distributed must reproduce
  24     *     and retain this copyright notice and list of conditions
  25     *     as they appear in the source file.
  26     *
  27     *  2) No right is granted to use any trade name, trademark, or
  28     *     logo of Broadcom Corporation.  The "Broadcom Corporation"
  29     *     name may not be used to endorse or promote products derived
  30     *     from this software without the prior written permission of
  31     *     Broadcom Corporation.
  32     *
  33     *  3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR
  34     *     IMPLIED WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED
  35     *     WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
  36     *     PURPOSE, OR NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT
  37     *     SHALL BROADCOM BE LIABLE FOR ANY DAMAGES WHATSOEVER, AND IN
  38     *     PARTICULAR, BROADCOM SHALL NOT BE LIABLE FOR DIRECT, INDIRECT,
  39     *     INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  40     *     (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
  41     *     GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
  42     *     BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
  43     *     OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
  44     *     TORT (INCLUDING NEGLIGENCE OR OTHERWISE), EVEN IF ADVISED OF
  45     *     THE POSSIBILITY OF SUCH DAMAGE.
  46     ********************************************************************* */
  47
  48
  49 #ifndef _SB1250_UART_H
  50 #define _SB1250_UART_H
  51
  52 #include "sb1250_defs.h"
  53
  54 /* **********************************************************************
  55    * DUART Registers
  56    ********************************************************************** */
  57
  58 /*
  59  * DUART Mode Register #1 (Table 10-3)
  60  * Register: DUART_MODE_REG_1_A
  61  * Register: DUART_MODE_REG_1_B
  62  */
  63
  64 #define S_DUART_BITS_PER_CHAR       0
  65 #define M_DUART_BITS_PER_CHAR       _SB_MAKEMASK(2,S_DUART_BITS_PER_CHAR)
  66 #define V_DUART_BITS_PER_CHAR(x)    _SB_MAKEVALUE(x,S_DUART_BITS_PER_CHAR)
  67
  68 #define K_DUART_BITS_PER_CHAR_RSV0  0
  69 #define K_DUART_BITS_PER_CHAR_RSV1  1
  70 #define K_DUART_BITS_PER_CHAR_7     2
  71 #define K_DUART_BITS_PER_CHAR_8     3
  72
  73 #define V_DUART_BITS_PER_CHAR_RSV0  V_DUART_BITS_PER_CHAR(K_DUART_BITS_PER_CHAR_RSV0)
  74 #define V_DUART_BITS_PER_CHAR_RSV1  V_DUART_BITS_PER_CHAR(K_DUART_BITS_PER_CHAR_RSV1)
  75 #define V_DUART_BITS_PER_CHAR_7     V_DUART_BITS_PER_CHAR(K_DUART_BITS_PER_CHAR_7)
  76 #define V_DUART_BITS_PER_CHAR_8     V_DUART_BITS_PER_CHAR(K_DUART_BITS_PER_CHAR_8)
  77
  78
  79 #define M_DUART_PARITY_TYPE_EVEN    0x00
  80 #define M_DUART_PARITY_TYPE_ODD     _SB_MAKEMASK1(2)
  81
  82 #define S_DUART_PARITY_MODE          3
  83 #define M_DUART_PARITY_MODE         _SB_MAKEMASK(2,S_DUART_PARITY_MODE)
  84 #define V_DUART_PARITY_MODE(x)      _SB_MAKEVALUE(x,S_DUART_PARITY_MODE)
  85
  86 #define K_DUART_PARITY_MODE_ADD       0
  87 #define K_DUART_PARITY_MODE_ADD_FIXED 1
  88 #define K_DUART_PARITY_MODE_NONE      2
  89
  90 #define V_DUART_PARITY_MODE_ADD       V_DUART_PARITY_MODE(K_DUART_PARITY_MODE_ADD)
  91 #define V_DUART_PARITY_MODE_ADD_FIXED V_DUART_PARITY_MODE(K_DUART_PARITY_MODE_ADD_FIXED)
  92 #define V_DUART_PARITY_MODE_NONE      V_DUART_PARITY_MODE(K_DUART_PARITY_MODE_NONE)
  93
  94 #define M_DUART_ERR_MODE            _SB_MAKEMASK1(5)    /* must be zero */
  95
  96 #define M_DUART_RX_IRQ_SEL_RXRDY    0
  97 #define M_DUART_RX_IRQ_SEL_RXFULL   _SB_MAKEMASK1(6)
  98
  99 #define M_DUART_RX_RTS_ENA          _SB_MAKEMASK1(7)
 100
 101 /*
 102  * DUART Mode Register #2 (Table 10-4)
 103  * Register: DUART_MODE_REG_2_A
 104  * Register: DUART_MODE_REG_2_B
 105  */
 106
 107 #define M_DUART_MODE_RESERVED1      _SB_MAKEMASK(3,0)   /* ignored */
 108
 109 #define M_DUART_STOP_BIT_LEN_2      _SB_MAKEMASK1(3)
 110 #define M_DUART_STOP_BIT_LEN_1      0
 111
 112 #define M_DUART_TX_CTS_ENA          _SB_MAKEMASK1(4)
 113
 114
 115 #define M_DUART_MODE_RESERVED2      _SB_MAKEMASK1(5)    /* must be zero */
 116
 117 #define S_DUART_CHAN_MODE           6
 118 #define M_DUART_CHAN_MODE           _SB_MAKEMASK(2,S_DUART_CHAN_MODE)
 119 #define V_DUART_CHAN_MODE(x)        _SB_MAKEVALUE(x,S_DUART_CHAN_MODE)
 120
 121 #define K_DUART_CHAN_MODE_NORMAL    0
 122 #define K_DUART_CHAN_MODE_LCL_LOOP  2
 123 #define K_DUART_CHAN_MODE_REM_LOOP  3
 124
 125 #define V_DUART_CHAN_MODE_NORMAL    V_DUART_CHAN_MODE(K_DUART_CHAN_MODE_NORMAL)
 126 #define V_DUART_CHAN_MODE_LCL_LOOP  V_DUART_CHAN_MODE(K_DUART_CHAN_MODE_LCL_LOOP)
 127 #define V_DUART_CHAN_MODE_REM_LOOP  V_DUART_CHAN_MODE(K_DUART_CHAN_MODE_REM_LOOP)
 128
 129 /*
 130  * DUART Command Register (Table 10-5)
 131  * Register: DUART_CMD_A
 132  * Register: DUART_CMD_B
 133  */
 134
 135 #define M_DUART_RX_EN               _SB_MAKEMASK1(0)
 136 #define M_DUART_RX_DIS              _SB_MAKEMASK1(1)
 137 #define M_DUART_TX_EN               _SB_MAKEMASK1(2)
 138 #define M_DUART_TX_DIS              _SB_MAKEMASK1(3)
 139
 140 #define S_DUART_MISC_CMD            4
 141 #define M_DUART_MISC_CMD            _SB_MAKEMASK(3,S_DUART_MISC_CMD)
 142 #define V_DUART_MISC_CMD(x)         _SB_MAKEVALUE(x,S_DUART_MISC_CMD)
 143
 144 #define K_DUART_MISC_CMD_NOACTION0       0
 145 #define K_DUART_MISC_CMD_NOACTION1       1
 146 #define K_DUART_MISC_CMD_RESET_RX        2
 147 #define K_DUART_MISC_CMD_RESET_TX        3
 148 #define K_DUART_MISC_CMD_NOACTION4       4
 149 #define K_DUART_MISC_CMD_RESET_BREAK_INT 5
 150 #define K_DUART_MISC_CMD_START_BREAK     6
 151 #define K_DUART_MISC_CMD_STOP_BREAK      7
 152
 153 #define V_DUART_MISC_CMD_NOACTION0       V_DUART_MISC_CMD(K_DUART_MISC_CMD_NOACTION0)
 154 #define V_DUART_MISC_CMD_NOACTION1       V_DUART_MISC_CMD(K_DUART_MISC_CMD_NOACTION1)
 155 #define V_DUART_MISC_CMD_RESET_RX        V_DUART_MISC_CMD(K_DUART_MISC_CMD_RESET_RX)
 156 #define V_DUART_MISC_CMD_RESET_TX        V_DUART_MISC_CMD(K_DUART_MISC_CMD_RESET_TX)
 157 #define V_DUART_MISC_CMD_NOACTION4       V_DUART_MISC_CMD(K_DUART_MISC_CMD_NOACTION4)
 158 #define V_DUART_MISC_CMD_RESET_BREAK_INT V_DUART_MISC_CMD(K_DUART_MISC_CMD_RESET_BREAK_INT)
 159 #define V_DUART_MISC_CMD_START_BREAK     V_DUART_MISC_CMD(K_DUART_MISC_CMD_START_BREAK)
 160 #define V_DUART_MISC_CMD_STOP_BREAK      V_DUART_MISC_CMD(K_DUART_MISC_CMD_STOP_BREAK)
 161
 162 #define M_DUART_CMD_RESERVED             _SB_MAKEMASK1(7)
 163
 164 /*
 165  * DUART Status Register (Table 10-6)
 166  * Register: DUART_STATUS_A
 167  * Register: DUART_STATUS_B
 168  * READ-ONLY
 169  */
 170
 171 #define M_DUART_RX_RDY              _SB_MAKEMASK1(0)
 172 #define M_DUART_RX_FFUL             _SB_MAKEMASK1(1)
 173 #define M_DUART_TX_RDY              _SB_MAKEMASK1(2)
 174 #define M_DUART_TX_EMT              _SB_MAKEMASK1(3)
 175 #define M_DUART_OVRUN_ERR           _SB_MAKEMASK1(4)
 176 #define M_DUART_PARITY_ERR          _SB_MAKEMASK1(5)
 177 #define M_DUART_FRM_ERR             _SB_MAKEMASK1(6)
 178 #define M_DUART_RCVD_BRK            _SB_MAKEMASK1(7)
 179
 180 /*
 181  * DUART Baud Rate Register (Table 10-7)
 182  * Register: DUART_CLK_SEL_A
 183  * Register: DUART_CLK_SEL_B
 184  */
 185
 186 #define M_DUART_CLK_COUNTER         _SB_MAKEMASK(12,0)
 187 #define V_DUART_BAUD_RATE(x)        (100000000/((x)*20)-1)
 188
 189 /*
 190  * DUART Data Registers (Table 10-8 and 10-9)
 191  * Register: DUART_RX_HOLD_A
 192  * Register: DUART_RX_HOLD_B
 193  * Register: DUART_TX_HOLD_A
 194  * Register: DUART_TX_HOLD_B
 195  */
 196
 197 #define M_DUART_RX_DATA             _SB_MAKEMASK(8,0)
 198 #define M_DUART_TX_DATA             _SB_MAKEMASK(8,0)
 199
 200 /*
 201  * DUART Input Port Register (Table 10-10)
 202  * Register: DUART_IN_PORT
 203  */
 204
 205 #define M_DUART_IN_PIN0_VAL         _SB_MAKEMASK1(0)
 206 #define M_DUART_IN_PIN1_VAL         _SB_MAKEMASK1(1)
 207 #define M_DUART_IN_PIN2_VAL         _SB_MAKEMASK1(2)
 208 #define M_DUART_IN_PIN3_VAL         _SB_MAKEMASK1(3)
 209 #define M_DUART_IN_PIN4_VAL         _SB_MAKEMASK1(4)
 210 #define M_DUART_IN_PIN5_VAL         _SB_MAKEMASK1(5)
 211 #define M_DUART_RIN0_PIN            _SB_MAKEMASK1(6)
 212 #define M_DUART_RIN1_PIN            _SB_MAKEMASK1(7)
 213
 214 /*
 215  * DUART Input Port Change Status Register (Tables 10-11, 10-12, and 10-13)
 216  * Register: DUART_INPORT_CHNG
 217  */
 218
 219 #define S_DUART_IN_PIN_VAL          0
 220 #define M_DUART_IN_PIN_VAL          _SB_MAKEMASK(4,S_DUART_IN_PIN_VAL)
 221
 222 #define S_DUART_IN_PIN_CHNG         4
 223 #define M_DUART_IN_PIN_CHNG         _SB_MAKEMASK(4,S_DUART_IN_PIN_CHNG)
 224
 225
 226 /*
 227  * DUART Output port control register (Table 10-14)
 228  * Register: DUART_OPCR
 229  */
 230
 231 #define M_DUART_OPCR_RESERVED0      _SB_MAKEMASK1(0)   /* must be zero */
 232 #define M_DUART_OPC2_SEL            _SB_MAKEMASK1(1)
 233 #define M_DUART_OPCR_RESERVED1      _SB_MAKEMASK1(2)   /* must be zero */
 234 #define M_DUART_OPC3_SEL            _SB_MAKEMASK1(3)
 235 #define M_DUART_OPCR_RESERVED2      _SB_MAKEMASK(4,4)  /* must be zero */
 236
 237 /*
 238  * DUART Aux Control Register (Table 10-15)
 239  * Register: DUART_AUX_CTRL
 240  */
 241
 242 #define M_DUART_IP0_CHNG_ENA        _SB_MAKEMASK1(0)
 243 #define M_DUART_IP1_CHNG_ENA        _SB_MAKEMASK1(1)
 244 #define M_DUART_IP2_CHNG_ENA        _SB_MAKEMASK1(2)
 245 #define M_DUART_IP3_CHNG_ENA        _SB_MAKEMASK1(3)
 246 #define M_DUART_ACR_RESERVED        _SB_MAKEMASK(4,4)
 247
 248 #define M_DUART_CTS_CHNG_ENA        _SB_MAKEMASK1(0)
 249 #define M_DUART_CIN_CHNG_ENA        _SB_MAKEMASK1(2)
 250
 251 /*
 252  * DUART Interrupt Status Register (Table 10-16)
 253  * Register: DUART_ISR
 254  */
 255
 256 #define M_DUART_ISR_TX_A            _SB_MAKEMASK1(0)
 257
 258 #define S_DUART_ISR_RX_A            1
 259 #define M_DUART_ISR_RX_A            _SB_MAKEMASK1(S_DUART_ISR_RX_A)
 260 #define V_DUART_ISR_RX_A(x)         _SB_MAKEVALUE(x,S_DUART_ISR_RX_A)
 261 #define G_DUART_ISR_RX_A(x)         _SB_GETVALUE(x,S_DUART_ISR_RX_A,M_DUART_ISR_RX_A)
 262
 263 #define M_DUART_ISR_BRK_A           _SB_MAKEMASK1(2)
 264 #define M_DUART_ISR_IN_A            _SB_MAKEMASK1(3)
 265 #define M_DUART_ISR_TX_B            _SB_MAKEMASK1(4)
 266 #define M_DUART_ISR_RX_B            _SB_MAKEMASK1(5)
 267 #define M_DUART_ISR_BRK_B           _SB_MAKEMASK1(6)
 268 #define M_DUART_ISR_IN_B            _SB_MAKEMASK1(7)
 269
 270 /*
 271  * DUART Channel A Interrupt Status Register (Table 10-17)
 272  * DUART Channel B Interrupt Status Register (Table 10-18)
 273  * Register: DUART_ISR_A
 274  * Register: DUART_ISR_B
 275  */
 276
 277 #define M_DUART_ISR_TX              _SB_MAKEMASK1(0)
 278 #define M_DUART_ISR_RX              _SB_MAKEMASK1(1)
 279 #define M_DUART_ISR_BRK             _SB_MAKEMASK1(2)
 280 #define M_DUART_ISR_IN              _SB_MAKEMASK1(3)
 281 #define M_DUART_ISR_RESERVED        _SB_MAKEMASK(4,4)
 282
 283 /*
 284  * DUART Interrupt Mask Register (Table 10-19)
 285  * Register: DUART_IMR
 286  */
 287
 288 #define M_DUART_IMR_TX_A            _SB_MAKEMASK1(0)
 289 #define M_DUART_IMR_RX_A            _SB_MAKEMASK1(1)
 290 #define M_DUART_IMR_BRK_A           _SB_MAKEMASK1(2)
 291 #define M_DUART_IMR_IN_A            _SB_MAKEMASK1(3)
 292 #define M_DUART_IMR_ALL_A           _SB_MAKEMASK(4,0)
 293
 294 #define M_DUART_IMR_TX_B            _SB_MAKEMASK1(4)
 295 #define M_DUART_IMR_RX_B            _SB_MAKEMASK1(5)
 296 #define M_DUART_IMR_BRK_B           _SB_MAKEMASK1(6)
 297 #define M_DUART_IMR_IN_B            _SB_MAKEMASK1(7)
 298 #define M_DUART_IMR_ALL_B           _SB_MAKEMASK(4,4)
 299
 300 /*
 301  * DUART Channel A Interrupt Mask Register (Table 10-20)
 302  * DUART Channel B Interrupt Mask Register (Table 10-21)
 303  * Register: DUART_IMR_A
 304  * Register: DUART_IMR_B
 305  */
 306
 307 #define M_DUART_IMR_TX              _SB_MAKEMASK1(0)
 308 #define M_DUART_IMR_RX              _SB_MAKEMASK1(1)
 309 #define M_DUART_IMR_BRK             _SB_MAKEMASK1(2)
 310 #define M_DUART_IMR_IN              _SB_MAKEMASK1(3)
 311 #define M_DUART_IMR_ALL             _SB_MAKEMASK(4,0)
 312 #define M_DUART_IMR_RESERVED        _SB_MAKEMASK(4,4)
 313
 314
 315 /*
 316  * DUART Output Port Set Register (Table 10-22)
 317  * Register: DUART_SET_OPR
 318  */
 319
 320 #define M_DUART_SET_OPR0            _SB_MAKEMASK1(0)
 321 #define M_DUART_SET_OPR1            _SB_MAKEMASK1(1)
 322 #define M_DUART_SET_OPR2            _SB_MAKEMASK1(2)
 323 #define M_DUART_SET_OPR3            _SB_MAKEMASK1(3)
 324 #define M_DUART_OPSR_RESERVED       _SB_MAKEMASK(4,4)
 325
 326 /*
 327  * DUART Output Port Clear Register (Table 10-23)
 328  * Register: DUART_CLEAR_OPR
 329  */
 330
 331 #define M_DUART_CLR_OPR0            _SB_MAKEMASK1(0)
 332 #define M_DUART_CLR_OPR1            _SB_MAKEMASK1(1)
 333 #define M_DUART_CLR_OPR2            _SB_MAKEMASK1(2)
 334 #define M_DUART_CLR_OPR3            _SB_MAKEMASK1(3)
 335 #define M_DUART_OPCR_RESERVED       _SB_MAKEMASK(4,4)
 336
 337 /*
 338  * DUART Output Port RTS Register (Table 10-24)
 339  * Register: DUART_OUT_PORT
 340  */
 341
 342 #define M_DUART_OUT_PIN_SET0        _SB_MAKEMASK1(0)
 343 #define M_DUART_OUT_PIN_SET1        _SB_MAKEMASK1(1)
 344 #define M_DUART_OUT_PIN_CLR0        _SB_MAKEMASK1(2)
 345 #define M_DUART_OUT_PIN_CLR1        _SB_MAKEMASK1(3)
 346 #define M_DUART_OPRR_RESERVED       _SB_MAKEMASK(4,4)
 347
 348 #define M_DUART_OUT_PIN_SET(chan) \
 349     (chan == 0 ? M_DUART_OUT_PIN_SET0 : M_DUART_OUT_PIN_SET1)
 350 #define M_DUART_OUT_PIN_CLR(chan) \
 351     (chan == 0 ? M_DUART_OUT_PIN_CLR0 : M_DUART_OUT_PIN_CLR1)
 352
 353 #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480)
 354 /*
 355  * Full Interrupt Control Register
 356  */
 357
 358 #define S_DUART_SIG_FULL           _SB_MAKE64(0)
 359 #define M_DUART_SIG_FULL           _SB_MAKEMASK(4,S_DUART_SIG_FULL)
 360 #define V_DUART_SIG_FULL(x)        _SB_MAKEVALUE(x,S_DUART_SIG_FULL)
 361 #define G_DUART_SIG_FULL(x)        _SB_GETVALUE(x,S_DUART_SIG_FULL,M_DUART_SIG_FULL)
 362
 363 #define S_DUART_INT_TIME           _SB_MAKE64(4)
 364 #define M_DUART_INT_TIME           _SB_MAKEMASK(4,S_DUART_INT_TIME)
 365 #define V_DUART_INT_TIME(x)        _SB_MAKEVALUE(x,S_DUART_INT_TIME)
 366 #define G_DUART_INT_TIME(x)        _SB_GETVALUE(x,S_DUART_INT_TIME,M_DUART_INT_TIME)
 367 #endif /* 1250 PASS2 || 112x PASS1 || 1480 */
 368
 369
 370 /* ********************************************************************** */
 371
 372
 373 #endif