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1 /* $NetBSD: scif.c,v 1.58 2009/03/18 10:22:36 cegger Exp $ */
3 /*-
4 * Copyright (C) 1999 T.Horiuchi and SAITOH Masanobu. All rights reserved.
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * 3. The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29 /*-
30 * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc.
31 * All rights reserved.
33 * This code is derived from software contributed to The NetBSD Foundation
34 * by Charles M. Hannum.
36 * Redistribution and use in source and binary forms, with or without
37 * modification, are permitted provided that the following conditions
38 * are met:
39 * 1. Redistributions of source code must retain the above copyright
40 * notice, this list of conditions and the following disclaimer.
41 * 2. Redistributions in binary form must reproduce the above copyright
42 * notice, this list of conditions and the following disclaimer in the
43 * documentation and/or other materials provided with the distribution.
45 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
46 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
47 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
48 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
49 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
50 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
51 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
52 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
53 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
54 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
55 * POSSIBILITY OF SUCH DAMAGE.
59 * Copyright (c) 1991 The Regents of the University of California.
60 * All rights reserved.
62 * Redistribution and use in source and binary forms, with or without
63 * modification, are permitted provided that the following conditions
64 * are met:
65 * 1. Redistributions of source code must retain the above copyright
66 * notice, this list of conditions and the following disclaimer.
67 * 2. Redistributions in binary form must reproduce the above copyright
68 * notice, this list of conditions and the following disclaimer in the
69 * documentation and/or other materials provided with the distribution.
70 * 3. Neither the name of the University nor the names of its contributors
71 * may be used to endorse or promote products derived from this software
72 * without specific prior written permission.
74 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
75 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
76 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
77 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
78 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
79 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
80 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
81 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
82 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
83 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
84 * SUCH DAMAGE.
86 * @(#)com.c 7.5 (Berkeley) 5/16/91
90 * SH internal serial driver
92 * This code is derived from both z8530tty.c and com.c
95 #include <sys/cdefs.h>
96 __KERNEL_RCSID(0, "$NetBSD: scif.c,v 1.58 2009/03/18 10:22:36 cegger Exp $");
98 #include "opt_kgdb.h"
99 #include "opt_scif.h"
101 #include <sys/param.h>
102 #include <sys/systm.h>
103 #include <sys/tty.h>
104 #include <sys/proc.h>
105 #include <sys/conf.h>
106 #include <sys/file.h>
107 #include <sys/syslog.h>
108 #include <sys/kernel.h>
109 #include <sys/device.h>
110 #include <sys/malloc.h>
111 #include <sys/kgdb.h>
112 #include <sys/kauth.h>
113 #include <sys/intr.h>
115 #include <dev/cons.h>
117 #include <sh3/clock.h>
118 #include <sh3/exception.h>
119 #include <sh3/scifreg.h>
121 #include <sh3/dev/scifvar.h>
123 #include "locators.h"
126 struct scif_softc {
127 device_t sc_dev;
129 struct tty *sc_tty;
130 void *sc_si;
132 callout_t sc_diag_ch;
134 #if 0
135 bus_space_tag_t sc_iot; /* ISA i/o space identifier */
136 bus_space_handle_t sc_ioh; /* ISA io handle */
138 int sc_drq;
140 int sc_frequency;
141 #endif
143 u_int sc_overflows,
144 sc_floods,
145 sc_errors; /* number of retries so far */
146 u_char sc_status[7]; /* copy of registers */
148 int sc_hwflags;
149 int sc_swflags;
150 u_int sc_fifolen;
152 u_int sc_r_hiwat,
153 sc_r_lowat;
154 u_char *volatile sc_rbget,
155 *volatile sc_rbput;
156 volatile u_int sc_rbavail;
157 u_char *sc_rbuf,
158 *sc_ebuf;
160 u_char *sc_tba; /* transmit buffer address */
161 u_int sc_tbc, /* transmit byte count */
162 sc_heldtbc;
164 volatile u_char sc_rx_flags,
165 #define RX_TTY_BLOCKED 0x01
166 #define RX_TTY_OVERFLOWED 0x02
167 #define RX_IBUF_BLOCKED 0x04
168 #define RX_IBUF_OVERFLOWED 0x08
169 #define RX_ANY_BLOCK 0x0f
170 sc_tx_busy, /* working on an output chunk */
171 sc_tx_done, /* done with one output chunk */
172 sc_tx_stopped, /* H/W level stop (lost CTS) */
173 sc_st_check, /* got a status interrupt */
174 sc_rx_ready;
176 volatile u_char sc_heldchange;
180 static int scif_match(device_t, cfdata_t, void *);
181 static void scif_attach(device_t, device_t, void *);
183 CFATTACH_DECL_NEW(scif, sizeof(struct scif_softc),
184 scif_match, scif_attach, NULL, NULL);
186 static int scif_attached = 0; /* XXX: FIXME: don't limit to just one! */
188 extern struct cfdriver scif_cd;
190 #define SCIFUNIT_MASK 0x7ffff
191 #define SCIFDIALOUT_MASK 0x80000
193 #define SCIFUNIT(x) (minor(x) & SCIFUNIT_MASK)
194 #define SCIFDIALOUT(x) (minor(x) & SCIFDIALOUT_MASK)
197 /* console */
198 dev_type_cnprobe(scifcnprobe);
199 dev_type_cninit(scifcninit);
200 dev_type_cngetc(scifcngetc);
201 dev_type_cnputc(scifcnputc);
204 /* cdevsw */
205 dev_type_open(scifopen);
206 dev_type_close(scifclose);
207 dev_type_read(scifread);
208 dev_type_write(scifwrite);
209 dev_type_ioctl(scifioctl);
210 dev_type_stop(scifstop);
211 dev_type_tty(sciftty);
212 dev_type_poll(scifpoll);
214 const struct cdevsw scif_cdevsw = {
215 scifopen, scifclose, scifread, scifwrite, scifioctl,
216 scifstop, sciftty, scifpoll, nommap, ttykqfilter, D_TTY
220 /* struct tty */
221 static void scifstart(struct tty *);
222 static int scifparam(struct tty *, struct termios *);
225 void InitializeScif (unsigned int);
226 int ScifErrCheck(void);
227 void scif_putc(unsigned char);
228 unsigned char scif_getc(void);
230 static int scifintr(void *);
231 static void scifsoft(void *);
232 static void scif_rxsoft(struct scif_softc *, struct tty *);
233 static void scif_txsoft(struct scif_softc *, struct tty *);
234 #if 0
235 static void scif_stsoft(struct scif_softc *, struct tty *);
236 #endif
237 static void scif_schedrx(struct scif_softc *);
238 static void scifdiag(void *);
240 static void scif_break(struct scif_softc *, int);
241 static void scif_iflush(struct scif_softc *);
244 /* Hardware flag masks (sc_hwflags) */
245 #define SCIF_HW_NOIEN 0x01
246 #define SCIF_HW_FIFO 0x02
247 #define SCIF_HW_FLOW 0x08
248 #define SCIF_HW_DEV_OK 0x20
249 #define SCIF_HW_CONSOLE 0x40
250 #define SCIF_HW_KGDB 0x80
253 /* Buffer size for character buffer */
254 #define SCIF_RING_SIZE 2048
255 static unsigned int scif_rbuf_size = SCIF_RING_SIZE;
257 /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */
258 static unsigned int scif_rbuf_hiwat = (SCIF_RING_SIZE * 1) / 4;
259 static unsigned int scif_rbuf_lowat = (SCIF_RING_SIZE * 3) / 4;
262 #ifdef SCIFCN_SPEED
263 unsigned int scifcn_speed = SCIFCN_SPEED;
264 #else
265 unsigned int scifcn_speed = 9600;
266 #endif
268 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
269 int scifconscflag = CONMODE;
271 static int scifisconsole = 0;
273 #ifdef KGDB
274 static int kgdb_attached = 0;
275 #endif
278 #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */
281 /* XXX: uwe
282 * Prepare for bus_spacification. The difference in access widths is
283 * still handled by the magic definitions in scifreg.h
285 #define scif_smr_read() SHREG_SCSMR2
286 #define scif_smr_write(v) (SHREG_SCSMR2 = (v))
288 #define scif_brr_read() SHREG_SCBRR2
289 #define scif_brr_write(v) (SHREG_SCBRR2 = (v))
291 #define scif_scr_read() SHREG_SCSCR2
292 #define scif_scr_write(v) (SHREG_SCSCR2 = (v))
294 #define scif_ftdr_write(v) (SHREG_SCFTDR2 = (v))
296 #define scif_ssr_read() SHREG_SCSSR2
297 #define scif_ssr_write(v) (SHREG_SCSSR2 = (v))
299 #define scif_frdr_read() SHREG_SCFRDR2
301 #define scif_fcr_read() SHREG_SCFCR2
302 #define scif_fcr_write(v) (SHREG_SCFCR2 = (v))
304 #define scif_fdr_read() SHREG_SCFDR2
306 #ifdef SH4 /* additional registers in sh4 */
308 #define scif_sptr_read() SHREG_SCSPTR2
309 #define scif_sptr_write(v) (SHREG_SCSPTR2 = (v))
311 #define scif_lsr_read() SHREG_SCLSR2
312 #define scif_lsr_write(v) (SHREG_SCLSR2 = (v))
314 #endif /* SH4 */
317 void
318 InitializeScif(unsigned int bps)
321 /* Initialize SCR */
322 scif_scr_write(0x00);
324 #if 0
325 scif_fcr_write(SCFCR2_TFRST | SCFCR2_RFRST | SCFCR2_MCE);
326 #else
327 scif_fcr_write(SCFCR2_TFRST | SCFCR2_RFRST);
328 #endif
329 /* Serial Mode Register */
330 scif_smr_write(0x00); /* 8bit,NonParity,Even,1Stop */
332 /* Bit Rate Register */
333 scif_brr_write(divrnd(sh_clock_get_pclock(), 32 * bps) - 1);
336 * wait 2m Sec, because Send/Recv must begin 1 bit period after
337 * BRR is set.
339 delay(2000);
341 #if 0
342 scif_fcr_write(FIFO_RCV_TRIGGER_14 | FIFO_XMT_TRIGGER_1 | SCFCR2_MCE);
343 #else
344 scif_fcr_write(FIFO_RCV_TRIGGER_14 | FIFO_XMT_TRIGGER_1);
345 #endif
347 /* Send permission, Receive permission ON */
348 scif_scr_write(SCSCR2_TE | SCSCR2_RE);
350 /* Serial Status Register */
351 scif_ssr_write(scif_ssr_read() & SCSSR2_TDFE); /* Clear Status */
355 ScifErrCheck(void)
358 return (scif_ssr_read() & (SCSSR2_ER | SCSSR2_FER | SCSSR2_PER));
361 void
362 scif_putc(unsigned char c)
365 /* wait for ready */
366 while ((scif_fdr_read() & SCFDR2_TXCNT) == SCFDR2_TXF_FULL)
367 continue;
369 /* write send data to send register */
370 scif_ftdr_write(c);
372 /* clear ready flag */
373 scif_ssr_write(scif_ssr_read() & ~(SCSSR2_TDFE | SCSSR2_TEND));
376 unsigned char
377 scif_getc(void)
379 unsigned char c, err_c;
380 #ifdef SH4
381 unsigned short err_c2 = 0; /* XXXGCC: -Wuninitialized */
382 #endif
384 for (;;) {
385 /* wait for ready */
386 while ((scif_fdr_read() & SCFDR2_RECVCNT) == 0)
387 continue;
389 c = scif_frdr_read();
390 err_c = scif_ssr_read();
391 scif_ssr_write(scif_ssr_read()
392 & ~(SCSSR2_ER | SCSSR2_BRK | SCSSR2_RDF | SCSSR2_DR));
393 #ifdef SH4
394 if (CPU_IS_SH4) {
395 err_c2 = scif_lsr_read();
396 scif_lsr_write(scif_lsr_read() & ~SCLSR2_ORER);
398 #endif
399 if ((err_c & (SCSSR2_ER | SCSSR2_BRK | SCSSR2_FER
400 | SCSSR2_PER)) == 0)
402 #ifdef SH4
403 if (CPU_IS_SH4 && ((err_c2 & SCLSR2_ORER) == 0))
404 #endif
405 return(c);
411 static int
412 scif_match(device_t parent, cfdata_t cfp, void *aux)
415 if (scif_attached)
416 return 0;
418 if (strcmp(cfp->cf_name, "scif") != 0)
419 return 0;
421 return 1;
424 static void
425 scif_attach(device_t parent, device_t self, void *aux)
427 struct scif_softc *sc;
428 struct tty *tp;
430 sc = device_private(self);
431 sc->sc_dev = self;
433 scif_attached = 1;
435 sc->sc_hwflags = 0; /* XXX */
436 sc->sc_swflags = 0; /* XXX */
437 sc->sc_fifolen = 16;
439 aprint_normal("\n");
440 if (scifisconsole) {
441 aprint_naive(" (console)\n");
442 aprint_normal_dev(self, "console\n");
443 SET(sc->sc_hwflags, SCIF_HW_CONSOLE);
444 SET(sc->sc_swflags, TIOCFLAG_SOFTCAR);
446 #ifdef KGDB
447 else if (kgdb_attached) {
448 aprint_naive(" (kgdb)\n");
449 aprint_normal_dev(self, "kgdb\n");
450 SET(sc->sc_hwflags, SCIF_HW_KGDB);
451 SET(sc->sc_swflags, TIOCFLAG_SOFTCAR);
453 #endif
454 else {
455 aprint_naive("\n");
456 InitializeScif(9600); /* XXX */
459 callout_init(&sc->sc_diag_ch, 0);
460 #ifdef SH4
461 intc_intr_establish(SH4_INTEVT_SCIF_ERI, IST_LEVEL, IPL_SERIAL,
462 scifintr, sc);
463 intc_intr_establish(SH4_INTEVT_SCIF_RXI, IST_LEVEL, IPL_SERIAL,
464 scifintr, sc);
465 intc_intr_establish(SH4_INTEVT_SCIF_BRI, IST_LEVEL, IPL_SERIAL,
466 scifintr, sc);
467 intc_intr_establish(SH4_INTEVT_SCIF_TXI, IST_LEVEL, IPL_SERIAL,
468 scifintr, sc);
469 #else
470 intc_intr_establish(SH7709_INTEVT2_SCIF_ERI, IST_LEVEL, IPL_SERIAL,
471 scifintr, sc);
472 intc_intr_establish(SH7709_INTEVT2_SCIF_RXI, IST_LEVEL, IPL_SERIAL,
473 scifintr, sc);
474 intc_intr_establish(SH7709_INTEVT2_SCIF_BRI, IST_LEVEL, IPL_SERIAL,
475 scifintr, sc);
476 intc_intr_establish(SH7709_INTEVT2_SCIF_TXI, IST_LEVEL, IPL_SERIAL,
477 scifintr, sc);
478 #endif
480 sc->sc_si = softint_establish(SOFTINT_SERIAL, scifsoft, sc);
481 SET(sc->sc_hwflags, SCIF_HW_DEV_OK);
483 tp = ttymalloc();
484 tp->t_oproc = scifstart;
485 tp->t_param = scifparam;
486 tp->t_hwiflow = NULL;
488 sc->sc_tty = tp;
489 sc->sc_rbuf = malloc(scif_rbuf_size << 1, M_DEVBUF, M_NOWAIT);
490 if (sc->sc_rbuf == NULL) {
491 aprint_error_dev(self, "unable to allocate ring buffer\n");
492 return;
494 sc->sc_ebuf = sc->sc_rbuf + (scif_rbuf_size << 1);
496 tty_attach(tp);
498 /* XXX: TODO */
499 if (!pmf_device_register(self, NULL, NULL))
500 aprint_error_dev(self, "unable to establish power handler\n");
504 * Start or restart transmission.
506 static void
507 scifstart(struct tty *tp)
509 struct scif_softc *sc;
510 int s;
512 sc = device_lookup_private(&scif_cd, SCIFUNIT(tp->t_dev));
514 s = spltty();
515 if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP))
516 goto out;
517 if (sc->sc_tx_stopped)
518 goto out;
519 if (!ttypull(tp))
520 goto out;
522 /* Grab the first contiguous region of buffer space. */
524 u_char *tba;
525 int tbc;
527 tba = tp->t_outq.c_cf;
528 tbc = ndqb(&tp->t_outq, 0);
530 (void)splserial();
532 sc->sc_tba = tba;
533 sc->sc_tbc = tbc;
536 SET(tp->t_state, TS_BUSY);
537 sc->sc_tx_busy = 1;
539 /* Enable transmit completion interrupts if necessary. */
540 scif_scr_write(scif_scr_read() | SCSCR2_TIE | SCSCR2_RIE);
542 /* Output the first chunk of the contiguous buffer. */
544 int n;
545 int maxchars;
546 int i;
548 n = sc->sc_tbc;
549 maxchars = sc->sc_fifolen
550 - ((scif_fdr_read() & SCFDR2_TXCNT) >> 8);
551 if (n > maxchars)
552 n = maxchars;
554 for (i = 0; i < n; i++) {
555 scif_putc(*(sc->sc_tba));
556 sc->sc_tba++;
558 sc->sc_tbc -= n;
560 out:
561 splx(s);
562 return;
566 * Set SCIF tty parameters from termios.
567 * XXX - Should just copy the whole termios after
568 * making sure all the changes could be done.
570 static int
571 scifparam(struct tty *tp, struct termios *t)
573 struct scif_softc *sc;
574 int ospeed = t->c_ospeed;
575 int s;
577 sc = device_lookup_private(&scif_cd, SCIFUNIT(tp->t_dev));
578 if (!device_is_active(sc->sc_dev))
579 return (EIO);
581 /* Check requested parameters. */
582 if (ospeed < 0)
583 return (EINVAL);
584 if (t->c_ispeed && t->c_ispeed != t->c_ospeed)
585 return (EINVAL);
588 * For the console, always force CLOCAL and !HUPCL, so that the port
589 * is always active.
591 if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) ||
592 ISSET(sc->sc_hwflags, SCIF_HW_CONSOLE)) {
593 SET(t->c_cflag, CLOCAL);
594 CLR(t->c_cflag, HUPCL);
598 * If there were no changes, don't do anything. This avoids dropping
599 * input and improves performance when all we did was frob things like
600 * VMIN and VTIME.
602 if (tp->t_ospeed == t->c_ospeed &&
603 tp->t_cflag == t->c_cflag)
604 return (0);
606 #if 0
607 /* XXX (msaitoh) */
608 lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag);
609 #endif
611 s = splserial();
614 * Set the flow control pins depending on the current flow control
615 * mode.
617 if (ISSET(t->c_cflag, CRTSCTS)) {
618 scif_fcr_write(scif_fcr_read() | SCFCR2_MCE);
619 } else {
620 scif_fcr_write(scif_fcr_read() & ~SCFCR2_MCE);
623 scif_brr_write(divrnd(sh_clock_get_pclock(), 32 * ospeed) -1);
626 * Set the FIFO threshold based on the receive speed.
628 * * If it's a low speed, it's probably a mouse or some other
629 * interactive device, so set the threshold low.
630 * * If it's a high speed, trim the trigger level down to prevent
631 * overflows.
632 * * Otherwise set it a bit higher.
634 #if 0
635 /* XXX (msaitoh) */
636 if (ISSET(sc->sc_hwflags, SCIF_HW_HAYESP))
637 sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8;
638 else if (ISSET(sc->sc_hwflags, SCIF_HW_FIFO))
639 sc->sc_fifo = FIFO_ENABLE |
640 (t->c_ospeed <= 1200 ? FIFO_TRIGGER_1 :
641 t->c_ospeed <= 38400 ? FIFO_TRIGGER_8 : FIFO_TRIGGER_4);
642 else
643 sc->sc_fifo = 0;
644 #endif
646 /* And copy to tty. */
647 tp->t_ispeed = 0;
648 tp->t_ospeed = t->c_ospeed;
649 tp->t_cflag = t->c_cflag;
651 if (!sc->sc_heldchange) {
652 if (sc->sc_tx_busy) {
653 sc->sc_heldtbc = sc->sc_tbc;
654 sc->sc_tbc = 0;
655 sc->sc_heldchange = 1;
657 #if 0
658 /* XXX (msaitoh) */
659 else
660 scif_loadchannelregs(sc);
661 #endif
664 if (!ISSET(t->c_cflag, CHWFLOW)) {
665 /* Disable the high water mark. */
666 sc->sc_r_hiwat = 0;
667 sc->sc_r_lowat = 0;
668 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) {
669 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED);
670 scif_schedrx(sc);
672 } else {
673 sc->sc_r_hiwat = scif_rbuf_hiwat;
674 sc->sc_r_lowat = scif_rbuf_lowat;
677 splx(s);
679 #ifdef SCIF_DEBUG
680 if (scif_debug)
681 scifstatus(sc, "scifparam ");
682 #endif
684 if (!ISSET(t->c_cflag, CHWFLOW)) {
685 if (sc->sc_tx_stopped) {
686 sc->sc_tx_stopped = 0;
687 scifstart(tp);
691 return (0);
694 static void
695 scif_iflush(struct scif_softc *sc)
697 int i;
698 unsigned char c;
700 i = scif_fdr_read() & SCFDR2_RECVCNT;
702 while (i > 0) {
703 c = scif_frdr_read();
704 scif_ssr_write(scif_ssr_read() & ~(SCSSR2_RDF | SCSSR2_DR));
705 i--;
710 scifopen(dev_t dev, int flag, int mode, struct lwp *l)
712 struct scif_softc *sc;
713 struct tty *tp;
714 int s, s2;
715 int error;
717 sc = device_lookup_private(&scif_cd, SCIFUNIT(dev));
718 if (sc == 0 || !ISSET(sc->sc_hwflags, SCIF_HW_DEV_OK) ||
719 sc->sc_rbuf == NULL)
720 return (ENXIO);
722 if (!device_is_active(sc->sc_dev))
723 return (ENXIO);
725 #ifdef KGDB
727 * If this is the kgdb port, no other use is permitted.
729 if (ISSET(sc->sc_hwflags, SCIF_HW_KGDB))
730 return (EBUSY);
731 #endif /* KGDB */
733 tp = sc->sc_tty;
735 if (kauth_authorize_device_tty(l->l_cred, KAUTH_DEVICE_TTY_OPEN, tp))
736 return (EBUSY);
738 s = spltty();
741 * Do the following iff this is a first open.
743 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
744 struct termios t;
746 tp->t_dev = dev;
748 s2 = splserial();
750 /* Turn on interrupts. */
751 scif_scr_write(scif_scr_read() | SCSCR2_TIE | SCSCR2_RIE);
753 splx(s2);
756 * Initialize the termios status to the defaults. Add in the
757 * sticky bits from TIOCSFLAGS.
759 t.c_ispeed = 0;
760 if (ISSET(sc->sc_hwflags, SCIF_HW_CONSOLE)) {
761 t.c_ospeed = scifcn_speed; /* XXX (msaitoh) */
762 t.c_cflag = scifconscflag;
763 } else {
764 t.c_ospeed = TTYDEF_SPEED;
765 t.c_cflag = TTYDEF_CFLAG;
767 if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL))
768 SET(t.c_cflag, CLOCAL);
769 if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS))
770 SET(t.c_cflag, CRTSCTS);
771 if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF))
772 SET(t.c_cflag, MDMBUF);
773 /* Make sure scifparam() will do something. */
774 tp->t_ospeed = 0;
775 (void) scifparam(tp, &t);
776 tp->t_iflag = TTYDEF_IFLAG;
777 tp->t_oflag = TTYDEF_OFLAG;
778 tp->t_lflag = TTYDEF_LFLAG;
779 ttychars(tp);
780 ttsetwater(tp);
782 s2 = splserial();
784 /* Clear the input ring, and unblock. */
785 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf;
786 sc->sc_rbavail = scif_rbuf_size;
787 scif_iflush(sc);
788 CLR(sc->sc_rx_flags, RX_ANY_BLOCK);
789 #if 0
790 /* XXX (msaitoh) */
791 scif_hwiflow(sc);
792 #endif
794 #ifdef SCIF_DEBUG
795 if (scif_debug)
796 scifstatus(sc, "scifopen ");
797 #endif
799 splx(s2);
802 splx(s);
804 error = ttyopen(tp, SCIFDIALOUT(dev), ISSET(flag, O_NONBLOCK));
805 if (error)
806 goto bad;
808 error = (*tp->t_linesw->l_open)(dev, tp);
809 if (error)
810 goto bad;
812 return (0);
814 bad:
816 return (error);
820 scifclose(dev_t dev, int flag, int mode, struct lwp *l)
822 struct scif_softc *sc;
823 struct tty *tp;
825 sc = device_lookup_private(&scif_cd, SCIFUNIT(dev));
826 tp = sc->sc_tty;
828 /* XXX This is for cons.c. */
829 if (!ISSET(tp->t_state, TS_ISOPEN))
830 return (0);
832 (*tp->t_linesw->l_close)(tp, flag);
833 ttyclose(tp);
835 if (!device_is_active(sc->sc_dev))
836 return (0);
838 return (0);
842 scifread(dev_t dev, struct uio *uio, int flag)
844 struct scif_softc *sc;
845 struct tty *tp;
847 sc = device_lookup_private(&scif_cd, SCIFUNIT(dev));
848 tp = sc->sc_tty;
850 return ((*tp->t_linesw->l_read)(tp, uio, flag));
854 scifwrite(dev_t dev, struct uio *uio, int flag)
856 struct scif_softc *sc;
857 struct tty *tp;
859 sc = device_lookup_private(&scif_cd, SCIFUNIT(dev));
860 tp = sc->sc_tty;
862 return ((*tp->t_linesw->l_write)(tp, uio, flag));
866 scifpoll(dev_t dev, int events, struct lwp *l)
868 struct scif_softc *sc;
869 struct tty *tp;
871 sc = device_lookup_private(&scif_cd, SCIFUNIT(dev));
872 tp = sc->sc_tty;
874 return ((*tp->t_linesw->l_poll)(tp, events, l));
877 struct tty *
878 sciftty(dev_t dev)
880 struct scif_softc *sc;
881 struct tty *tp;
883 sc = device_lookup_private(&scif_cd, SCIFUNIT(dev));
884 tp = sc->sc_tty;
886 return (tp);
890 scifioctl(dev_t dev, u_long cmd, void *data, int flag, struct lwp *l)
892 struct scif_softc *sc;
893 struct tty *tp;
894 int error;
895 int s;
897 sc = device_lookup_private(&scif_cd, SCIFUNIT(dev));
898 if (!device_is_active(sc->sc_dev))
899 return (EIO);
901 tp = sc->sc_tty;
902 error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, l);
903 if (error != EPASSTHROUGH)
904 return (error);
906 error = ttioctl(tp, cmd, data, flag, l);
907 if (error != EPASSTHROUGH)
908 return (error);
910 error = 0;
912 s = splserial();
914 switch (cmd) {
915 case TIOCSBRK:
916 scif_break(sc, 1);
917 break;
919 case TIOCCBRK:
920 scif_break(sc, 0);
921 break;
923 case TIOCGFLAGS:
924 *(int *)data = sc->sc_swflags;
925 break;
927 case TIOCSFLAGS:
928 error = kauth_authorize_device_tty(l->l_cred,
929 KAUTH_DEVICE_TTY_PRIVSET, tp);
930 if (error)
931 break;
932 sc->sc_swflags = *(int *)data;
933 break;
935 default:
936 error = EPASSTHROUGH;
937 break;
940 splx(s);
942 return (error);
945 static void
946 scif_schedrx(struct scif_softc *sc)
949 sc->sc_rx_ready = 1;
951 /* Wake up the poller. */
952 softint_schedule(sc->sc_si);
955 static void
956 scif_break(struct scif_softc *sc, int onoff)
959 if (onoff)
960 scif_ssr_write(scif_ssr_read() & ~SCSSR2_TDFE);
961 else
962 scif_ssr_write(scif_ssr_read() | SCSSR2_TDFE);
964 #if 0 /* XXX */
965 if (!sc->sc_heldchange) {
966 if (sc->sc_tx_busy) {
967 sc->sc_heldtbc = sc->sc_tbc;
968 sc->sc_tbc = 0;
969 sc->sc_heldchange = 1;
970 } else
971 scif_loadchannelregs(sc);
973 #endif
977 * Stop output, e.g., for ^S or output flush.
979 void
980 scifstop(struct tty *tp, int flag)
982 struct scif_softc *sc;
983 int s;
985 sc = device_lookup_private(&scif_cd, SCIFUNIT(tp->t_dev));
987 s = splserial();
988 if (ISSET(tp->t_state, TS_BUSY)) {
989 /* Stop transmitting at the next chunk. */
990 sc->sc_tbc = 0;
991 sc->sc_heldtbc = 0;
992 if (!ISSET(tp->t_state, TS_TTSTOP))
993 SET(tp->t_state, TS_FLUSH);
995 splx(s);
998 static void
999 scifdiag(void *arg)
1001 struct scif_softc *sc = arg;
1002 int overflows, floods;
1003 int s;
1005 s = splserial();
1006 overflows = sc->sc_overflows;
1007 sc->sc_overflows = 0;
1008 floods = sc->sc_floods;
1009 sc->sc_floods = 0;
1010 sc->sc_errors = 0;
1011 splx(s);
1013 log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n",
1014 device_xname(sc->sc_dev),
1015 overflows, overflows == 1 ? "" : "s",
1016 floods, floods == 1 ? "" : "s");
1019 static void
1020 scif_rxsoft(struct scif_softc *sc, struct tty *tp)
1022 int (*rint)(int, struct tty *) = tp->t_linesw->l_rint;
1023 u_char *get, *end;
1024 u_int cc, scc;
1025 u_char ssr2;
1026 int code;
1027 int s;
1029 end = sc->sc_ebuf;
1030 get = sc->sc_rbget;
1031 scc = cc = scif_rbuf_size - sc->sc_rbavail;
1033 if (cc == scif_rbuf_size) {
1034 sc->sc_floods++;
1035 if (sc->sc_errors++ == 0)
1036 callout_reset(&sc->sc_diag_ch, 60 * hz, scifdiag, sc);
1039 while (cc) {
1040 code = get[0];
1041 ssr2 = get[1];
1042 if (ISSET(ssr2, SCSSR2_BRK | SCSSR2_FER | SCSSR2_PER)) {
1043 if (ISSET(ssr2, SCSSR2_BRK | SCSSR2_FER))
1044 SET(code, TTY_FE);
1045 if (ISSET(ssr2, SCSSR2_PER))
1046 SET(code, TTY_PE);
1048 if ((*rint)(code, tp) == -1) {
1050 * The line discipline's buffer is out of space.
1052 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) {
1054 * We're either not using flow control, or the
1055 * line discipline didn't tell us to block for
1056 * some reason. Either way, we have no way to
1057 * know when there's more space available, so
1058 * just drop the rest of the data.
1060 get += cc << 1;
1061 if (get >= end)
1062 get -= scif_rbuf_size << 1;
1063 cc = 0;
1064 } else {
1066 * Don't schedule any more receive processing
1067 * until the line discipline tells us there's
1068 * space available (through scifhwiflow()).
1069 * Leave the rest of the data in the input
1070 * buffer.
1072 SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED);
1074 break;
1076 get += 2;
1077 if (get >= end)
1078 get = sc->sc_rbuf;
1079 cc--;
1082 if (cc != scc) {
1083 sc->sc_rbget = get;
1084 s = splserial();
1085 cc = sc->sc_rbavail += scc - cc;
1086 /* Buffers should be ok again, release possible block. */
1087 if (cc >= sc->sc_r_lowat) {
1088 if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) {
1089 CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED);
1090 scif_scr_write(scif_scr_read() | SCSCR2_RIE);
1092 #if 0
1093 if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) {
1094 CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED);
1095 scif_hwiflow(sc);
1097 #endif
1099 splx(s);
1103 static void
1104 scif_txsoft(struct scif_softc *sc, struct tty *tp)
1107 CLR(tp->t_state, TS_BUSY);
1108 if (ISSET(tp->t_state, TS_FLUSH))
1109 CLR(tp->t_state, TS_FLUSH);
1110 else
1111 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf));
1112 (*tp->t_linesw->l_start)(tp);
1115 #if 0 /* XXX (msaitoh) */
1116 static void
1117 scif_stsoft(struct scif_softc *sc, struct tty *tp)
1119 u_char msr, delta;
1120 int s;
1122 s = splserial();
1123 msr = sc->sc_msr;
1124 delta = sc->sc_msr_delta;
1125 sc->sc_msr_delta = 0;
1126 splx(s);
1128 if (ISSET(delta, sc->sc_msr_dcd)) {
1130 * Inform the tty layer that carrier detect changed.
1132 (void) (*tp->t_linesw->l_modem)(tp, ISSET(msr, MSR_DCD));
1135 if (ISSET(delta, sc->sc_msr_cts)) {
1136 /* Block or unblock output according to flow control. */
1137 if (ISSET(msr, sc->sc_msr_cts)) {
1138 sc->sc_tx_stopped = 0;
1139 (*tp->t_linesw->l_start)(tp);
1140 } else {
1141 sc->sc_tx_stopped = 1;
1145 #ifdef SCIF_DEBUG
1146 if (scif_debug)
1147 scifstatus(sc, "scif_stsoft");
1148 #endif
1150 #endif /* 0 */
1152 static void
1153 scifsoft(void *arg)
1155 struct scif_softc *sc = arg;
1156 struct tty *tp;
1158 if (!device_is_active(sc->sc_dev))
1159 return;
1161 tp = sc->sc_tty;
1163 if (sc->sc_rx_ready) {
1164 sc->sc_rx_ready = 0;
1165 scif_rxsoft(sc, tp);
1168 #if 0
1169 if (sc->sc_st_check) {
1170 sc->sc_st_check = 0;
1171 scif_stsoft(sc, tp);
1173 #endif
1175 if (sc->sc_tx_done) {
1176 sc->sc_tx_done = 0;
1177 scif_txsoft(sc, tp);
1181 static int
1182 scifintr(void *arg)
1184 struct scif_softc *sc = arg;
1185 u_char *put, *end;
1186 u_int cc;
1187 u_short ssr2;
1188 int count;
1190 if (!device_is_active(sc->sc_dev))
1191 return (0);
1193 end = sc->sc_ebuf;
1194 put = sc->sc_rbput;
1195 cc = sc->sc_rbavail;
1197 do {
1198 ssr2 = scif_ssr_read();
1199 if (ISSET(ssr2, SCSSR2_BRK)) {
1200 scif_ssr_write(scif_ssr_read()
1201 & ~(SCSSR2_ER | SCSSR2_BRK | SCSSR2_DR));
1202 #ifdef DDB
1203 if (ISSET(sc->sc_hwflags, SCIF_HW_CONSOLE)) {
1204 console_debugger();
1206 #endif /* DDB */
1207 #ifdef KGDB
1208 if (ISSET(sc->sc_hwflags, SCIF_HW_KGDB)) {
1209 kgdb_connect(1);
1211 #endif /* KGDB */
1213 count = scif_fdr_read() & SCFDR2_RECVCNT;
1214 if (count != 0) {
1215 for (;;) {
1216 u_char c = scif_frdr_read();
1217 u_char err = (u_char)(scif_ssr_read() & 0x00ff);
1219 scif_ssr_write(scif_ssr_read()
1220 & ~(SCSSR2_ER | SCSSR2_RDF | SCSSR2_DR));
1221 #ifdef SH4
1222 if (CPU_IS_SH4)
1223 scif_lsr_write(scif_lsr_read()
1224 & ~SCLSR2_ORER);
1225 #endif
1226 if ((cc > 0) && (count > 0)) {
1227 put[0] = c;
1228 put[1] = err;
1229 put += 2;
1230 if (put >= end)
1231 put = sc->sc_rbuf;
1232 cc--;
1233 count--;
1234 } else
1235 break;
1239 * Current string of incoming characters ended because
1240 * no more data was available or we ran out of space.
1241 * Schedule a receive event if any data was received.
1242 * If we're out of space, turn off receive interrupts.
1244 sc->sc_rbput = put;
1245 sc->sc_rbavail = cc;
1246 if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED))
1247 sc->sc_rx_ready = 1;
1250 * See if we are in danger of overflowing a buffer. If
1251 * so, use hardware flow control to ease the pressure.
1253 if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) &&
1254 cc < sc->sc_r_hiwat) {
1255 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED);
1256 #if 0
1257 scif_hwiflow(sc);
1258 #endif
1262 * If we're out of space, disable receive interrupts
1263 * until the queue has drained a bit.
1265 if (!cc) {
1266 SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED);
1267 scif_scr_write(scif_scr_read() & ~SCSCR2_RIE);
1269 } else {
1270 if (scif_ssr_read() & (SCSSR2_RDF | SCSSR2_DR)) {
1271 scif_scr_write(scif_scr_read()
1272 & ~(SCSCR2_TIE | SCSCR2_RIE));
1273 delay(10);
1274 scif_scr_write(scif_scr_read()
1275 | SCSCR2_TIE | SCSCR2_RIE);
1276 continue;
1279 } while (scif_ssr_read() & (SCSSR2_RDF | SCSSR2_DR));
1281 #if 0
1282 msr = bus_space_read_1(iot, ioh, scif_msr);
1283 delta = msr ^ sc->sc_msr;
1284 sc->sc_msr = msr;
1285 if (ISSET(delta, sc->sc_msr_mask)) {
1286 SET(sc->sc_msr_delta, delta);
1289 * Pulse-per-second clock signal on edge of DCD?
1291 if (ISSET(delta, sc->sc_ppsmask)) {
1292 struct timeval tv;
1293 if (ISSET(msr, sc->sc_ppsmask) ==
1294 sc->sc_ppsassert) {
1295 /* XXX nanotime() */
1296 microtime(&tv);
1297 TIMEVAL_TO_TIMESPEC(&tv,
1298 &sc->ppsinfo.assert_timestamp);
1299 if (sc->ppsparam.mode & PPS_OFFSETASSERT) {
1300 timespecadd(&sc->ppsinfo.assert_timestamp,
1301 &sc->ppsparam.assert_offset,
1302 &sc->ppsinfo.assert_timestamp);
1303 TIMESPEC_TO_TIMEVAL(&tv, &sc->ppsinfo.assert_timestamp);
1306 #ifdef PPS_SYNC
1307 if (sc->ppsparam.mode & PPS_HARDPPSONASSERT)
1308 hardpps(&tv, tv.tv_usec);
1309 #endif
1310 sc->ppsinfo.assert_sequence++;
1311 sc->ppsinfo.current_mode =
1312 sc->ppsparam.mode;
1314 } else if (ISSET(msr, sc->sc_ppsmask) ==
1315 sc->sc_ppsclear) {
1316 /* XXX nanotime() */
1317 microtime(&tv);
1318 TIMEVAL_TO_TIMESPEC(&tv,
1319 &sc->ppsinfo.clear_timestamp);
1320 if (sc->ppsparam.mode & PPS_OFFSETCLEAR) {
1321 timespecadd(&sc->ppsinfo.clear_timestamp,
1322 &sc->ppsparam.clear_offset,
1323 &sc->ppsinfo.clear_timestamp);
1324 TIMESPEC_TO_TIMEVAL(&tv, &sc->ppsinfo.clear_timestamp);
1327 #ifdef PPS_SYNC
1328 if (sc->ppsparam.mode & PPS_HARDPPSONCLEAR)
1329 hardpps(&tv, tv.tv_usec);
1330 #endif
1331 sc->ppsinfo.clear_sequence++;
1332 sc->ppsinfo.current_mode =
1333 sc->ppsparam.mode;
1338 * Stop output immediately if we lose the output
1339 * flow control signal or carrier detect.
1341 if (ISSET(~msr, sc->sc_msr_mask)) {
1342 sc->sc_tbc = 0;
1343 sc->sc_heldtbc = 0;
1344 #ifdef SCIF_DEBUG
1345 if (scif_debug)
1346 scifstatus(sc, "scifintr ");
1347 #endif
1350 sc->sc_st_check = 1;
1352 #endif
1355 * Done handling any receive interrupts. See if data can be
1356 * transmitted as well. Schedule tx done event if no data left
1357 * and tty was marked busy.
1359 if (((scif_fdr_read() & SCFDR2_TXCNT) >> 8) != 16) { /* XXX (msaitoh) */
1361 * If we've delayed a parameter change, do it now, and restart
1362 * output.
1364 if (sc->sc_heldchange) {
1365 sc->sc_heldchange = 0;
1366 sc->sc_tbc = sc->sc_heldtbc;
1367 sc->sc_heldtbc = 0;
1370 /* Output the next chunk of the contiguous buffer, if any. */
1371 if (sc->sc_tbc > 0) {
1372 int n;
1373 int maxchars;
1374 int i;
1376 n = sc->sc_tbc;
1377 maxchars = sc->sc_fifolen -
1378 ((scif_fdr_read() & SCFDR2_TXCNT) >> 8);
1379 if (n > maxchars)
1380 n = maxchars;
1382 for (i = 0; i < n; i++) {
1383 scif_putc(*(sc->sc_tba));
1384 sc->sc_tba++;
1386 sc->sc_tbc -= n;
1387 } else {
1388 /* Disable transmit completion interrupts if necessary. */
1389 #if 0
1390 if (ISSET(sc->sc_ier, IER_ETXRDY))
1391 #endif
1392 scif_scr_write(scif_scr_read() & ~SCSCR2_TIE);
1394 if (sc->sc_tx_busy) {
1395 sc->sc_tx_busy = 0;
1396 sc->sc_tx_done = 1;
1401 /* Wake up the poller. */
1402 softint_schedule(sc->sc_si);
1404 #if NRND > 0 && defined(RND_SCIF)
1405 rnd_add_uint32(&sc->rnd_source, iir | lsr);
1406 #endif
1408 return (1);
1411 void
1412 scifcnprobe(struct consdev *cp)
1414 int maj;
1416 /* locate the major number */
1417 maj = cdevsw_lookup_major(&scif_cdevsw);
1419 /* Initialize required fields. */
1420 cp->cn_dev = makedev(maj, 0);
1421 #ifdef SCIFCONSOLE
1422 cp->cn_pri = CN_REMOTE;
1423 #else
1424 cp->cn_pri = CN_NORMAL;
1425 #endif
1428 void
1429 scifcninit(struct consdev *cp)
1432 InitializeScif(scifcn_speed);
1433 scifisconsole = 1;
1437 scifcngetc(dev_t dev)
1439 int c;
1440 int s;
1442 s = splserial();
1443 c = scif_getc();
1444 splx(s);
1446 return (c);
1449 void
1450 scifcnputc(dev_t dev, int c)
1452 int s;
1454 s = splserial();
1455 scif_putc((u_char)c);
1456 splx(s);
1459 #ifdef KGDB
1461 scif_kgdb_init(void)
1464 if (strcmp(kgdb_devname, "scif") != 0)
1465 return (1);
1467 if (scifisconsole)
1468 return (1); /* can't share with console */
1470 InitializeScif(kgdb_rate);
1472 kgdb_attach((int (*)(void *))scifcngetc,
1473 (void (*)(void *, int))scifcnputc, NULL);
1474 kgdb_dev = 123; /* unneeded, only to satisfy some tests */
1475 kgdb_attached = 1;
1477 return (0);
1479 #endif /* KGDB */