1 /* $NetBSD: pte.h,v 1.11 2006/03/04 01:55:03 uwe Exp $ */
4 * Copyright (c) 2002 The NetBSD Foundation, Inc.
7 * This code is derived from software contributed to The NetBSD Foundation
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
36 * NetBSD/sh3 PTE format.
41 * [28:10][8][6:5][4][3][2][1]
44 * V SZ PR SZ C D SH WT
45 * [28:10][8][7][6:5][4][3][2][1][0]
48 * [31] - PMAP_WIRED bit (not hardware wired entry)
49 * [11:9] - SH4 PCMCIA Assistant bit. (space attribute bit only)
55 #define PG_PPN 0x1ffff000 /* Physical page number mask */
56 #define PG_V 0x00000100 /* Valid */
57 #define PG_PR_MASK 0x00000060 /* Page protection mask */
58 #define PG_PR_URW 0x00000060 /* kernel/user read/write */
59 #define PG_PR_URO 0x00000040 /* kernel/user read only */
60 #define PG_PR_KRW 0x00000020 /* kernel read/write */
61 #define PG_PR_KRO 0x00000000 /* kernel read only */
62 #define PG_4K 0x00000010 /* page size 4KB */
63 #define PG_C 0x00000008 /* Cacheable */
64 #define PG_D 0x00000004 /* Dirty */
65 #define PG_SH 0x00000002 /* Share status */
66 #define PG_WT 0x00000001 /* Write-through (SH4 only) */
68 #define PG_HW_BITS 0x1ffff17e /* [28:12][8][6:1] */
73 #define _PG_WIRED 0x80000000
75 /* SH4 PCMCIA MMU support bits */
76 /* PTEA SA (Space Attribute bit) */
77 #define _PG_PCMCIA 0x00000e00 /* [11:9] */
78 #define _PG_PCMCIA_SHIFT 9
79 #define _PG_PCMCIA_NONE 0x00000000 /* Non PCMCIA space */
80 #define _PG_PCMCIA_IO 0x00000200 /* IOIS16 signal */
81 #define _PG_PCMCIA_IO8 0x00000400 /* 8 bit I/O */
82 #define _PG_PCMCIA_IO16 0x00000600 /* 16 bit I/O */
83 #define _PG_PCMCIA_MEM8 0x00000800 /* 8 bit common memory */
84 #define _PG_PCMCIA_MEM16 0x00000a00 /* 16 bit common memory */
85 #define _PG_PCMCIA_ATTR8 0x00000c00 /* 8 bit attribute */
86 #define _PG_PCMCIA_ATTR16 0x00000e00 /* 16 bit attribute */
89 typedef uint32_t pt_entry_t
;
91 #endif /* !_SH3_PTE_H_ */