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[netbsd-mini2440.git] / sys / arch / shark / include / irqhandler.h
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1 /* $NetBSD$ */
3 /*
4 * Copyright (c) 1994-1996 Mark Brinicombe.
5 * Copyright (c) 1994 Brini.
6 * All rights reserved.
8 * This code is derived from software written for Brini by Mark Brinicombe
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by Mark Brinicombe
21 * for the NetBSD Project.
22 * 4. The name of the company nor the name of the author may be used to
23 * endorse or promote products derived from this software without specific
24 * prior written permission.
26 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
27 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
28 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
29 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
30 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
31 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
32 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
33 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
34 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
35 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
36 * SUCH DAMAGE.
38 * IRQ related stuff (defines + structures)
40 * Created : 30/09/94
43 #ifndef _ARM32_IRQHANDLER_H_
44 #define _ARM32_IRQHANDLER_H_
46 #ifndef _LOCORE
47 #include <sys/types.h>
48 #include <sys/evcnt.h>
49 #endif /* _LOCORE */
51 /* Define the IRQ bits */
54 * XXX this is really getting rather horrible.
55 * Shortly to be replaced with system specific interrupt tables and handling
58 #ifdef OFWGENCFG
59 /* These are just made up for now! -JJK */
60 #define IRQ_TIMER0 0
61 #endif
63 #ifdef SHARK
65 * shark hardware requirements for IRQ's:
66 * IDE: 14 (hardwired)
67 * PCI: 5, 9, 10, 11, 15(mapped to UMIPCI inta, intb, intc, intd)
68 * UMIISA: 10, 11, 12
69 * SuperIO: 1, 3..12, 14, 15(all may be remapped. defaults as follows.)
70 * KBC: 1
71 * USI: 3 (UART with Slow Infrared support)
72 * UART: 4
73 * FLOPPY: 6 (not currently used on shark)
74 * PARALLEL: 7
75 * RTC: 8 (not used on shark: RTC in sequoia used)
76 * MOUSE: 12
77 * Sequoia: 8 (internal RTC hardwired to irq 8)
78 * Codec: 5, 7, 9, 10, 15 (irqe, connected to 15, has special status.)
79 * CS8900: 5, 10, 11, 12 (P.14 of datasheet sez only 1 used/time)
80 * FERR#: 13 (unconnected floating point error)
82 * total of 15 irqs:
83 * timer, ide, 2 umi = isa/pci, ethernet, 2 codec, kb, usi, uart, floppy,
84 * parallel, rtc, mouse, ferr (irq 13)
86 * eventually, need to read the OFW dev info tree, and allocate IRQs.
87 * hardcoded for now.
89 #define IRQ_TIMER0 0x00 /* hardwired to 8254 counter 0 in sequoia */
90 #define IRQ_KEYBOARD 0x01
91 #define IRQ_CASCADE 0x02 /* hardwired IRQ for second 8259 = IRQ_SLAVE */
92 #define IRQ_USI 0x03
93 #define IRQ_UART 0x04
94 #define IRQ_ETHERNET 0x05
95 #define IRQ_FLOPPY 0x06
96 #define IRQ_PARALLEL 0x07
97 #endif
99 #if defined(SHARK) || defined(OFWGENCFG)
100 #define IRQ_RTC 0x08 /* hardwired to the sequoia RTC */
101 #endif
102 #ifdef SHARK
103 #define IRQ_CODEC1 0x09
104 #define IRQ_UMI1 0x0A /* isa or pci */
105 #define IRQ_UMI2 0x0B /* isa or pci */
107 #define IRQ_MOUSE 0x0C
108 #define IRQ_FERR 0x0D /* FERR# pin on sequoia needs to be connected */
109 #define IRQ_IDE 0x0E /* hardwired to the IDE connector */
110 #define IRQ_CODEC2 0x0F /* special interrupt on codec */
111 #endif /* SHARK */
113 #define IRQ_VSYNC IRQ_FLYBACK /* Aliased */
114 #define IRQ_NETSLOT IRQ_EXTENDED
116 #define IRQ_INSTRUCT -1
117 #define NIRQS 0x20
119 #include <machine/intr.h>
121 #ifndef _LOCORE
122 typedef struct irqhandler {
123 int (*ih_func)(void *arg); /* handler function */
124 void *ih_arg; /* Argument to handler */
125 int ih_level; /* Interrupt level */
126 int ih_num; /* Interrupt number (for accounting) */
127 u_int ih_flags; /* Interrupt flags */
128 u_int ih_maskaddr; /* mask address for expansion cards */
129 u_int ih_maskbits; /* interrupt bit for expansion cards */
130 struct irqhandler *ih_next; /* next handler */
131 struct evcnt ih_ev; /* evcnt structure */
132 int (*ih_realfunc)(void *arg); /* XXX real handler function */
133 void *ih_realarg;
134 } irqhandler_t;
136 #ifdef _KERNEL
137 extern u_int irqmasks[NIPL];
138 extern irqhandler_t *irqhandlers[NIRQS];
140 void irq_init(void);
141 int irq_claim(int, irqhandler_t *, const char *group, const char *name);
142 int irq_release(int, irqhandler_t *);
143 void *intr_claim(int irq, int level, int (*func)(void *), void *arg,
144 const char *group, const char *name);
145 int intr_release(void *ih);
146 void irq_setmasks(void);
147 void disable_irq(int);
148 void enable_irq(int);
149 #endif /* _KERNEL */
150 #endif /* _LOCORE */
152 #define IRQ_FLAG_ACTIVE 0x00000001 /* This is the active handler in list */
154 #endif /* _ARM32_IRQHANDLER_H_ */
156 /* End of irqhandler.h */