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[netbsd-mini2440.git] / sys / arch / sparc / include / z8530var.h
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1 /* $NetBSD: z8530var.h,v 1.8 2006/03/04 03:39:02 uwe Exp $ */
3 /*
4 * Copyright (c) 1992, 1993
5 * The Regents of the University of California. All rights reserved.
7 * This software was developed by the Computer Systems Engineering group
8 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
9 * contributed to Berkeley.
11 * All advertising materials mentioning features or use of this software
12 * must display the following acknowledgement:
13 * This product includes software developed by the University of
14 * California, Lawrence Berkeley Laboratory.
16 * Redistribution and use in source and binary forms, with or without
17 * modification, are permitted provided that the following conditions
18 * are met:
19 * 1. Redistributions of source code must retain the above copyright
20 * notice, this list of conditions and the following disclaimer.
21 * 2. Redistributions in binary form must reproduce the above copyright
22 * notice, this list of conditions and the following disclaimer in the
23 * documentation and/or other materials provided with the distribution.
24 * 3. Neither the name of the University nor the names of its contributors
25 * may be used to endorse or promote products derived from this software
26 * without specific prior written permission.
28 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
29 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
30 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
31 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
32 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
37 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
38 * SUCH DAMAGE.
40 * @(#)zsvar.h 8.1 (Berkeley) 6/11/93
43 #include <machine/bus.h>
44 #include <dev/ic/z8530sc.h>
46 struct zsc_softc {
47 device_t zsc_dev; /* base device */
48 bus_space_tag_t zsc_bustag; /* bus space/DMA tags */
49 bus_dma_tag_t zsc_dmatag;
50 struct zs_chanstate *zsc_cs[2]; /* channel A and B soft state */
52 /* Machine-dependent part follows... */
53 int zsc_promunit; /* PROM's view of zs devices */
54 int zsc_node; /* PROM node, if any */
55 struct evcnt zsc_intrcnt; /* count interrupts */
56 struct zs_chanstate zsc_cs_store[2];
60 * Functions to read and write individual registers in a channel.
61 * The ZS chip requires a 1.6 uSec. recovery time between accesses.
62 * On the SparcStation the recovery time is handled in hardware.
63 * On the older Sun4 machine it isn't, and software must do it.
65 * However, it *is* a problem on some Sun4m's (i.e. the SS20) (XXX: why?).
66 * Thus we leave in the delay (done in the functions below).
67 * XXX: (ABB) Think about this more.
69 * The functions below could be macros instead if we are concerned
70 * about the function call overhead where ZS_DELAY does nothing.
73 uint8_t zs_read_reg(struct zs_chanstate *cs, uint8_t reg);
74 uint8_t zs_read_csr(struct zs_chanstate *cs);
75 uint8_t zs_read_data(struct zs_chanstate *cs);
77 void zs_write_reg(struct zs_chanstate *cs, uint8_t reg, uint8_t val);
78 void zs_write_csr(struct zs_chanstate *cs, uint8_t val);
79 void zs_write_data(struct zs_chanstate *cs, uint8_t val);
81 /* The sparc has splzs() in psl.h */
83 /* We want to call it "zs" instead of "zsc" (sigh). */
84 #ifndef ZSCCF_CHANNEL
85 #define ZSCCF_CHANNEL 0
86 #define ZSCCF_CHANNEL_DEFAULT -1
87 #endif
89 #undef cn_trap
90 #define cn_trap() zs_abort(NULL)