sys/arch/sparc64/include/pmap.h

   1 /*      $NetBSD: pmap.h,v 1.44 2008/12/12 18:16:58 pooka Exp $  */
   2
   3 /*-
   4  * Copyright (C) 1995, 1996 Wolfgang Solfrank.
   5  * Copyright (C) 1995, 1996 TooLs GmbH.
   6  * All rights reserved.
   7  *
   8  * Redistribution and use in source and binary forms, with or without
   9  * modification, are permitted provided that the following conditions
  10  * are met:
  11  * 1. Redistributions of source code must retain the above copyright
  12  *    notice, this list of conditions and the following disclaimer.
  13  * 2. Redistributions in binary form must reproduce the above copyright
  14  *    notice, this list of conditions and the following disclaimer in the
  15  *    documentation and/or other materials provided with the distribution.
  16  * 3. All advertising materials mentioning features or use of this software
  17  *    must display the following acknowledgement:
  18  *      This product includes software developed by TooLs GmbH.
  19  * 4. The name of TooLs GmbH may not be used to endorse or promote products
  20  *    derived from this software without specific prior written permission.
  21  *
  22  * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
  23  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  24  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  25  * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  26  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
  27  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
  28  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
  29  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
  30  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
  31  * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32  */
  33
  34 #ifndef _MACHINE_PMAP_H_
  35 #define _MACHINE_PMAP_H_
  36
  37 #ifndef _LOCORE
  38 #include <machine/pte.h>
  39 #include <sys/queue.h>
  40 #include <uvm/uvm_object.h>
  41 #ifdef _KERNEL
  42 #include <machine/cpuset.h>
  43 #endif
  44 #endif
  45
  46 /*
  47  * This scheme uses 2-level page tables.
  48  *
  49  * While we're still in 32-bit mode we do the following:
  50  *
  51  *   offset:                                            13 bits
  52  * 1st level: 1024 64-bit TTEs in an 8K page for        10 bits
  53  * 2nd level: 512 32-bit pointers in the pmap for        9 bits
  54  *                                                      -------
  55  * total:                                               32 bits
  56  *
  57  * In 64-bit mode the Spitfire and Blackbird CPUs support only
  58  * 44-bit virtual addresses.  All addresses between
  59  * 0x0000 07ff ffff ffff and 0xffff f800 0000 0000 are in the
  60  * "VA hole" and trap, so we don't have to track them.  However,
  61  * we do need to keep them in mind during PT walking.  If they
  62  * ever change the size of the address "hole" we need to rework
  63  * all the page table handling.
  64  *
  65  *   offset:                                            13 bits
  66  * 1st level: 1024 64-bit TTEs in an 8K page for        10 bits
  67  * 2nd level: 1024 64-bit pointers in an 8K page for    10 bits
  68  * 3rd level: 1024 64-bit pointers in the segmap for    10 bits
  69  *                                                      -------
  70  * total:                                               43 bits
  71  *
  72  * Of course, this means for 32-bit spaces we always have a (practically)
  73  * wasted page for the segmap (only one entry used) and half a page wasted
  74  * for the page directory.  We still have need of one extra bit 8^(.
  75  */
  76
  77 #define HOLESHIFT       (43)
  78
  79 #define PTSZ    (PAGE_SIZE/8)                   /* page table entry */
  80 #define PDSZ    (PTSZ)                          /* page directory */
  81 #define STSZ    (PTSZ)                          /* psegs */
  82
  83 #define PTSHIFT         (13)
  84 #define PDSHIFT         (10+PTSHIFT)
  85 #define STSHIFT         (10+PDSHIFT)
  86
  87 #define PTMASK          (PTSZ-1)
  88 #define PDMASK          (PDSZ-1)
  89 #define STMASK          (STSZ-1)
  90
  91 #ifndef _LOCORE
  92
  93 /*
  94  * Support for big page sizes.  This maps the page size to the
  95  * page bits.
  96  */
  97 struct page_size_map {
  98         uint64_t mask;
  99         uint64_t code;
 100 #ifdef DEBUG
 101         uint64_t use;
 102 #endif
 103 };
 104 extern struct page_size_map page_size_map[];
 105
 106 /*
 107  * Pmap stuff
 108  */
 109
 110 #define va_to_seg(v)    (int)((((paddr_t)(v))>>STSHIFT)&STMASK)
 111 #define va_to_dir(v)    (int)((((paddr_t)(v))>>PDSHIFT)&PDMASK)
 112 #define va_to_pte(v)    (int)((((paddr_t)(v))>>PTSHIFT)&PTMASK)
 113
 114 struct pmap {
 115         struct uvm_object pm_obj;
 116 #define pm_lock pm_obj.vmobjlock
 117 #define pm_refs pm_obj.uo_refs
 118 #ifdef MULTIPROCESSOR
 119         LIST_ENTRY(pmap) pm_list[CPUSET_MAXNUMCPU];     /* per cpu ctx used list */
 120 #else
 121         LIST_ENTRY(pmap) pm_list;       /* single ctx used list */
 122 #endif
 123
 124         struct pmap_statistics pm_stats;
 125
 126 #ifdef MULTIPROCESSOR
 127         /*
 128          * We record the context used on any cpu here. If the context
 129          * is actually present in the TLB, it will be the plain context
 130          * number. If the context is allocated, but has been flushed
 131          * from the tlb, the number will be negative.
 132          * If this pmap has no context allocated on that cpu, the entry
 133          * will be 0.
 134          */
 135         int pm_ctx[CPUSET_MAXNUMCPU];   /* Current context per cpu */
 136 #else
 137         int pm_ctx;                     /* Current context */
 138 #endif
 139
 140         /*
 141          * This contains 64-bit pointers to pages that contain
 142          * 1024 64-bit pointers to page tables.  All addresses
 143          * are physical.
 144          *
 145          * !!! Only touch this through pseg_get() and pseg_set() !!!
 146          */
 147         paddr_t pm_physaddr;    /* physical address of pm_segs */
 148         int64_t *pm_segs;
 149 };
 150
 151 /*
 152  * This comes from the PROM and is used to map prom entries.
 153  */
 154 struct prom_map {
 155         uint64_t        vstart;
 156         uint64_t        vsize;
 157         uint64_t        tte;
 158 };
 159
 160 #define PMAP_NC         0x001   /* Set the E bit in the page */
 161 #define PMAP_NVC        0x002   /* Don't enable the virtual cache */
 162 #define PMAP_LITTLE     0x004   /* Map in little endian mode */
 163 /* Large page size hints --
 164    we really should use another param to pmap_enter() */
 165 #define PMAP_8K         0x000
 166 #define PMAP_64K        0x008   /* Use 64K page */
 167 #define PMAP_512K       0x010
 168 #define PMAP_4M         0x018
 169 #define PMAP_SZ_TO_TTE(x)       (((x)&0x018)<<58)
 170 /* If these bits are different in va's to the same PA
 171    then there is an aliasing in the d$ */
 172 #define VA_ALIAS_MASK   (1 << 13)
 173
 174 #ifdef  _KERNEL
 175 #ifdef PMAP_COUNT_DEBUG
 176 /* diagnostic versions if PMAP_COUNT_DEBUG option is used */
 177 int pmap_count_res(struct pmap *);
 178 int pmap_count_wired(struct pmap *);
 179 #define pmap_resident_count(pm)         pmap_count_res((pm))
 180 #define pmap_wired_count(pm)            pmap_count_wired((pm))
 181 #else
 182 #define pmap_resident_count(pm)         ((pm)->pm_stats.resident_count)
 183 #define pmap_wired_count(pm)            ((pm)->pm_stats.wired_count)
 184 #endif
 185
 186 #define pmap_phys_address(x)            (x)
 187
 188 void pmap_activate_pmap(struct pmap *);
 189 void pmap_update(struct pmap *);
 190 void pmap_bootstrap(u_long, u_long);
 191 /* make sure all page mappings are modulo 16K to prevent d$ aliasing */
 192 #define PMAP_PREFER(pa, va, sz, td)     (*(va)+=(((*(va))^(pa))&(1<<(PGSHIFT))))
 193
 194 #define PMAP_GROWKERNEL         /* turn on pmap_growkernel interface */
 195 #define PMAP_NEED_PROCWR
 196
 197 void pmap_procwr(struct proc *, vaddr_t, size_t);
 198
 199 /* SPARC specific? */
 200 int             pmap_dumpsize(void);
 201 int             pmap_dumpmmu(int (*)(dev_t, daddr_t, void *, size_t),
 202                                  daddr_t);
 203 int             pmap_pa_exists(paddr_t);
 204 void            switchexit(struct lwp *, int);
 205 void            pmap_kprotect(vaddr_t, vm_prot_t);
 206
 207 /* SPARC64 specific */
 208 /* Assembly routines to flush TLB mappings */
 209 void sp_tlb_flush_pte(vaddr_t, int);
 210 void sp_tlb_flush_ctx(int);
 211 void sp_tlb_flush_all(void);
 212
 213 #ifdef MULTIPROCESSOR
 214 void smp_tlb_flush_pte(vaddr_t, pmap_t);
 215 #define tlb_flush_pte(va,pm)    smp_tlb_flush_pte(va, pm)
 216 #else
 217 #define tlb_flush_pte(va,pm)    sp_tlb_flush_pte(va, (pm)->pm_ctx)
 218 #endif
 219
 220 /* Installed physical memory, as discovered during bootstrap. */
 221 extern int phys_installed_size;
 222 extern struct mem_region *phys_installed;
 223
 224 #endif  /* _KERNEL */
 225
 226 #endif  /* _LOCORE */
 227 #endif  /* _MACHINE_PMAP_H_ */