sys/arch/vax/mba/mbareg.h

   1 /*      $NetBSD: mbareg.h,v 1.4 2000/06/04 18:04:39 ragge Exp $ */
   2 /*
   3  * Copyright (c) 1994 Ludd, University of Lule}, Sweden
   4  * All rights reserved.
   5  *
   6  * Redistribution and use in source and binary forms, with or without
   7  * modification, are permitted provided that the following conditions
   8  * are met:
   9  * 1. Redistributions of source code must retain the above copyright
  10  *    notice, this list of conditions and the following disclaimer.
  11  * 2. Redistributions in binary form must reproduce the above copyright
  12  *    notice, this list of conditions and the following disclaimer in the
  13  *    documentation and/or other materials provided with the distribution.
  14  * 3. All advertising materials mentioning features or use of this software
  15  *    must display the following acknowledgement:
  16  *      This product includes software developed at Ludd, University of Lule}.
  17  * 4. The name of the author may not be used to endorse or promote products
  18  *    derived from this software without specific prior written permission
  19  *
  20  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  21  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  22  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  23  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  24  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  25  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  26  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  27  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  28  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  29  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  30  */
  31
  32 #ifdef notdef
  33 struct mba_hack {
  34         u_int   pad1;
  35         u_int   md_ds;          /* unit status */
  36         u_int   pad4[2];
  37         u_int   md_as;          /* Attention summary */
  38         u_int   pad2;
  39         u_int   md_dt;          /* unit type */
  40         u_int   pad3[25];
  41 };
  42
  43 struct mba_regs {
  44         u_int   mba_csr;
  45         u_int   mba_cr;
  46         u_int   mba_sr;
  47         u_int   mba_var;
  48         u_int   mba_bc;
  49         u_int   mba_dr;
  50         u_int   mba_smr;
  51         u_int   mba_car;
  52         u_int   utrymme[248];
  53         struct  mba_hack mba_md[8];     /* unit specific regs */
  54         struct  pte mba_map[256];
  55 };
  56 #endif
  57
  58 #define MBA_CSR 0
  59 #define MBA_CR  4
  60 #define MBA_SR  8
  61 #define MBA_VAR 12
  62 #define MBA_BC  16
  63 #define MBA_DR  20
  64 #define MBA_SMR 24
  65 #define MBA_CAR 28
  66
  67 #define MUREG(dev,reg)  (1024+(dev)*128+(reg))
  68 #define MAPREG(nr)      (2048+(nr)*4)
  69
  70 #define MU_DS   4       /* unit status */
  71 #define MU_AS   16      /* attention summary */
  72 #define MU_DT   24      /* drive type */
  73
  74 /*
  75  * Different states which can be on massbus.
  76  */
  77 /* Write to mba_cr */
  78 #define MBACR_IBC       0x10
  79 #define MBACR_MMM       0x8
  80 #define MBACR_IE        0x4
  81 #define MBACR_ABORT     0x2
  82 #define MBACR_INIT      0x1
  83
  84 /* Read from mba_sr: */
  85 #define MBASR_DTBUSY    0x80000000
  86 #define MBASR_NRCONF    0x40000000
  87 #define MBASR_CRD       0x20000000
  88 #define MBASR_CBHUNG    0x800000
  89 #define MBASR_PGE       0x80000
  90 #define MBASR_NED       0x40000         /* NonExistent Drive */
  91 #define MBASR_MCPE      0x20000         /* Massbuss Control Parity Error */
  92 #define MBASR_ATTN      0x10000         /* Attention from Massbus */
  93 #define MBASR_SPE       0x4000          /* Silo Parity Error */
  94 #define MBASR_DTCMP     0x2000          /* Data Transfer CoMPleted */
  95 #define MBASR_DTABT     0x1000          /* Data Transfer ABorTed */
  96 #define MBASR_DLT       0x800           /* Data LaTe */
  97 #define MBASR_WCKUE     0x400           /* Write check upper error */
  98 #define MBASR_WCKLE     0x200           /* Write check lower error */
  99 #define MBASR_MXF       0x100           /* Miss transfer fault */
 100 #define MBASR_MBEXC     0x80            /* Massbuss exception */
 101 #define MBASR_MDPE      0x40            /* Massbuss data parity error */
 102 #define MBASR_MAPPE     0x20            /* Page frame map parity error */
 103 #define MBASR_INVMAP    0x10            /* Invalid map */
 104 #define MBASR_ERR_STAT  0x8             /* Error status */
 105 #define MBASR_ERRC      0x4             /* Error confirmation */
 106 #define MBASR_ISTIMO    0x2             /* Interface sequence timeout */
 107 #define MBASR_RDTIMO    0x1             /* Read data timeout status */
 108
 109 /* Definitions in mba_device md_ds */
 110 #define MBADS_DPR       0x100           /* Unit present */
 111
 112 /* Definitions in mba_device md_dt */
 113 #define MBADT_RP04      0x2010
 114 #define MBADT_RP05      0x2011
 115 #define MBADT_RP06      0x2012
 116 #define MBADT_RP07      0x2022
 117 #define MBADT_RM02      0x2015
 118 #define MBADT_RM03      0x2014
 119 #define MBADT_RM05      0x2017
 120 #define MBADT_RM80      0x2016
 121 #define MBADT_DRQ       0x800           /* Dual ported */
 122 #define MBADT_MOH       0x2000          /* Moving head device */