sys/arch/x68k/dev/opmvar.h

   1 /*      $NetBSD: opmvar.h,v 1.1.2.4 2005/01/24 08:35:10 skrll Exp $     */
   2
   3 /*
   4  * Copyright (c) 1995 Masanobu Saitoh, Takuya Harakawa.
   5  * All rights reserved.
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions
   9  * are met:
  10  * 1. Redistributions of source code must retain the above copyright
  11  *    notice, this list of conditions and the following disclaimer.
  12  * 2. Redistributions in binary form must reproduce the above copyright
  13  *    notice, this list of conditions and the following disclaimer in the
  14  *    documentation and/or other materials provided with the distribution.
  15  * 3. All advertising materials mentioning features or use of this software
  16  *    must display the following acknowledgement:
  17  *      This product includes software developed by Masanobu Saitoh.
  18  * 4. Neither the name of the University nor of the Laboratory may be used
  19  *    to endorse or promote products derived from this software without
  20  *    specific prior written permission.
  21  *
  22  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
  23  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  24  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  25  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
  26  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  27  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  28  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  29  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  30  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  31  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  32  * SUCH DAMAGE.
  33  */
  34
  35 #ifndef _OPMVAR_H_
  36 #define _OPMVAR_H_
  37
  38 #define OPM1B_CT1MSK    (0x80)
  39 #define OPM1B_CT2MSK    (0x40)
  40
  41 #define VS_CLK_8MHZ     (0x00)
  42 #define VS_CLK_4MHZ     (0x80)
  43
  44 #define FDCSTBY (0x00)
  45 #define FDCRDY  (0x40)
  46
  47 void adpcm_chgclk(u_char);
  48 void fdc_force_ready(u_char);
  49
  50 #endif /* !_OPMREG_H_ */