sys/arch/x86/pci/pcib.c

   1 /*      $NetBSD: pcib.c,v 1.10 2009/08/23 15:42:51 jmcneill Exp $       */
   2
   3 /*-
   4  * Copyright (c) 1996, 1998 The NetBSD Foundation, Inc.
   5  * All rights reserved.
   6  *
   7  * This code is derived from software contributed to The NetBSD Foundation
   8  * by Jason R. Thorpe.
   9  *
  10  * Redistribution and use in source and binary forms, with or without
  11  * modification, are permitted provided that the following conditions
  12  * are met:
  13  * 1. Redistributions of source code must retain the above copyright
  14  *    notice, this list of conditions and the following disclaimer.
  15  * 2. Redistributions in binary form must reproduce the above copyright
  16  *    notice, this list of conditions and the following disclaimer in the
  17  *    documentation and/or other materials provided with the distribution.
  18  *
  19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
  20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
  23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  29  * POSSIBILITY OF SUCH DAMAGE.
  30  */
  31
  32 #include <sys/cdefs.h>
  33 __KERNEL_RCSID(0, "$NetBSD: pcib.c,v 1.10 2009/08/23 15:42:51 jmcneill Exp $");
  34
  35 #include <sys/types.h>
  36 #include <sys/param.h>
  37 #include <sys/systm.h>
  38 #include <sys/device.h>
  39
  40 #include <machine/bus.h>
  41
  42 #include <dev/isa/isavar.h>
  43
  44 #include <dev/pci/pcivar.h>
  45 #include <dev/pci/pcireg.h>
  46
  47 #include <dev/pci/pcidevs.h>
  48
  49 #include "isa.h"
  50 #include "pcibvar.h"
  51
  52 int     pcibmatch(device_t, cfdata_t, void *);
  53
  54 CFATTACH_DECL3_NEW(pcib, sizeof(struct pcib_softc),
  55     pcibmatch, pcibattach, pcibdetach, NULL, pcibrescan, pcibchilddet,
  56     DVF_DETACH_SHUTDOWN);
  57
  58 void    pcib_callback(device_t);
  59
  60 int
  61 pcibmatch(device_t parent, cfdata_t match, void *aux)
  62 {
  63         struct pci_attach_args *pa = aux;
  64
  65 #if 0
  66         /*
  67          * PCI-ISA bridges are matched on class/subclass.
  68          * This list contains only the bridges where correct
  69          * (or incorrect) behaviour is not yet confirmed.
  70          */
  71         switch (PCI_VENDOR(pa->pa_id)) {
  72         case PCI_VENDOR_INTEL:
  73                 switch (PCI_PRODUCT(pa->pa_id)) {
  74                 case PCI_PRODUCT_INTEL_82426EX:
  75                 case PCI_PRODUCT_INTEL_82380AB:
  76                         return (1);
  77                 }
  78                 break;
  79
  80         case PCI_VENDOR_UMC:
  81                 switch (PCI_PRODUCT(pa->pa_id)) {
  82                 case PCI_PRODUCT_UMC_UM8886F:
  83                 case PCI_PRODUCT_UMC_UM82C886:
  84                         return (1);
  85                 }
  86                 break;
  87         case PCI_VENDOR_ALI:
  88                 switch (PCI_PRODUCT(pa->pa_id)) {
  89                 case PCI_PRODUCT_ALI_M1449:
  90                 case PCI_PRODUCT_ALI_M1543:
  91                         return (1);
  92                 }
  93                 break;
  94         case PCI_VENDOR_COMPAQ:
  95                 switch (PCI_PRODUCT(pa->pa_id)) {
  96                 case PCI_PRODUCT_COMPAQ_PCI_ISA_BRIDGE:
  97                         return (1);
  98                 }
  99                 break;
 100         case PCI_VENDOR_VIATECH:
 101                 switch (PCI_PRODUCT(pa->pa_id)) {
 102                 case PCI_PRODUCT_VIATECH_VT82C570MV:
 103                 case PCI_PRODUCT_VIATECH_VT82C586_ISA:
 104                         return (1);
 105                 }
 106                 break;
 107         }
 108 #endif
 109
 110         /*
 111          * some special cases:
 112          */
 113         switch (PCI_VENDOR(pa->pa_id)) {
 114         case PCI_VENDOR_INTEL:
 115                 switch (PCI_PRODUCT(pa->pa_id)) {
 116                 case PCI_PRODUCT_INTEL_SIO:
 117                         /*
 118                          * The Intel SIO identifies itself as a
 119                          * miscellaneous prehistoric.
 120                          */
 121                 case PCI_PRODUCT_INTEL_82371MX:
 122                         /*
 123                          * The Intel 82371MX identifies itself erroneously as a
 124                          * miscellaneous bridge.
 125                          */
 126                 case PCI_PRODUCT_INTEL_82371AB_ISA:
 127                         /*
 128                          * Some Intel 82371AB PCI-ISA bridge identifies
 129                          * itself as miscellaneous bridge.
 130                          */
 131                         return (1);
 132                 }
 133                 break;
 134         case PCI_VENDOR_SIS:
 135                 switch (PCI_PRODUCT(pa->pa_id)) {
 136                 case PCI_PRODUCT_SIS_85C503:
 137                         /*
 138                          * The SIS 85C503 identifies itself as a
 139                          * miscellaneous prehistoric.
 140                          */
 141                         return (1);
 142                 }
 143                 break;
 144         case PCI_VENDOR_VIATECH:
 145                 switch (PCI_PRODUCT(pa->pa_id)) {
 146                 case PCI_PRODUCT_VIATECH_VT82C686A_SMB:
 147                         /*
 148                          * The VIA VT82C686A SMBus Controller itself as
 149                          * ISA bridge, but it's wrong !
 150                          */
 151                         return (0);
 152                 }
 153         /*
 154          * The Cyrix cs5530 PCI host bridge does not have a broken
 155          * latch on the i8254 clock core, unlike its predecessors
 156          * the cs5510 and cs5520. This reverses the setting from
 157          * i386/i386/identcpu.c where it arguably should not have
 158          * been set in the first place. XXX
 159          */
 160         case PCI_VENDOR_CYRIX:
 161                 switch (PCI_PRODUCT(pa->pa_id)) {
 162                 case PCI_PRODUCT_CYRIX_CX5530_PCIB:
 163 #if !defined(XEN)
 164                         {
 165                                 extern int clock_broken_latch;
 166
 167                                 clock_broken_latch = 0;
 168                         }
 169 #endif
 170                         return(1);
 171                 }
 172                 break;
 173         }
 174
 175         if (PCI_CLASS(pa->pa_class) == PCI_CLASS_BRIDGE &&
 176             PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_BRIDGE_ISA) {
 177                 return (1);
 178         }
 179
 180         return (0);
 181 }
 182
 183 void
 184 pcibattach(device_t parent, device_t self, void *aux)
 185 {
 186         struct pcib_softc *sc = device_private(self);
 187         struct pci_attach_args *pa = aux;
 188         char devinfo[256];
 189
 190         aprint_naive("\n");
 191
 192         /*
 193          * Just print out a description and defer configuration
 194          * until all PCI devices have been attached.
 195          */
 196         pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo));
 197         aprint_normal(": %s (rev. 0x%02x)\n", devinfo,
 198             PCI_REVISION(pa->pa_class));
 199
 200         sc->sc_pc = pa->pa_pc;
 201         sc->sc_tag = pa->pa_tag;
 202
 203         /* If a more specific pcib implementation has already registered a
 204          * power handler, don't overwrite it.
 205          */
 206         if (!device_pmf_is_registered(self)) {
 207                 if (!pmf_device_register(self, NULL, NULL))
 208                         aprint_error_dev(self, "couldn't establish power handler\n");
 209         }
 210
 211         config_defer(self, pcib_callback);
 212 }
 213
 214 int
 215 pcibdetach(device_t self, int flags)
 216 {
 217         int rc;
 218
 219         if ((rc = config_detach_children(self, flags)) != 0)
 220                 return rc;
 221         pmf_device_deregister(self);
 222         return 0;
 223 }
 224
 225 void
 226 pcibchilddet(device_t self, device_t child)
 227 {
 228         struct pcib_softc *sc = device_private(self);
 229
 230         if (sc->sc_isabus == child)
 231                 sc->sc_isabus = NULL;
 232 }
 233
 234 int
 235 pcibrescan(device_t self, const char *ifattr, const int *loc)
 236 {
 237         struct pcib_softc *sc = device_private(self);
 238         struct isabus_attach_args iba;
 239
 240         if (ifattr_match(ifattr, "isabus") && sc->sc_isabus == NULL) {
 241                 /*
 242                  * Attach the ISA bus behind this bridge.
 243                  */
 244                 memset(&iba, 0, sizeof(iba));
 245                 iba.iba_iot = X86_BUS_SPACE_IO;
 246                 iba.iba_memt = X86_BUS_SPACE_MEM;
 247 #if NISA > 0
 248                 iba.iba_dmat = &isa_bus_dma_tag;
 249 #endif
 250                 sc->sc_isabus =
 251                     config_found_ia(self, "isabus", &iba, isabusprint);
 252         }
 253         return 0;
 254 }
 255
 256 void
 257 pcib_callback(device_t self)
 258 {
 259         pcibrescan(self, "isabus", NULL);
 260 }