sys/arch/xen/include/xen3-public/hvm/params.h

   1 /* $NetBSD: params.h,v 1.3 2008/05/04 19:56:29 cegger Exp $ */
   2 /*
   3  * Permission is hereby granted, free of charge, to any person obtaining a copy
   4  * of this software and associated documentation files (the "Software"), to
   5  * deal in the Software without restriction, including without limitation the
   6  * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
   7  * sell copies of the Software, and to permit persons to whom the Software is
   8  * furnished to do so, subject to the following conditions:
   9  *
  10  * The above copyright notice and this permission notice shall be included in
  11  * all copies or substantial portions of the Software.
  12  *
  13  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  14  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  15  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
  16  * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  17  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  18  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  19  * DEALINGS IN THE SOFTWARE.
  20  */
  21
  22 #ifndef __XEN_PUBLIC_HVM_PARAMS_H__
  23 #define __XEN_PUBLIC_HVM_PARAMS_H__
  24
  25 #include "hvm_op.h"
  26
  27 /*
  28  * Parameter space for HVMOP_{set,get}_param.
  29  */
  30
  31 /*
  32  * How should CPU0 event-channel notifications be delivered?
  33  * val[63:56] == 0: val[55:0] is a delivery GSI (Global System Interrupt).
  34  * val[63:56] == 1: val[55:0] is a delivery PCI INTx line, as follows:
  35  *                  Domain = val[47:32], Bus  = val[31:16],
  36  *                  DevFn  = val[15: 8], IntX = val[ 1: 0]
  37  * If val == 0 then CPU0 event-channel notifications are not delivered.
  38  */
  39 #define HVM_PARAM_CALLBACK_IRQ 0
  40
  41 /*
  42  * These are not used by Xen. They are here for convenience of HVM-guest
  43  * xenbus implementations.
  44  */
  45 #define HVM_PARAM_STORE_PFN    1
  46 #define HVM_PARAM_STORE_EVTCHN 2
  47
  48 #define HVM_PARAM_PAE_ENABLED  4
  49
  50 #define HVM_PARAM_IOREQ_PFN    5
  51
  52 #define HVM_PARAM_BUFIOREQ_PFN 6
  53
  54 #ifdef __ia64__
  55 #define HVM_PARAM_NVRAM_FD     7
  56 #define HVM_PARAM_VHPT_SIZE    8
  57 #define HVM_PARAM_BUFPIOREQ_PFN 9
  58 #endif
  59
  60 /*
  61  * Set mode for virtual timers (currently x86 only):
  62  *  delay_for_missed_ticks (default):
  63  *   Do not advance a vcpu's time beyond the correct delivery time for
  64  *   interrupts that have been missed due to preemption. Deliver missed
  65  *   interrupts when the vcpu is rescheduled and advance the vcpu's virtual
  66  *   time stepwise for each one.
  67  *  no_delay_for_missed_ticks:
  68  *   As above, missed interrupts are delivered, but guest time always tracks
  69  *   wallclock (i.e., real) time while doing so.
  70  *  no_missed_ticks_pending:
  71  *   No missed interrupts are held pending. Instead, to ensure ticks are
  72  *   delivered at some non-zero rate, if we detect missed ticks then the
  73  *   internal tick alarm is not disabled if the VCPU is preempted during the
  74  *   next tick period.
  75  *  one_missed_tick_pending:
  76  *   Missed interrupts are collapsed together and delivered as one 'late tick'.
  77  *   Guest time always tracks wallclock (i.e., real) time.
  78  */
  79 #define HVM_PARAM_TIMER_MODE   10
  80 #define HVMPTM_delay_for_missed_ticks    0
  81 #define HVMPTM_no_delay_for_missed_ticks 1
  82 #define HVMPTM_no_missed_ticks_pending   2
  83 #define HVMPTM_one_missed_tick_pending   3
  84
  85 /* Boolean: Enable virtual HPET (high-precision event timer)? (x86-only) */
  86 #define HVM_PARAM_HPET_ENABLED 11
  87
  88 /* Identity-map page directory used by Intel EPT when CR0.PG=0. */
  89 #define HVM_PARAM_IDENT_PT     12
  90
  91 /* Device Model domain, defaults to 0. */
  92 #define HVM_PARAM_DM_DOMAIN    13
  93
  94 /* ACPI S state: currently support S0 and S3 on x86. */
  95 #define HVM_PARAM_ACPI_S_STATE 14
  96
  97 #define HVM_NR_PARAMS          15
  98
  99 #endif /* __XEN_PUBLIC_HVM_PARAMS_H__ */