1 /* $NetBSD: trace.h,v 1.6 2008/05/04 19:56:28 cegger Exp $ */
2 /******************************************************************************
3 * include/public/trace.h
5 * Permission is hereby granted, free of charge, to any person obtaining a copy
6 * of this software and associated documentation files (the "Software"), to
7 * deal in the Software without restriction, including without limitation the
8 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
9 * sell copies of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice shall be included in
13 * all copies or substantial portions of the Software.
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
18 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
23 * Mark Williamson, (C) 2004 Intel Research Cambridge
24 * Copyright (C) 2005 Bin Ren
27 #ifndef __XEN_PUBLIC_TRACE_H__
28 #define __XEN_PUBLIC_TRACE_H__
30 #define TRACE_EXTRA_MAX 7
31 #define TRACE_EXTRA_SHIFT 28
34 #define TRC_CLS_SHIFT 16
35 #define TRC_GEN 0x0001f000 /* General trace */
36 #define TRC_SCHED 0x0002f000 /* Xen Scheduler trace */
37 #define TRC_DOM0OP 0x0004f000 /* Xen DOM0 operation trace */
38 #define TRC_HVM 0x0008f000 /* Xen HVM trace */
39 #define TRC_MEM 0x0010f000 /* Xen memory trace */
40 #define TRC_PV 0x0020f000 /* Xen PV traces */
41 #define TRC_ALL 0x0ffff000
42 #define TRC_HD_TO_EVENT(x) ((x)&0x0fffffff)
43 #define TRC_HD_CYCLE_FLAG (1UL<<31)
44 #define TRC_HD_INCLUDES_CYCLE_COUNT(x) ( !!( (x) & TRC_HD_CYCLE_FLAG ) )
45 #define TRC_HD_EXTRA(x) (((x)>>TRACE_EXTRA_SHIFT)&TRACE_EXTRA_MAX)
47 /* Trace subclasses */
48 #define TRC_SUBCLS_SHIFT 12
50 /* trace subclasses for SVM */
51 #define TRC_HVM_ENTRYEXIT 0x00081000 /* VMENTRY and #VMEXIT */
52 #define TRC_HVM_HANDLER 0x00082000 /* various HVM handlers */
54 /* Trace events per class */
55 #define TRC_LOST_RECORDS (TRC_GEN + 1)
56 #define TRC_TRACE_WRAP_BUFFER (TRC_GEN + 2)
57 #define TRC_TRACE_CPU_CHANGE (TRC_GEN + 3)
59 #define TRC_SCHED_DOM_ADD (TRC_SCHED + 1)
60 #define TRC_SCHED_DOM_REM (TRC_SCHED + 2)
61 #define TRC_SCHED_SLEEP (TRC_SCHED + 3)
62 #define TRC_SCHED_WAKE (TRC_SCHED + 4)
63 #define TRC_SCHED_YIELD (TRC_SCHED + 5)
64 #define TRC_SCHED_BLOCK (TRC_SCHED + 6)
65 #define TRC_SCHED_SHUTDOWN (TRC_SCHED + 7)
66 #define TRC_SCHED_CTL (TRC_SCHED + 8)
67 #define TRC_SCHED_ADJDOM (TRC_SCHED + 9)
68 #define TRC_SCHED_SWITCH (TRC_SCHED + 10)
69 #define TRC_SCHED_S_TIMER_FN (TRC_SCHED + 11)
70 #define TRC_SCHED_T_TIMER_FN (TRC_SCHED + 12)
71 #define TRC_SCHED_DOM_TIMER_FN (TRC_SCHED + 13)
72 #define TRC_SCHED_SWITCH_INFPREV (TRC_SCHED + 14)
73 #define TRC_SCHED_SWITCH_INFNEXT (TRC_SCHED + 15)
75 #define TRC_MEM_PAGE_GRANT_MAP (TRC_MEM + 1)
76 #define TRC_MEM_PAGE_GRANT_UNMAP (TRC_MEM + 2)
77 #define TRC_MEM_PAGE_GRANT_TRANSFER (TRC_MEM + 3)
79 #define TRC_PV_HYPERCALL (TRC_PV + 1)
80 #define TRC_PV_TRAP (TRC_PV + 3)
81 #define TRC_PV_PAGE_FAULT (TRC_PV + 4)
82 #define TRC_PV_FORCED_INVALID_OP (TRC_PV + 5)
83 #define TRC_PV_EMULATE_PRIVOP (TRC_PV + 6)
84 #define TRC_PV_EMULATE_4GB (TRC_PV + 7)
85 #define TRC_PV_MATH_STATE_RESTORE (TRC_PV + 8)
86 #define TRC_PV_PAGING_FIXUP (TRC_PV + 9)
87 #define TRC_PV_GDT_LDT_MAPPING_FAULT (TRC_PV + 10)
88 #define TRC_PV_PTWR_EMULATION (TRC_PV + 11)
89 #define TRC_PV_PTWR_EMULATION_PAE (TRC_PV + 12)
90 /* Indicates that addresses in trace record are 64 bits */
91 #define TRC_64_FLAG (0x100)
93 /* trace events per subclass */
94 #define TRC_HVM_VMENTRY (TRC_HVM_ENTRYEXIT + 0x01)
95 #define TRC_HVM_VMEXIT (TRC_HVM_ENTRYEXIT + 0x02)
96 #define TRC_HVM_VMEXIT64 (TRC_HVM_ENTRYEXIT + TRC_64_FLAG + 0x02)
97 #define TRC_HVM_PF_XEN (TRC_HVM_HANDLER + 0x01)
98 #define TRC_HVM_PF_XEN64 (TRC_HVM_HANDLER + TRC_64_FLAG + 0x01)
99 #define TRC_HVM_PF_INJECT (TRC_HVM_HANDLER + 0x02)
100 #define TRC_HVM_PF_INJECT64 (TRC_HVM_HANDLER + TRC_64_FLAG + 0x02)
101 #define TRC_HVM_INJ_EXC (TRC_HVM_HANDLER + 0x03)
102 #define TRC_HVM_INJ_VIRQ (TRC_HVM_HANDLER + 0x04)
103 #define TRC_HVM_REINJ_VIRQ (TRC_HVM_HANDLER + 0x05)
104 #define TRC_HVM_IO_READ (TRC_HVM_HANDLER + 0x06)
105 #define TRC_HVM_IO_WRITE (TRC_HVM_HANDLER + 0x07)
106 #define TRC_HVM_CR_READ (TRC_HVM_HANDLER + 0x08)
107 #define TRC_HVM_CR_READ64 (TRC_HVM_HANDLER + TRC_64_FLAG + 0x08)
108 #define TRC_HVM_CR_WRITE (TRC_HVM_HANDLER + 0x09)
109 #define TRC_HVM_CR_WRITE64 (TRC_HVM_HANDLER + TRC_64_FLAG + 0x09)
110 #define TRC_HVM_DR_READ (TRC_HVM_HANDLER + 0x0A)
111 #define TRC_HVM_DR_WRITE (TRC_HVM_HANDLER + 0x0B)
112 #define TRC_HVM_MSR_READ (TRC_HVM_HANDLER + 0x0C)
113 #define TRC_HVM_MSR_WRITE (TRC_HVM_HANDLER + 0x0D)
114 #define TRC_HVM_CPUID (TRC_HVM_HANDLER + 0x0E)
115 #define TRC_HVM_INTR (TRC_HVM_HANDLER + 0x0F)
116 #define TRC_HVM_NMI (TRC_HVM_HANDLER + 0x10)
117 #define TRC_HVM_SMI (TRC_HVM_HANDLER + 0x11)
118 #define TRC_HVM_VMMCALL (TRC_HVM_HANDLER + 0x12)
119 #define TRC_HVM_HLT (TRC_HVM_HANDLER + 0x13)
120 #define TRC_HVM_INVLPG (TRC_HVM_HANDLER + 0x14)
121 #define TRC_HVM_INVLPG64 (TRC_HVM_HANDLER + TRC_64_FLAG + 0x14)
122 #define TRC_HVM_MCE (TRC_HVM_HANDLER + 0x15)
123 #define TRC_HVM_IO_ASSIST (TRC_HVM_HANDLER + 0x16)
124 #define TRC_HVM_MMIO_ASSIST (TRC_HVM_HANDLER + 0x17)
125 #define TRC_HVM_CLTS (TRC_HVM_HANDLER + 0x18)
126 #define TRC_HVM_LMSW (TRC_HVM_HANDLER + 0x19)
127 #define TRC_HVM_LMSW64 (TRC_HVM_HANDLER + TRC_64_FLAG + 0x19)
129 /* This structure represents a single trace buffer record. */
132 uint32_t extra_u32
:3; /* # entries in trailing extra_u32[] array */
133 uint32_t cycles_included
:1; /* u.cycles or u.no_cycles? */
136 uint32_t cycles_lo
, cycles_hi
; /* cycle counter timestamp */
137 uint32_t extra_u32
[7]; /* event data items */
140 uint32_t extra_u32
[7]; /* event data items */
146 * This structure contains the metadata for a single trace buffer. The head
147 * field, indexes into an array of struct t_rec's.
150 /* Assume the data buffer size is X. X is generally not a power of 2.
151 * CONS and PROD are incremented modulo (2*X):
154 * This is done because addition modulo X breaks at 2^32 when X is not a
156 * (((2^32 - 1) % X) + 1) % X != (2^32) % X
158 uint32_t cons
; /* Offset of next item to be consumed by control tools. */
159 uint32_t prod
; /* Offset of next item to be produced by Xen. */
160 /* Records follow immediately after the meta-data header. */
163 #endif /* __XEN_PUBLIC_TRACE_H__ */
171 * indent-tabs-mode: nil