sys/dev/i2c/m41t00.c

   1 /*      $NetBSD: m41t00.c,v 1.15 2008/06/08 03:49:26 tsutsui Exp $      */
   2
   3 /*
   4  * Copyright (c) 2003 Wasabi Systems, Inc.
   5  * All rights reserved.
   6  *
   7  * Written by Steve C. Woodford and Jason R. Thorpe for Wasabi Systems, Inc.
   8  *
   9  * Redistribution and use in source and binary forms, with or without
  10  * modification, are permitted provided that the following conditions
  11  * are met:
  12  * 1. Redistributions of source code must retain the above copyright
  13  *    notice, this list of conditions and the following disclaimer.
  14  * 2. Redistributions in binary form must reproduce the above copyright
  15  *    notice, this list of conditions and the following disclaimer in the
  16  *    documentation and/or other materials provided with the distribution.
  17  * 3. All advertising materials mentioning features or use of this software
  18  *    must display the following acknowledgement:
  19  *      This product includes software developed for the NetBSD Project by
  20  *      Wasabi Systems, Inc.
  21  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
  22  *    or promote products derived from this software without specific prior
  23  *    written permission.
  24  *
  25  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
  26  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  27  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  28  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
  29  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  30  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  31  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  32  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  33  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  34  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  35  * POSSIBILITY OF SUCH DAMAGE.
  36  */
  37
  38 #include <sys/cdefs.h>
  39 __KERNEL_RCSID(0, "$NetBSD: m41t00.c,v 1.15 2008/06/08 03:49:26 tsutsui Exp $");
  40
  41 #include <sys/param.h>
  42 #include <sys/systm.h>
  43 #include <sys/device.h>
  44 #include <sys/kernel.h>
  45 #include <sys/fcntl.h>
  46 #include <sys/uio.h>
  47 #include <sys/conf.h>
  48 #include <sys/proc.h>
  49 #include <sys/event.h>
  50
  51 #include <sys/bus.h>
  52
  53 #include <dev/clock_subr.h>
  54
  55 #include <dev/i2c/i2cvar.h>
  56 #include <dev/i2c/m41t00reg.h>
  57
  58 struct m41t00_softc {
  59         device_t sc_dev;
  60         i2c_tag_t sc_tag;
  61         int sc_address;
  62         int sc_open;
  63         struct todr_chip_handle sc_todr;
  64 };
  65
  66 static int  m41t00_match(device_t, cfdata_t, void *);
  67 static void m41t00_attach(device_t, device_t, void *);
  68
  69 CFATTACH_DECL_NEW(m41trtc, sizeof(struct m41t00_softc),
  70         m41t00_match, m41t00_attach, NULL, NULL);
  71 extern struct cfdriver m41trtc_cd;
  72
  73 dev_type_open(m41t00_open);
  74 dev_type_close(m41t00_close);
  75 dev_type_read(m41t00_read);
  76 dev_type_write(m41t00_write);
  77
  78 const struct cdevsw m41t00_cdevsw = {
  79         m41t00_open, m41t00_close, m41t00_read, m41t00_write, noioctl,
  80         nostop, notty, nopoll, nommap, nokqfilter, D_OTHER
  81 };
  82
  83 static int m41t00_clock_read(struct m41t00_softc *, struct clock_ymdhms *);
  84 static int m41t00_clock_write(struct m41t00_softc *, struct clock_ymdhms *);
  85 static int m41t00_gettime(struct todr_chip_handle *, struct timeval *);
  86 static int m41t00_settime(struct todr_chip_handle *, struct timeval *);
  87
  88 int
  89 m41t00_match(device_t parent, cfdata_t cf, void *aux)
  90 {
  91         struct i2c_attach_args *ia = aux;
  92
  93         if (ia->ia_addr == M41T00_ADDR) {
  94                 return 1;
  95         }
  96
  97         return 0;
  98 }
  99
 100 void
 101 m41t00_attach(device_t parent, device_t self, void *aux)
 102 {
 103         struct m41t00_softc *sc = device_private(self);
 104         struct i2c_attach_args *ia = aux;
 105
 106         sc->sc_tag = ia->ia_tag;
 107         sc->sc_address = ia->ia_addr;
 108         sc->sc_dev = self;
 109
 110         aprint_naive(": Real-time Clock\n");
 111         aprint_normal(": M41T00 Real-time Clock\n");
 112
 113         sc->sc_open = 0;
 114         sc->sc_todr.cookie = sc;
 115         sc->sc_todr.todr_gettime = m41t00_gettime;
 116         sc->sc_todr.todr_settime = m41t00_settime;
 117         sc->sc_todr.todr_setwen = NULL;
 118
 119         todr_attach(&sc->sc_todr);
 120 }
 121
 122 /*ARGSUSED*/
 123 int
 124 m41t00_open(dev_t dev, int flag, int fmt, struct lwp *l)
 125 {
 126         struct m41t00_softc *sc;
 127
 128         if ((sc = device_lookup_private(&m41trtc_cd, minor(dev))) == NULL)
 129                 return ENXIO;
 130
 131         /* XXX: Locking */
 132
 133         if (sc->sc_open)
 134                 return EBUSY;
 135
 136         sc->sc_open = 1;
 137         return 0;
 138 }
 139
 140 /*ARGSUSED*/
 141 int
 142 m41t00_close(dev_t dev, int flag, int fmt, struct lwp *l)
 143 {
 144         struct m41t00_softc *sc;
 145
 146         if ((sc = device_lookup_private(&m41trtc_cd, minor(dev))) == NULL)
 147                 return ENXIO;
 148
 149         sc->sc_open = 0;
 150         return 0;
 151 }
 152
 153 /*ARGSUSED*/
 154 int
 155 m41t00_read(dev_t dev, struct uio *uio, int flags)
 156 {
 157         struct m41t00_softc *sc;
 158         u_int8_t ch, cmdbuf[1];
 159         int a, error;
 160
 161         if ((sc = device_lookup_private(&m41trtc_cd, minor(dev))) == NULL)
 162                 return ENXIO;
 163
 164         if (uio->uio_offset >= M41T00_NBYTES)
 165                 return EINVAL;
 166
 167         if ((error = iic_acquire_bus(sc->sc_tag, 0)) != 0)
 168                 return error;
 169
 170         while (uio->uio_resid && uio->uio_offset < M41T00_NBYTES) {
 171                 a = (int)uio->uio_offset;
 172                 cmdbuf[0] = a;
 173                 if ((error = iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
 174                                       sc->sc_address, cmdbuf, 1,
 175                                       &ch, 1, 0)) != 0) {
 176                         iic_release_bus(sc->sc_tag, 0);
 177                         aprint_error_dev(sc->sc_dev,
 178                             "m41t00_read: read failed at 0x%x\n", a);
 179                         return error;
 180                 }
 181                 if ((error = uiomove(&ch, 1, uio)) != 0) {
 182                         iic_release_bus(sc->sc_tag, 0);
 183                         return error;
 184                 }
 185         }
 186
 187         iic_release_bus(sc->sc_tag, 0);
 188
 189         return 0;
 190 }
 191
 192 /*ARGSUSED*/
 193 int
 194 m41t00_write(dev_t dev, struct uio *uio, int flags)
 195 {
 196         struct m41t00_softc *sc;
 197         u_int8_t cmdbuf[2];
 198         int a, error;
 199
 200         if ((sc = device_lookup_private(&m41trtc_cd, minor(dev))) == NULL)
 201                 return ENXIO;
 202
 203         if (uio->uio_offset >= M41T00_NBYTES)
 204                 return EINVAL;
 205
 206         if ((error = iic_acquire_bus(sc->sc_tag, 0)) != 0)
 207                 return error;
 208
 209         while (uio->uio_resid && uio->uio_offset < M41T00_NBYTES) {
 210                 a = (int)uio->uio_offset;
 211
 212                 cmdbuf[0] = a;
 213                 if ((error = uiomove(&cmdbuf[1], 1, uio)) != 0)
 214                         break;
 215
 216                 if ((error = iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP,
 217                                       sc->sc_address,
 218                                       cmdbuf, 1, &cmdbuf[1], 1, 0)) != 0) {
 219                         aprint_error_dev(sc->sc_dev,
 220                             "m41t00_write: write failed at 0x%x\n", a);
 221                         break;
 222                 }
 223         }
 224
 225         iic_release_bus(sc->sc_tag, 0);
 226
 227         return error;
 228 }
 229
 230 static int
 231 m41t00_gettime(struct todr_chip_handle *ch, struct timeval *tv)
 232 {
 233         struct m41t00_softc *sc = ch->cookie;
 234         struct clock_ymdhms dt;
 235
 236         if (m41t00_clock_read(sc, &dt) == 0)
 237                 return -1;
 238
 239         tv->tv_sec = clock_ymdhms_to_secs(&dt);
 240         tv->tv_usec = 0;
 241
 242         return 0;
 243 }
 244
 245 static int
 246 m41t00_settime(struct todr_chip_handle *ch, struct timeval *tv)
 247 {
 248         struct m41t00_softc *sc = ch->cookie;
 249         struct clock_ymdhms dt;
 250
 251         clock_secs_to_ymdhms(tv->tv_sec, &dt);
 252
 253         if (m41t00_clock_write(sc, &dt) == 0)
 254                 return -1;
 255
 256         return 0;
 257 }
 258
 259 static int m41t00_rtc_offset[] = {
 260         M41T00_SEC,
 261         M41T00_MIN,
 262         M41T00_CENHR,
 263         M41T00_DAY,
 264         M41T00_DATE,
 265         M41T00_MONTH,
 266         M41T00_YEAR,
 267 };
 268
 269 static int
 270 m41t00_clock_read(struct m41t00_softc *sc, struct clock_ymdhms *dt)
 271 {
 272         u_int8_t bcd[M41T00_NBYTES], cmdbuf[1];
 273         int i, n;
 274
 275         if (iic_acquire_bus(sc->sc_tag, I2C_F_POLL)) {
 276                 aprint_error_dev(sc->sc_dev,
 277                     "m41t00_clock_read: failed to acquire I2C bus\n");
 278                 return 0;
 279         }
 280
 281         /* Read each timekeeping register in order. */
 282         n = sizeof(m41t00_rtc_offset) / sizeof(m41t00_rtc_offset[0]);
 283         for (i = 0; i < n ; i++) {
 284                 cmdbuf[0] = m41t00_rtc_offset[i];
 285
 286                 if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
 287                              sc->sc_address, cmdbuf, 1,
 288                              &bcd[i], 1, I2C_F_POLL)) {
 289                         iic_release_bus(sc->sc_tag, I2C_F_POLL);
 290                         aprint_error_dev(sc->sc_dev,
 291                             "m41t00_clock_read: failed to read rtc "
 292                             "at 0x%x\n",
 293                             m41t00_rtc_offset[i]);
 294                         return 0;
 295                 }
 296         }
 297
 298         /* Done with I2C */
 299         iic_release_bus(sc->sc_tag, I2C_F_POLL);
 300
 301         /*
 302          * Convert the M41T00's register values into something useable
 303          */
 304         dt->dt_sec = FROMBCD(bcd[M41T00_SEC] & M41T00_SEC_MASK);
 305         dt->dt_min = FROMBCD(bcd[M41T00_MIN] & M41T00_MIN_MASK);
 306         dt->dt_hour = FROMBCD(bcd[M41T00_CENHR] & M41T00_HOUR_MASK);
 307         dt->dt_day = FROMBCD(bcd[M41T00_DATE] & M41T00_DATE_MASK);
 308         dt->dt_wday = FROMBCD(bcd[M41T00_DAY] & M41T00_DAY_MASK);
 309         dt->dt_mon = FROMBCD(bcd[M41T00_MONTH] & M41T00_MONTH_MASK);
 310         dt->dt_year = FROMBCD(bcd[M41T00_YEAR] & M41T00_YEAR_MASK);
 311
 312         /*
 313          * Since the m41t00 just stores 00-99, and this is 2003 as I write
 314          * this comment, use 2000 as a base year
 315          */
 316         dt->dt_year += 2000;
 317
 318         return 1;
 319 }
 320
 321 static int
 322 m41t00_clock_write(struct m41t00_softc *sc, struct clock_ymdhms *dt)
 323 {
 324         uint8_t bcd[M41T00_DATE_BYTES], cmdbuf[2];
 325         uint8_t init_seconds, final_seconds;
 326         int i;
 327
 328         /*
 329          * Convert our time representation into something the MAX6900
 330          * can understand.
 331          */
 332         bcd[M41T00_SEC] = TOBCD(dt->dt_sec);
 333         bcd[M41T00_MIN] = TOBCD(dt->dt_min);
 334         bcd[M41T00_CENHR] = TOBCD(dt->dt_hour);
 335         bcd[M41T00_DATE] = TOBCD(dt->dt_day);
 336         bcd[M41T00_DAY] = TOBCD(dt->dt_wday);
 337         bcd[M41T00_MONTH] = TOBCD(dt->dt_mon);
 338         bcd[M41T00_YEAR] = TOBCD(dt->dt_year % 100);
 339
 340         if (iic_acquire_bus(sc->sc_tag, I2C_F_POLL)) {
 341                 aprint_error_dev(sc->sc_dev,
 342                     "m41t00_clock_write: failed to acquire I2C bus\n");
 343                 return 0;
 344         }
 345
 346         /*
 347          * The MAX6900 RTC manual recommends ensuring "atomicity" of
 348          * a non-burst write by:
 349          *
 350          *      - writing SECONDS
 351          *      - reading back SECONDS, remembering it as "initial seconds"
 352          *      - write the remaing RTC registers
 353          *      - read back SECONDS as "final seconds"
 354          *      - if "initial seconds" == 59, ensure "final seconds" == 59
 355          *      - else, ensure "final seconds" is no more than one second
 356          *        beyond "initial seconds".
 357          *
 358          * This sounds reasonable for the M41T00, too.
 359          */
 360  again:
 361         cmdbuf[0] = M41T00_SEC;
 362         if (iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP, sc->sc_address,
 363                      cmdbuf, 1, &bcd[M41T00_SEC], 1, I2C_F_POLL)) {
 364                 iic_release_bus(sc->sc_tag, I2C_F_POLL);
 365                 aprint_error_dev(sc->sc_dev,
 366                     "m41t00_clock_write: failed to write SECONDS\n");
 367                 return 0;
 368         }
 369
 370         cmdbuf[0] = M41T00_SEC;
 371         if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, sc->sc_address,
 372                      cmdbuf, 1, &init_seconds, 1, I2C_F_POLL)) {
 373                 iic_release_bus(sc->sc_tag, I2C_F_POLL);
 374                 aprint_error_dev(sc->sc_dev,
 375                     "m41t00_clock_write: failed to read "
 376                     "INITIAL SECONDS\n");
 377                 return 0;
 378         }
 379         init_seconds = FROMBCD(init_seconds & M41T00_SEC_MASK);
 380
 381         for (i = 1; i < M41T00_DATE_BYTES; i++) {
 382                 cmdbuf[0] = m41t00_rtc_offset[i];
 383                 if (iic_exec(sc->sc_tag,
 384                              I2C_OP_WRITE_WITH_STOP, sc->sc_address,
 385                              cmdbuf, 1, &bcd[i], 1, I2C_F_POLL)) {
 386                         iic_release_bus(sc->sc_tag, I2C_F_POLL);
 387                         aprint_error_dev(sc->sc_dev,
 388                             "m41t00_clock_write: failed to write rtc "
 389                             " at 0x%x\n",
 390                             m41t00_rtc_offset[i]);
 391                         return 0;
 392                 }
 393         }
 394
 395         cmdbuf[0] = M41T00_SEC;
 396         if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, sc->sc_address,
 397                      cmdbuf, 1, &final_seconds, 1, I2C_F_POLL)) {
 398                 iic_release_bus(sc->sc_tag, I2C_F_POLL);
 399                 aprint_error_dev(sc->sc_dev,
 400                     "m41t00_clock_write: failed to read "
 401                     "FINAL SECONDS\n");
 402                 return 0;
 403         }
 404         final_seconds = FROMBCD(final_seconds & M41T00_SEC_MASK);
 405
 406         if ((init_seconds != final_seconds) &&
 407             (((init_seconds + 1) % 60) != final_seconds)) {
 408 #if 1
 409                 printf("%s: m41t00_clock_write: init %d, final %d, try again\n",
 410                     device_xname(sc->sc_dev), init_seconds, final_seconds);
 411 #endif
 412                 goto again;
 413         }
 414
 415         iic_release_bus(sc->sc_tag, I2C_F_POLL);
 416
 417         return 1;
 418 }