1 /* $NetBSD: dp8390var.h,v 1.29 2008/03/12 14:31:11 cube Exp $ */
4 * Device driver for National Semiconductor DS8390/WD83C690 based ethernet
7 * Copyright (c) 1994, 1995 Charles M. Hannum. All rights reserved.
9 * Copyright (C) 1993, David Greenman. This software may be used, modified,
10 * copied, distributed, and sold, in both source and binary form provided that
11 * the above copyright and these terms are retained. Under no circumstances is
12 * the author responsible for the proper functioning of this software, nor does
13 * the author assume any responsibility for damages incurred with its use.
22 * We include MII glue here -- some DP8390 compatible chips have
23 * MII interfaces on them (scary, isn't it...).
25 #include <dev/mii/miivar.h>
27 #define INTERFACE_NAME_LEN 32
30 * dp8390_softc: per line info and status
35 int sc_flags
; /* interface flags, from config */
37 struct ethercom sc_ec
; /* ethernet common */
38 struct mii_data sc_mii
; /* MII glue */
39 #define sc_media sc_mii.mii_media /* compatibilty definition */
41 bus_space_tag_t sc_regt
; /* NIC register space tag */
42 bus_space_handle_t sc_regh
; /* NIC register space handle */
43 bus_space_tag_t sc_buft
; /* Buffer space tag */
44 bus_space_handle_t sc_bufh
; /* Buffer space handle */
46 bus_size_t sc_reg_map
[16]; /* register map (offsets) */
48 int is790
; /* NIC is a 790 */
50 u_int8_t cr_proto
; /* values always set in CR */
51 u_int8_t rcr_proto
; /* values always set in RCR */
52 u_int8_t dcr_reg
; /* override DCR iff LS is set */
54 int mem_start
; /* offset of NIC memory */
55 int mem_end
; /* offset of NIC memory end */
56 int mem_size
; /* total shared memory size */
57 int mem_ring
; /* offset of start of RX ring-buffer */
59 u_short txb_cnt
; /* Number of transmit buffers */
60 u_short txb_inuse
; /* number of transmit buffers active */
62 u_short txb_new
; /* pointer to where new buffer will be added */
63 u_short txb_next_tx
; /* pointer to next buffer ready to xmit */
64 u_short txb_len
[8]; /* buffered xmit buffer lengths */
65 u_short tx_page_start
; /* first page of TX buffer area */
66 u_short rec_page_start
; /* first page of RX ring-buffer */
67 u_short rec_page_stop
; /* last page of RX ring-buffer */
68 u_short next_packet
; /* pointer to next unread RX packet */
70 u_int8_t sc_enaddr
[ETHER_ADDR_LEN
]; /* storage for MAC address */
72 int sc_enabled
; /* boolean; power enabled on interface */
75 rndsource_element_t rnd_source
; /* random source */
78 int (*test_mem
)(struct dp8390_softc
*);
79 void (*init_card
)(struct dp8390_softc
*);
80 void (*stop_card
)(struct dp8390_softc
*);
81 void (*read_hdr
)(struct dp8390_softc
*, int, struct dp8390_ring
*);
82 void (*recv_int
)(struct dp8390_softc
*);
83 int (*ring_copy
)(struct dp8390_softc
*, int, void *, u_short
);
84 int (*write_mbuf
)(struct dp8390_softc
*, struct mbuf
*, int);
86 int (*sc_enable
)(struct dp8390_softc
*);
87 void (*sc_disable
)(struct dp8390_softc
*);
89 void (*sc_media_init
)(struct dp8390_softc
*);
90 void (*sc_media_fini
)(struct dp8390_softc
*);
92 int (*sc_mediachange
)(struct dp8390_softc
*);
93 void (*sc_mediastatus
)(struct dp8390_softc
*, struct ifmediareq
*);
99 #define DP8390_VENDOR_UNKNOWN 0xff /* Unknown network card */
100 #define DP8390_VENDOR_WD_SMC 0x00 /* Western Digital/SMC */
101 #define DP8390_VENDOR_3COM 0x01 /* 3Com */
102 #define DP8390_VENDOR_NOVELL 0x02 /* Novell */
103 #define DP8390_VENDOR_APPLE 0x10 /* Apple Ethernet card */
104 #define DP8390_VENDOR_INTERLAN 0x11 /* Interlan A310 card (GatorCard) */
105 #define DP8390_VENDOR_DAYNA 0x12 /* DaynaPORT E/30s (and others?) */
106 #define DP8390_VENDOR_ASANTE 0x13 /* Asante MacCon II/E */
107 #define DP8390_VENDOR_FARALLON 0x14 /* Farallon EtherMac II-TP */
108 #define DP8390_VENDOR_FOCUS 0x15 /* FOCUS Enhancements EtherLAN */
109 #define DP8390_VENDOR_KINETICS 0x16 /* Kinetics EtherPort SE/30 */
110 #define DP8390_VENDOR_CABLETRON 0x17 /* Cabletron Ethernet */
113 * Compile-time config flags
116 * This sets the default for enabling/disabling the tranceiver.
118 #define DP8390_DISABLE_TRANCEIVER 0x0001
121 * This forces the board to be used in 8/16-bit mode even if it autoconfigs
124 #define DP8390_FORCE_8BIT_MODE 0x0002
125 #define DP8390_FORCE_16BIT_MODE 0x0004
128 * This disables the use of multiple transmit buffers.
130 #define DP8390_NO_MULTI_BUFFERING 0x0008
133 * This forces all operations with the NIC memory to use Programmed I/O (i.e.
134 * not via shared memory).
136 #define DP8390_FORCE_PIO 0x0010
139 * The chip is ASIX AX88190 and needs work around.
141 #define DP8390_DO_AX88190_WORKAROUND 0x0020
143 #define DP8390_ATTACHED 0x0040 /* attach has succeeded */
146 * ASIX AX88796 doesn't have remote DMA conmplete bit in ISR, so don't
149 #define DP8390_NO_REMOTE_DMA_COMPLETE 0x0080
152 * NIC register access macros
154 #define NIC_GET(t, h, reg) bus_space_read_1(t, h, \
155 ((sc)->sc_reg_map[reg]))
156 #define NIC_PUT(t, h, reg, val) bus_space_write_1(t, h, \
157 ((sc)->sc_reg_map[reg]), (val))
158 #define NIC_BARRIER(t, h) bus_space_barrier(t, h, 0, 0x10, \
159 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE)
161 int dp8390_config(struct dp8390_softc
*);
162 int dp8390_intr(void *);
163 int dp8390_ioctl(struct ifnet
*, u_long
, void *);
164 void dp8390_start(struct ifnet
*);
165 void dp8390_watchdog(struct ifnet
*);
166 void dp8390_reset(struct dp8390_softc
*);
167 void dp8390_init(struct dp8390_softc
*);
168 void dp8390_stop(struct dp8390_softc
*);
170 void dp8390_rint(struct dp8390_softc
*);
172 void dp8390_getmcaf(struct ethercom
*, u_int8_t
*);
173 struct mbuf
*dp8390_get(struct dp8390_softc
*, int, u_short
);
174 void dp8390_read(struct dp8390_softc
*, int, u_short
);
176 int dp8390_enable(struct dp8390_softc
*);
177 void dp8390_disable(struct dp8390_softc
*);
179 int dp8390_activate(device_t
, enum devact
);
181 int dp8390_detach(struct dp8390_softc
*, int);
183 int dp8390_mediachange(struct ifnet
*);
184 void dp8390_mediastatus(struct ifnet
*, struct ifmediareq
*);
186 void dp8390_media_init(struct dp8390_softc
*);
189 int dp8390_ipkdb_attach(struct ipkdb_if
*);