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[netbsd-mini2440.git] / sys / dev / ic / elinkxl.c
blobce993152fe7830a43fba591488cfdc09ad0e08c1
1 /* $NetBSD: elinkxl.c,v 1.108 2009/09/05 14:19:30 tsutsui Exp $ */
2
3 /*-
4 * Copyright (c) 1998 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Frank van der Linden.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32 #include <sys/cdefs.h>
33 __KERNEL_RCSID(0, "$NetBSD: elinkxl.c,v 1.108 2009/09/05 14:19:30 tsutsui Exp $");
34
35 #include "bpfilter.h"
36 #include "rnd.h"
37
38 #include <sys/param.h>
39 #include <sys/systm.h>
40 #include <sys/callout.h>
41 #include <sys/kernel.h>
42 #include <sys/mbuf.h>
43 #include <sys/socket.h>
44 #include <sys/ioctl.h>
45 #include <sys/errno.h>
46 #include <sys/syslog.h>
47 #include <sys/select.h>
48 #include <sys/device.h>
49 #if NRND > 0
50 #include <sys/rnd.h>
51 #endif
52
53 #include <uvm/uvm_extern.h>
54
55 #include <net/if.h>
56 #include <net/if_dl.h>
57 #include <net/if_ether.h>
58 #include <net/if_media.h>
59
60 #if NBPFILTER > 0
61 #include <net/bpf.h>
62 #include <net/bpfdesc.h>
63 #endif
64
65 #include <sys/cpu.h>
66 #include <sys/bus.h>
67 #include <sys/intr.h>
68 #include <machine/endian.h>
69
70 #include <dev/mii/miivar.h>
71 #include <dev/mii/mii.h>
72 #include <dev/mii/mii_bitbang.h>
73
74 #include <dev/ic/elink3reg.h>
75 /* #include <dev/ic/elink3var.h> */
76 #include <dev/ic/elinkxlreg.h>
77 #include <dev/ic/elinkxlvar.h>
78
79 #ifdef DEBUG
80 int exdebug = 0;
81 #endif
82
83 /* ifmedia callbacks */
84 int ex_media_chg(struct ifnet *ifp);
85 void ex_media_stat(struct ifnet *ifp, struct ifmediareq *req);
86
87 static int ex_ifflags_cb(struct ethercom *);
88
89 void ex_probe_media(struct ex_softc *);
90 void ex_set_filter(struct ex_softc *);
91 void ex_set_media(struct ex_softc *);
92 void ex_set_xcvr(struct ex_softc *, uint16_t);
93 struct mbuf *ex_get(struct ex_softc *, int);
94 uint16_t ex_read_eeprom(struct ex_softc *, int);
95 int ex_init(struct ifnet *);
96 void ex_read(struct ex_softc *);
97 void ex_reset(struct ex_softc *);
98 void ex_set_mc(struct ex_softc *);
99 void ex_getstats(struct ex_softc *);
100 void ex_printstats(struct ex_softc *);
101 void ex_tick(void *);
102
103 static int ex_eeprom_busy(struct ex_softc *);
104 static int ex_add_rxbuf(struct ex_softc *, struct ex_rxdesc *);
105 static void ex_init_txdescs(struct ex_softc *);
106
107 static void ex_setup_tx(struct ex_softc *);
108 static bool ex_shutdown(device_t, int);
109 static void ex_start(struct ifnet *);
110 static void ex_txstat(struct ex_softc *);
111
112 int ex_mii_readreg(device_t, int, int);
113 void ex_mii_writereg(device_t, int, int, int);
114 void ex_mii_statchg(device_t);
115
116 void ex_probemedia(struct ex_softc *);
117
118 /*
119 * Structure to map media-present bits in boards to ifmedia codes and
120 * printable media names. Used for table-driven ifmedia initialization.
121 */
122 struct ex_media {
123 int exm_mpbit; /* media present bit */
124 const char *exm_name; /* name of medium */
125 int exm_ifmedia; /* ifmedia word for medium */
126 int exm_epmedia; /* ELINKMEDIA_* constant */
127 };
128
129 /*
130 * Media table for 3c90x chips. Note that chips with MII have no
131 * `native' media.
132 */
133 struct ex_media ex_native_media[] = {
134 { ELINK_PCI_10BASE_T, "10baseT", IFM_ETHER|IFM_10_T,
135 ELINKMEDIA_10BASE_T },
136 { ELINK_PCI_10BASE_T, "10baseT-FDX", IFM_ETHER|IFM_10_T|IFM_FDX,
137 ELINKMEDIA_10BASE_T },
138 { ELINK_PCI_AUI, "10base5", IFM_ETHER|IFM_10_5,
139 ELINKMEDIA_AUI },
140 { ELINK_PCI_BNC, "10base2", IFM_ETHER|IFM_10_2,
141 ELINKMEDIA_10BASE_2 },
142 { ELINK_PCI_100BASE_TX, "100baseTX", IFM_ETHER|IFM_100_TX,
143 ELINKMEDIA_100BASE_TX },
144 { ELINK_PCI_100BASE_TX, "100baseTX-FDX",IFM_ETHER|IFM_100_TX|IFM_FDX,
145 ELINKMEDIA_100BASE_TX },
146 { ELINK_PCI_100BASE_FX, "100baseFX", IFM_ETHER|IFM_100_FX,
147 ELINKMEDIA_100BASE_FX },
148 { ELINK_PCI_100BASE_MII,"manual", IFM_ETHER|IFM_MANUAL,
149 ELINKMEDIA_MII },
150 { ELINK_PCI_100BASE_T4, "100baseT4", IFM_ETHER|IFM_100_T4,
151 ELINKMEDIA_100BASE_T4 },
152 { 0, NULL, 0,
153 0 },
154 };
155
156 /*
157 * MII bit-bang glue.
158 */
159 uint32_t ex_mii_bitbang_read(device_t);
160 void ex_mii_bitbang_write(device_t, uint32_t);
161
162 const struct mii_bitbang_ops ex_mii_bitbang_ops = {
163 ex_mii_bitbang_read,
164 ex_mii_bitbang_write,
165 {
166 ELINK_PHY_DATA, /* MII_BIT_MDO */
167 ELINK_PHY_DATA, /* MII_BIT_MDI */
168 ELINK_PHY_CLK, /* MII_BIT_MDC */
169 ELINK_PHY_DIR, /* MII_BIT_DIR_HOST_PHY */
170 0, /* MII_BIT_DIR_PHY_HOST */
171 }
172 };
173
174 /*
175 * Back-end attach and configure.
176 */
177 void
178 ex_config(struct ex_softc *sc)
179 {
180 struct ifnet *ifp;
181 uint16_t val;
182 uint8_t macaddr[ETHER_ADDR_LEN] = {0};
183 bus_space_tag_t iot = sc->sc_iot;
184 bus_space_handle_t ioh = sc->sc_ioh;
185 int i, error, attach_stage;
186
187 callout_init(&sc->ex_mii_callout, 0);
188
189 ex_reset(sc);
190
191 val = ex_read_eeprom(sc, EEPROM_OEM_ADDR0);
192 macaddr[0] = val >> 8;
193 macaddr[1] = val & 0xff;
194 val = ex_read_eeprom(sc, EEPROM_OEM_ADDR1);
195 macaddr[2] = val >> 8;
196 macaddr[3] = val & 0xff;
197 val = ex_read_eeprom(sc, EEPROM_OEM_ADDR2);
198 macaddr[4] = val >> 8;
199 macaddr[5] = val & 0xff;
200
201 aprint_normal_dev(sc->sc_dev, "MAC address %s\n", ether_sprintf(macaddr));
202
203 if (sc->ex_conf & (EX_CONF_INV_LED_POLARITY|EX_CONF_PHY_POWER)) {
204 GO_WINDOW(2);
205 val = bus_space_read_2(iot, ioh, ELINK_W2_RESET_OPTIONS);
206 if (sc->ex_conf & EX_CONF_INV_LED_POLARITY)
207 val |= ELINK_RESET_OPT_LEDPOLAR;
208 if (sc->ex_conf & EX_CONF_PHY_POWER)
209 val |= ELINK_RESET_OPT_PHYPOWER;
210 bus_space_write_2(iot, ioh, ELINK_W2_RESET_OPTIONS, val);
211 }
212 if (sc->ex_conf & EX_CONF_NO_XCVR_PWR) {
213 GO_WINDOW(0);
214 bus_space_write_2(iot, ioh, ELINK_W0_MFG_ID,
215 EX_XCVR_PWR_MAGICBITS);
216 }
217
218 attach_stage = 0;
219
220 /*
221 * Allocate the upload descriptors, and create and load the DMA
222 * map for them.
223 */
224 if ((error = bus_dmamem_alloc(sc->sc_dmat,
225 EX_NUPD * sizeof (struct ex_upd), PAGE_SIZE, 0, &sc->sc_useg, 1,
226 &sc->sc_urseg, BUS_DMA_NOWAIT)) != 0) {
227 aprint_error_dev(sc->sc_dev,
228 "can't allocate upload descriptors, error = %d\n", error);
229 goto fail;
230 }
231
232 attach_stage = 1;
233
234 if ((error = bus_dmamem_map(sc->sc_dmat, &sc->sc_useg, sc->sc_urseg,
235 EX_NUPD * sizeof (struct ex_upd), (void **)&sc->sc_upd,
236 BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) != 0) {
237 aprint_error_dev(sc->sc_dev,
238 "can't map upload descriptors, error = %d\n", error);
239 goto fail;
240 }
241
242 attach_stage = 2;
243
244 if ((error = bus_dmamap_create(sc->sc_dmat,
245 EX_NUPD * sizeof (struct ex_upd), 1,
246 EX_NUPD * sizeof (struct ex_upd), 0, BUS_DMA_NOWAIT,
247 &sc->sc_upd_dmamap)) != 0) {
248 aprint_error_dev(sc->sc_dev,
249 "can't create upload desc. DMA map, error = %d\n", error);
250 goto fail;
251 }
252
253 attach_stage = 3;
254
255 if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_upd_dmamap,
256 sc->sc_upd, EX_NUPD * sizeof (struct ex_upd), NULL,
257 BUS_DMA_NOWAIT)) != 0) {
258 aprint_error_dev(sc->sc_dev,
259 "can't load upload desc. DMA map, error = %d\n", error);
260 goto fail;
261 }
262
263 attach_stage = 4;
264
265 /*
266 * Allocate the download descriptors, and create and load the DMA
267 * map for them.
268 */
269 if ((error = bus_dmamem_alloc(sc->sc_dmat,
270 DPDMEM_SIZE + EX_IP4CSUMTX_PADLEN, PAGE_SIZE, 0, &sc->sc_dseg, 1,
271 &sc->sc_drseg, BUS_DMA_NOWAIT)) != 0) {
272 aprint_error_dev(sc->sc_dev,
273 "can't allocate download descriptors, error = %d\n", error);
274 goto fail;
275 }
276
277 attach_stage = 5;
278
279 if ((error = bus_dmamem_map(sc->sc_dmat, &sc->sc_dseg, sc->sc_drseg,
280 DPDMEM_SIZE + EX_IP4CSUMTX_PADLEN, (void **)&sc->sc_dpd,
281 BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) != 0) {
282 aprint_error_dev(sc->sc_dev,
283 "can't map download descriptors, error = %d\n", error);
284 goto fail;
285 }
286 memset(sc->sc_dpd, 0, DPDMEM_SIZE + EX_IP4CSUMTX_PADLEN);
287
288 attach_stage = 6;
289
290 if ((error = bus_dmamap_create(sc->sc_dmat,
291 DPDMEM_SIZE + EX_IP4CSUMTX_PADLEN, 1,
292 DPDMEM_SIZE + EX_IP4CSUMTX_PADLEN, 0, BUS_DMA_NOWAIT,
293 &sc->sc_dpd_dmamap)) != 0) {
294 aprint_error_dev(sc->sc_dev,
295 "can't create download desc. DMA map, error = %d\n", error);
296 goto fail;
297 }
298
299 attach_stage = 7;
300
301 if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_dpd_dmamap,
302 sc->sc_dpd, DPDMEM_SIZE + EX_IP4CSUMTX_PADLEN, NULL,
303 BUS_DMA_NOWAIT)) != 0) {
304 aprint_error_dev(sc->sc_dev,
305 "can't load download desc. DMA map, error = %d\n", error);
306 goto fail;
307 }
308 bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap,
309 DPDMEMPAD_OFF, EX_IP4CSUMTX_PADLEN, BUS_DMASYNC_PREWRITE);
310
311 attach_stage = 8;
312
313
314 /*
315 * Create the transmit buffer DMA maps.
316 */
317 for (i = 0; i < EX_NDPD; i++) {
318 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES,
319 EX_NTFRAGS, MCLBYTES, 0, BUS_DMA_NOWAIT,
320 &sc->sc_tx_dmamaps[i])) != 0) {
321 aprint_error_dev(sc->sc_dev,
322 "can't create tx DMA map %d, error = %d\n",
323 i, error);
324 goto fail;
325 }
326 }
327
328 attach_stage = 9;
329
330 /*
331 * Create the receive buffer DMA maps.
332 */
333 for (i = 0; i < EX_NUPD; i++) {
334 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES,
335 EX_NRFRAGS, MCLBYTES, 0, BUS_DMA_NOWAIT,
336 &sc->sc_rx_dmamaps[i])) != 0) {
337 aprint_error_dev(sc->sc_dev,
338 "can't create rx DMA map %d, error = %d\n",
339 i, error);
340 goto fail;
341 }
342 }
343
344 attach_stage = 10;
345
346 /*
347 * Create ring of upload descriptors, only once. The DMA engine
348 * will loop over this when receiving packets, stalling if it
349 * hits an UPD with a finished receive.
350 */
351 for (i = 0; i < EX_NUPD; i++) {
352 sc->sc_rxdescs[i].rx_dmamap = sc->sc_rx_dmamaps[i];
353 sc->sc_rxdescs[i].rx_upd = &sc->sc_upd[i];
354 sc->sc_upd[i].upd_frags[0].fr_len =
355 htole32((MCLBYTES - 2) | EX_FR_LAST);
356 if (ex_add_rxbuf(sc, &sc->sc_rxdescs[i]) != 0) {
357 aprint_error_dev(sc->sc_dev,
358 "can't allocate or map rx buffers\n");
359 goto fail;
360 }
361 }
362
363 bus_dmamap_sync(sc->sc_dmat, sc->sc_upd_dmamap, 0,
364 EX_NUPD * sizeof (struct ex_upd),
365 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
366
367 ex_init_txdescs(sc);
368
369 attach_stage = 11;
370
371
372 GO_WINDOW(3);
373 val = bus_space_read_2(iot, ioh, ELINK_W3_RESET_OPTIONS);
374 if (val & ELINK_MEDIACAP_MII)
375 sc->ex_conf |= EX_CONF_MII;
376
377 ifp = &sc->sc_ethercom.ec_if;
378
379 /*
380 * Initialize our media structures and MII info. We'll
381 * probe the MII if we discover that we have one.
382 */
383 sc->ex_mii.mii_ifp = ifp;
384 sc->ex_mii.mii_readreg = ex_mii_readreg;
385 sc->ex_mii.mii_writereg = ex_mii_writereg;
386 sc->ex_mii.mii_statchg = ex_mii_statchg;
387 ifmedia_init(&sc->ex_mii.mii_media, IFM_IMASK, ex_media_chg,
388 ex_media_stat);
389
390 if (sc->ex_conf & EX_CONF_MII) {
391 /*
392 * Find PHY, extract media information from it.
393 * First, select the right transceiver.
394 */
395 ex_set_xcvr(sc, val);
396
397 mii_attach(sc->sc_dev, &sc->ex_mii, 0xffffffff,
398 MII_PHY_ANY, MII_OFFSET_ANY, 0);
399 if (LIST_FIRST(&sc->ex_mii.mii_phys) == NULL) {
400 ifmedia_add(&sc->ex_mii.mii_media, IFM_ETHER|IFM_NONE,
401 0, NULL);
402 ifmedia_set(&sc->ex_mii.mii_media, IFM_ETHER|IFM_NONE);
403 } else {
404 ifmedia_set(&sc->ex_mii.mii_media, IFM_ETHER|IFM_AUTO);
405 }
406 } else
407 ex_probemedia(sc);
408
409 strlcpy(ifp->if_xname, device_xname(sc->sc_dev), IFNAMSIZ);
410 ifp->if_softc = sc;
411 ifp->if_start = ex_start;
412 ifp->if_ioctl = ex_ioctl;
413 ifp->if_watchdog = ex_watchdog;
414 ifp->if_init = ex_init;
415 ifp->if_stop = ex_stop;
416 ifp->if_flags =
417 IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST;
418 sc->sc_if_flags = ifp->if_flags;
419 IFQ_SET_READY(&ifp->if_snd);
420
421 /*
422 * We can support 802.1Q VLAN-sized frames.
423 */
424 sc->sc_ethercom.ec_capabilities |= ETHERCAP_VLAN_MTU;
425
426 /*
427 * The 3c90xB has hardware IPv4/TCPv4/UDPv4 checksum support.
428 */
429 if (sc->ex_conf & EX_CONF_90XB)
430 sc->sc_ethercom.ec_if.if_capabilities |=
431 IFCAP_CSUM_IPv4_Tx | IFCAP_CSUM_IPv4_Rx |
432 IFCAP_CSUM_TCPv4_Tx | IFCAP_CSUM_TCPv4_Rx |
433 IFCAP_CSUM_UDPv4_Tx | IFCAP_CSUM_UDPv4_Rx;
434
435 if_attach(ifp);
436 ether_ifattach(ifp, macaddr);
437 ether_set_ifflags_cb(&sc->sc_ethercom, ex_ifflags_cb);
438
439 GO_WINDOW(1);
440
441 sc->tx_start_thresh = 20;
442 sc->tx_succ_ok = 0;
443
444 /* TODO: set queues to 0 */
445
446 #if NRND > 0
447 rnd_attach_source(&sc->rnd_source, device_xname(sc->sc_dev),
448 RND_TYPE_NET, 0);
449 #endif
450
451 if (pmf_device_register1(sc->sc_dev, NULL, NULL, ex_shutdown))
452 pmf_class_network_register(sc->sc_dev, &sc->sc_ethercom.ec_if);
453 else
454 aprint_error_dev(sc->sc_dev,
455 "couldn't establish power handler\n");
456
457 /* The attach is successful. */
458 sc->ex_flags |= EX_FLAGS_ATTACHED;
459 return;
460
461 fail:
462 /*
463 * Free any resources we've allocated during the failed attach
464 * attempt. Do this in reverse order and fall though.
465 */
466 switch (attach_stage) {
467 case 11:
468 {
469 struct ex_rxdesc *rxd;
470
471 for (i = 0; i < EX_NUPD; i++) {
472 rxd = &sc->sc_rxdescs[i];
473 if (rxd->rx_mbhead != NULL) {
474 bus_dmamap_unload(sc->sc_dmat, rxd->rx_dmamap);
475 m_freem(rxd->rx_mbhead);
476 }
477 }
478 }
479 /* FALLTHROUGH */
480
481 case 10:
482 for (i = 0; i < EX_NUPD; i++)
483 bus_dmamap_destroy(sc->sc_dmat, sc->sc_rx_dmamaps[i]);
484 /* FALLTHROUGH */
485
486 case 9:
487 for (i = 0; i < EX_NDPD; i++)
488 bus_dmamap_destroy(sc->sc_dmat, sc->sc_tx_dmamaps[i]);
489 /* FALLTHROUGH */
490 case 8:
491 bus_dmamap_unload(sc->sc_dmat, sc->sc_dpd_dmamap);
492 /* FALLTHROUGH */
493
494 case 7:
495 bus_dmamap_destroy(sc->sc_dmat, sc->sc_dpd_dmamap);
496 /* FALLTHROUGH */
497
498 case 6:
499 bus_dmamem_unmap(sc->sc_dmat, (void *)sc->sc_dpd,
500 EX_NDPD * sizeof (struct ex_dpd));
501 /* FALLTHROUGH */
502
503 case 5:
504 bus_dmamem_free(sc->sc_dmat, &sc->sc_dseg, sc->sc_drseg);
505 break;
506
507 case 4:
508 bus_dmamap_unload(sc->sc_dmat, sc->sc_upd_dmamap);
509 /* FALLTHROUGH */
510
511 case 3:
512 bus_dmamap_destroy(sc->sc_dmat, sc->sc_upd_dmamap);
513 /* FALLTHROUGH */
514
515 case 2:
516 bus_dmamem_unmap(sc->sc_dmat, (void *)sc->sc_upd,
517 EX_NUPD * sizeof (struct ex_upd));
518 /* FALLTHROUGH */
519
520 case 1:
521 bus_dmamem_free(sc->sc_dmat, &sc->sc_useg, sc->sc_urseg);
522 break;
523 }
524
525 }
526
527 /*
528 * Find the media present on non-MII chips.
529 */
530 void
531 ex_probemedia(struct ex_softc *sc)
532 {
533 bus_space_tag_t iot = sc->sc_iot;
534 bus_space_handle_t ioh = sc->sc_ioh;
535 struct ifmedia *ifm = &sc->ex_mii.mii_media;
536 struct ex_media *exm;
537 uint16_t config1, reset_options, default_media;
538 int defmedia = 0;
539 const char *sep = "", *defmedianame = NULL;
540
541 GO_WINDOW(3);
542 config1 = bus_space_read_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2);
543 reset_options = bus_space_read_1(iot, ioh, ELINK_W3_RESET_OPTIONS);
544 GO_WINDOW(0);
545
546 default_media = (config1 & CONFIG_MEDIAMASK) >> CONFIG_MEDIAMASK_SHIFT;
547
548 /* Sanity check that there are any media! */
549 if ((reset_options & ELINK_PCI_MEDIAMASK) == 0) {
550 aprint_error_dev(sc->sc_dev, "no media present!\n");
551 ifmedia_add(ifm, IFM_ETHER|IFM_NONE, 0, NULL);
552 ifmedia_set(ifm, IFM_ETHER|IFM_NONE);
553 return;
554 }
555
556 aprint_normal_dev(sc->sc_dev, "");
557
558 #define PRINT(str) aprint_normal("%s%s", sep, str); sep = ", "
559
560 for (exm = ex_native_media; exm->exm_name != NULL; exm++) {
561 if (reset_options & exm->exm_mpbit) {
562 /*
563 * Default media is a little complicated. We
564 * support full-duplex which uses the same
565 * reset options bit.
566 *
567 * XXX Check EEPROM for default to FDX?
568 */
569 if (exm->exm_epmedia == default_media) {
570 if ((exm->exm_ifmedia & IFM_FDX) == 0) {
571 defmedia = exm->exm_ifmedia;
572 defmedianame = exm->exm_name;
573 }
574 } else if (defmedia == 0) {
575 defmedia = exm->exm_ifmedia;
576 defmedianame = exm->exm_name;
577 }
578 ifmedia_add(ifm, exm->exm_ifmedia, exm->exm_epmedia,
579 NULL);
580 PRINT(exm->exm_name);
581 }
582 }
583
584 #undef PRINT
585
586 #ifdef DIAGNOSTIC
587 if (defmedia == 0)
588 panic("ex_probemedia: impossible");
589 #endif
590
591 aprint_normal(", default %s\n", defmedianame);
592 ifmedia_set(ifm, defmedia);
593 }
594
595 /*
596 * Setup transmitter parameters.
597 */
598 static void
599 ex_setup_tx(struct ex_softc *sc)
600 {
601 bus_space_tag_t iot = sc->sc_iot;
602 bus_space_handle_t ioh = sc->sc_ioh;
603
604 /*
605 * Disable reclaim threshold for 90xB, set free threshold to
606 * 6 * 256 = 1536 for 90x.
607 */
608 if (sc->ex_conf & EX_CONF_90XB)
609 bus_space_write_2(iot, ioh, ELINK_COMMAND,
610 ELINK_TXRECLTHRESH | 255);
611 else
612 bus_space_write_1(iot, ioh, ELINK_TXFREETHRESH, 6);
613
614 /* Setup early transmission start threshold. */
615 bus_space_write_2(iot, ioh, ELINK_COMMAND,
616 ELINK_TXSTARTTHRESH | sc->tx_start_thresh);
617 }
618
619 /*
620 * Bring device up.
621 */
622 int
623 ex_init(struct ifnet *ifp)
624 {
625 struct ex_softc *sc = ifp->if_softc;
626 bus_space_tag_t iot = sc->sc_iot;
627 bus_space_handle_t ioh = sc->sc_ioh;
628 int i;
629 uint16_t val;
630 int error = 0;
631
632 if ((error = ex_enable(sc)) != 0)
633 goto out;
634
635 ex_waitcmd(sc);
636 ex_stop(ifp, 0);
637
638 GO_WINDOW(2);
639
640 /* Turn on PHY power. */
641 if (sc->ex_conf & (EX_CONF_PHY_POWER | EX_CONF_INV_LED_POLARITY)) {
642 val = bus_space_read_2(iot, ioh, ELINK_W2_RESET_OPTIONS);
643 if (sc->ex_conf & EX_CONF_PHY_POWER)
644 val |= ELINK_RESET_OPT_PHYPOWER; /* turn on PHY power */
645 if (sc->ex_conf & EX_CONF_INV_LED_POLARITY)
646 val |= ELINK_RESET_OPT_LEDPOLAR; /* invert LED polarity */
647 bus_space_write_2(iot, ioh, ELINK_W2_RESET_OPTIONS, val);
648 }
649
650 /*
651 * Set the station address and clear the station mask. The latter
652 * is needed for 90x cards, 0 is the default for 90xB cards.
653 */
654 for (i = 0; i < ETHER_ADDR_LEN; i++) {
655 bus_space_write_1(iot, ioh, ELINK_W2_ADDR_0 + i,
656 CLLADDR(ifp->if_sadl)[i]);
657 bus_space_write_1(iot, ioh, ELINK_W2_RECVMASK_0 + i, 0);
658 }
659
660 GO_WINDOW(3);
661
662 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_RESET);
663 ex_waitcmd(sc);
664 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_RESET);
665 ex_waitcmd(sc);
666
667 /* Load Tx parameters. */
668 ex_setup_tx(sc);
669
670 bus_space_write_2(iot, ioh, ELINK_COMMAND,
671 SET_RX_EARLY_THRESH | ELINK_THRESH_DISABLE);
672
673 bus_space_write_4(iot, ioh, ELINK_DMACTRL,
674 bus_space_read_4(iot, ioh, ELINK_DMACTRL) | ELINK_DMAC_UPRXEAREN);
675
676 bus_space_write_2(iot, ioh, ELINK_COMMAND,
677 SET_RD_0_MASK | XL_WATCHED_INTERRUPTS);
678 bus_space_write_2(iot, ioh, ELINK_COMMAND,
679 SET_INTR_MASK | XL_WATCHED_INTERRUPTS);
680
681 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | 0xff);
682 if (sc->intr_ack)
683 (* sc->intr_ack)(sc);
684 ex_set_media(sc);
685 ex_set_mc(sc);
686
687
688 bus_space_write_2(iot, ioh, ELINK_COMMAND, STATS_ENABLE);
689 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE);
690 bus_space_write_4(iot, ioh, ELINK_UPLISTPTR, sc->sc_upddma);
691 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_ENABLE);
692 bus_space_write_2(iot, ioh, ELINK_COMMAND, ELINK_UPUNSTALL);
693
694 ifp->if_flags |= IFF_RUNNING;
695 ifp->if_flags &= ~IFF_OACTIVE;
696 ex_start(ifp);
697 sc->sc_if_flags = ifp->if_flags;
698
699 GO_WINDOW(1);
700
701 callout_reset(&sc->ex_mii_callout, hz, ex_tick, sc);
702
703 out:
704 if (error) {
705 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
706 ifp->if_timer = 0;
707 aprint_error_dev(sc->sc_dev, "interface not running\n");
708 }
709 return (error);
710 }
711
712 #define MCHASHSIZE 256
713 #define ex_mchash(addr) (ether_crc32_be((addr), ETHER_ADDR_LEN) & \
714 (MCHASHSIZE - 1))
715
716 /*
717 * Set multicast receive filter. Also take care of promiscuous mode
718 * here (XXX).
719 */
720 void
721 ex_set_mc(struct ex_softc *sc)
722 {
723 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
724 struct ethercom *ec = &sc->sc_ethercom;
725 struct ether_multi *enm;
726 struct ether_multistep estep;
727 int i;
728 uint16_t mask = FIL_INDIVIDUAL | FIL_BRDCST;
729
730 if (ifp->if_flags & IFF_PROMISC) {
731 mask |= FIL_PROMISC;
732 goto allmulti;
733 }
734
735 ETHER_FIRST_MULTI(estep, ec, enm);
736 if (enm == NULL)
737 goto nomulti;
738
739 if ((sc->ex_conf & EX_CONF_90XB) == 0)
740 /* No multicast hash filtering. */
741 goto allmulti;
742
743 for (i = 0; i < MCHASHSIZE; i++)
744 bus_space_write_2(sc->sc_iot, sc->sc_ioh,
745 ELINK_COMMAND, ELINK_CLEARHASHFILBIT | i);
746
747 do {
748 if (memcmp(enm->enm_addrlo, enm->enm_addrhi,
749 ETHER_ADDR_LEN) != 0)
750 goto allmulti;
751
752 i = ex_mchash(enm->enm_addrlo);
753 bus_space_write_2(sc->sc_iot, sc->sc_ioh,
754 ELINK_COMMAND, ELINK_SETHASHFILBIT | i);
755 ETHER_NEXT_MULTI(estep, enm);
756 } while (enm != NULL);
757 mask |= FIL_MULTIHASH;
758
759 nomulti:
760 ifp->if_flags &= ~IFF_ALLMULTI;
761 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_COMMAND,
762 SET_RX_FILTER | mask);
763 return;
764
765 allmulti:
766 ifp->if_flags |= IFF_ALLMULTI;
767 mask |= FIL_MULTICAST;
768 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_COMMAND,
769 SET_RX_FILTER | mask);
770 }
771
772
773 /*
774 * The Tx Complete interrupts occur only on errors,
775 * and this is the error handler.
776 */
777 static void
778 ex_txstat(struct ex_softc *sc)
779 {
780 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
781 bus_space_tag_t iot = sc->sc_iot;
782 bus_space_handle_t ioh = sc->sc_ioh;
783 int i, err = 0;
784
785 /*
786 * We need to read+write TX_STATUS until we get a 0 status
787 * in order to turn off the interrupt flag.
788 * ELINK_TXSTATUS is in the upper byte of 2 with ELINK_TIMER.
789 */
790 for (;;) {
791 i = bus_space_read_2(iot, ioh, ELINK_TIMER);
792 if ((i & TXS_COMPLETE) == 0)
793 break;
794 bus_space_write_2(iot, ioh, ELINK_TIMER, 0x0);
795 err |= i;
796 }
797 err &= ~TXS_TIMER;
798
799 if ((err & (TXS_UNDERRUN | TXS_JABBER | TXS_RECLAIM))
800 || err == 0 /* should not happen, just in case */) {
801 /*
802 * Make sure the transmission is stopped.
803 */
804 bus_space_write_2(iot, ioh, ELINK_COMMAND, ELINK_DNSTALL);
805 for (i = 1000; i > 0; i--)
806 if ((bus_space_read_4(iot, ioh, ELINK_DMACTRL) &
807 ELINK_DMAC_DNINPROG) == 0)
808 break;
809
810 /*
811 * Reset the transmitter.
812 */
813 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_RESET);
814
815 /* Resetting takes a while and we will do more than wait. */
816
817 ifp->if_flags &= ~IFF_OACTIVE;
818 ++sc->sc_ethercom.ec_if.if_oerrors;
819 aprint_error_dev(sc->sc_dev, "%s%s%s",
820 (err & TXS_UNDERRUN) ? " transmit underrun" : "",
821 (err & TXS_JABBER) ? " jabber" : "",
822 (err & TXS_RECLAIM) ? " reclaim" : "");
823 if (err == 0)
824 aprint_error(" unknown Tx error");
825 printf(" (%x)", err);
826 if (err & TXS_UNDERRUN) {
827 aprint_error(" @%d", sc->tx_start_thresh);
828 if (sc->tx_succ_ok < 256 &&
829 (i = min(ETHER_MAX_LEN, sc->tx_start_thresh + 20))
830 > sc->tx_start_thresh) {
831 aprint_error(", new threshold is %d", i);
832 sc->tx_start_thresh = i;
833 }
834 sc->tx_succ_ok = 0;
835 }
836 aprint_error("\n");
837 if (err & TXS_MAX_COLLISION)
838 ++sc->sc_ethercom.ec_if.if_collisions;
839
840 /* Wait for TX_RESET to finish. */
841 ex_waitcmd(sc);
842
843 /* Reload Tx parameters. */
844 ex_setup_tx(sc);
845 } else {
846 if (err & TXS_MAX_COLLISION)
847 ++sc->sc_ethercom.ec_if.if_collisions;
848 sc->sc_ethercom.ec_if.if_flags &= ~IFF_OACTIVE;
849 }
850
851 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE);
852
853 /* Retransmit current packet if any. */
854 if (sc->tx_head) {
855 ifp->if_flags |= IFF_OACTIVE;
856 bus_space_write_2(iot, ioh, ELINK_COMMAND,
857 ELINK_DNUNSTALL);
858 bus_space_write_4(iot, ioh, ELINK_DNLISTPTR,
859 DPD_DMADDR(sc, sc->tx_head));
860
861 /* Retrigger watchdog if stopped. */
862 if (ifp->if_timer == 0)
863 ifp->if_timer = 1;
864 }
865 }
866
867 int
868 ex_media_chg(struct ifnet *ifp)
869 {
870
871 if (ifp->if_flags & IFF_UP)
872 ex_init(ifp);
873 return 0;
874 }
875
876 void
877 ex_set_xcvr(struct ex_softc *sc, const uint16_t media)
878 {
879 bus_space_tag_t iot = sc->sc_iot;
880 bus_space_handle_t ioh = sc->sc_ioh;
881 uint32_t icfg;
882
883 /*
884 * We're already in Window 3
885 */
886 icfg = bus_space_read_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG);
887 icfg &= ~(CONFIG_XCVR_SEL << 16);
888 if (media & (ELINK_MEDIACAP_MII | ELINK_MEDIACAP_100BASET4))
889 icfg |= ELINKMEDIA_MII << (CONFIG_XCVR_SEL_SHIFT + 16);
890 if (media & ELINK_MEDIACAP_100BASETX)
891 icfg |= ELINKMEDIA_AUTO << (CONFIG_XCVR_SEL_SHIFT + 16);
892 if (media & ELINK_MEDIACAP_100BASEFX)
893 icfg |= ELINKMEDIA_100BASE_FX
894 << (CONFIG_XCVR_SEL_SHIFT + 16);
895 bus_space_write_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG, icfg);
896 }
897
898 void
899 ex_set_media(struct ex_softc *sc)
900 {
901 bus_space_tag_t iot = sc->sc_iot;
902 bus_space_handle_t ioh = sc->sc_ioh;
903 uint32_t configreg;
904
905 if (((sc->ex_conf & EX_CONF_MII) &&
906 (sc->ex_mii.mii_media_active & IFM_FDX))
907 || (!(sc->ex_conf & EX_CONF_MII) &&
908 (sc->ex_mii.mii_media.ifm_media & IFM_FDX))) {
909 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL,
910 MAC_CONTROL_FDX);
911 } else {
912 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, 0);
913 }
914
915 /*
916 * If the device has MII, select it, and then tell the
917 * PHY which media to use.
918 */
919 if (sc->ex_conf & EX_CONF_MII) {
920 uint16_t val;
921
922 GO_WINDOW(3);
923 val = bus_space_read_2(iot, ioh, ELINK_W3_RESET_OPTIONS);
924 ex_set_xcvr(sc, val);
925 mii_mediachg(&sc->ex_mii);
926 return;
927 }
928
929 GO_WINDOW(4);
930 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 0);
931 bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER);
932 delay(800);
933
934 /*
935 * Now turn on the selected media/transceiver.
936 */
937 switch (IFM_SUBTYPE(sc->ex_mii.mii_media.ifm_cur->ifm_media)) {
938 case IFM_10_T:
939 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE,
940 JABBER_GUARD_ENABLE|LINKBEAT_ENABLE);
941 break;
942
943 case IFM_10_2:
944 bus_space_write_2(iot, ioh, ELINK_COMMAND, START_TRANSCEIVER);
945 DELAY(800);
946 break;
947
948 case IFM_100_TX:
949 case IFM_100_FX:
950 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE,
951 LINKBEAT_ENABLE);
952 DELAY(800);
953 break;
954
955 case IFM_10_5:
956 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE,
957 SQE_ENABLE);
958 DELAY(800);
959 break;
960
961 case IFM_MANUAL:
962 break;
963
964 case IFM_NONE:
965 return;
966
967 default:
968 panic("ex_set_media: impossible");
969 }
970
971 GO_WINDOW(3);
972 configreg = bus_space_read_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG);
973
974 configreg &= ~(CONFIG_MEDIAMASK << 16);
975 configreg |= (sc->ex_mii.mii_media.ifm_cur->ifm_data <<
976 (CONFIG_MEDIAMASK_SHIFT + 16));
977
978 bus_space_write_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG, configreg);
979 }
980
981 /*
982 * Get currently-selected media from card.
983 * (if_media callback, may be called before interface is brought up).
984 */
985 void
986 ex_media_stat(struct ifnet *ifp, struct ifmediareq *req)
987 {
988 struct ex_softc *sc = ifp->if_softc;
989 uint16_t help;
990
991 if ((ifp->if_flags & (IFF_UP|IFF_RUNNING)) == (IFF_UP|IFF_RUNNING)) {
992 if (sc->ex_conf & EX_CONF_MII) {
993 mii_pollstat(&sc->ex_mii);
994 req->ifm_status = sc->ex_mii.mii_media_status;
995 req->ifm_active = sc->ex_mii.mii_media_active;
996 } else {
997 GO_WINDOW(4);
998 req->ifm_status = IFM_AVALID;
999 req->ifm_active =
1000 sc->ex_mii.mii_media.ifm_cur->ifm_media;
1001 help = bus_space_read_2(sc->sc_iot, sc->sc_ioh,
1002 ELINK_W4_MEDIA_TYPE);
1003 if (help & LINKBEAT_DETECT)
1004 req->ifm_status |= IFM_ACTIVE;
1005 GO_WINDOW(1);
1006 }
1007 }
1008 }
1009
1010
1011
1012 /*
1013 * Start outputting on the interface.
1014 */
1015 static void
1016 ex_start(struct ifnet *ifp)
1017 {
1018 struct ex_softc *sc = ifp->if_softc;
1019 bus_space_tag_t iot = sc->sc_iot;
1020 bus_space_handle_t ioh = sc->sc_ioh;
1021 volatile struct ex_fraghdr *fr = NULL;
1022 volatile struct ex_dpd *dpd = NULL, *prevdpd = NULL;
1023 struct ex_txdesc *txp;
1024 struct mbuf *mb_head;
1025 bus_dmamap_t dmamap;
1026 int m_csumflags, offset, seglen, totlen, segment, error;
1027 uint32_t csum_flags;
1028
1029 if (sc->tx_head || sc->tx_free == NULL)
1030 return;
1031
1032 txp = NULL;
1033
1034 /*
1035 * We're finished if there is nothing more to add to the list or if
1036 * we're all filled up with buffers to transmit.
1037 */
1038 while (sc->tx_free != NULL) {
1039 /*
1040 * Grab a packet to transmit.
1041 */
1042 IFQ_DEQUEUE(&ifp->if_snd, mb_head);
1043 if (mb_head == NULL)
1044 break;
1045
1046 /*
1047 * mb_head might be updated later,
1048 * so preserve csum_flags here.
1049 */
1050 m_csumflags = mb_head->m_pkthdr.csum_flags;
1051
1052 /*
1053 * Get pointer to next available tx desc.
1054 */
1055 txp = sc->tx_free;
1056 dmamap = txp->tx_dmamap;
1057
1058 /*
1059 * Go through each of the mbufs in the chain and initialize
1060 * the transmit buffer descriptors with the physical address
1061 * and size of the mbuf.
1062 */
1063 reload:
1064 error = bus_dmamap_load_mbuf(sc->sc_dmat, dmamap,
1065 mb_head, BUS_DMA_WRITE|BUS_DMA_NOWAIT);
1066 switch (error) {
1067 case 0:
1068 /* Success. */
1069 break;
1070
1071 case EFBIG:
1072 {
1073 struct mbuf *mn;
1074
1075 /*
1076 * We ran out of segments. We have to recopy this
1077 * mbuf chain first. Bail out if we can't get the
1078 * new buffers.
1079 */
1080 aprint_error_dev(sc->sc_dev, "too many segments, ");
1081
1082 MGETHDR(mn, M_DONTWAIT, MT_DATA);
1083 if (mn == NULL) {
1084 m_freem(mb_head);
1085 aprint_error("aborting\n");
1086 goto out;
1087 }
1088 if (mb_head->m_pkthdr.len > MHLEN) {
1089 MCLGET(mn, M_DONTWAIT);
1090 if ((mn->m_flags & M_EXT) == 0) {
1091 m_freem(mn);
1092 m_freem(mb_head);
1093 aprint_error("aborting\n");
1094 goto out;
1095 }
1096 }
1097 m_copydata(mb_head, 0, mb_head->m_pkthdr.len,
1098 mtod(mn, void *));
1099 mn->m_pkthdr.len = mn->m_len = mb_head->m_pkthdr.len;
1100 m_freem(mb_head);
1101 mb_head = mn;
1102 aprint_error("retrying\n");
1103 goto reload;
1104 }
1105
1106 default:
1107 /*
1108 * Some other problem; report it.
1109 */
1110 aprint_error_dev(sc->sc_dev,
1111 "can't load mbuf chain, error = %d\n", error);
1112 m_freem(mb_head);
1113 goto out;
1114 }
1115
1116 /*
1117 * remove our tx desc from freelist.
1118 */
1119 sc->tx_free = txp->tx_next;
1120 txp->tx_next = NULL;
1121
1122 fr = &txp->tx_dpd->dpd_frags[0];
1123 totlen = 0;
1124 for (segment = 0; segment < dmamap->dm_nsegs; segment++, fr++) {
1125 fr->fr_addr = htole32(dmamap->dm_segs[segment].ds_addr);
1126 seglen = dmamap->dm_segs[segment].ds_len;
1127 fr->fr_len = htole32(seglen);
1128 totlen += seglen;
1129 }
1130 if (__predict_false(totlen <= EX_IP4CSUMTX_PADLEN &&
1131 (m_csumflags & M_CSUM_IPv4) != 0)) {
1132 /*
1133 * Pad short packets to avoid ip4csum-tx bug.
1134 *
1135 * XXX Should we still consider if such short
1136 * (36 bytes or less) packets might already
1137 * occupy EX_NTFRAG (== 32) fragments here?
1138 */
1139 KASSERT(segment < EX_NTFRAGS);
1140 fr->fr_addr = htole32(DPDMEMPAD_DMADDR(sc));
1141 seglen = EX_IP4CSUMTX_PADLEN + 1 - totlen;
1142 fr->fr_len = htole32(EX_FR_LAST | seglen);
1143 totlen += seglen;
1144 } else {
1145 fr--;
1146 fr->fr_len |= htole32(EX_FR_LAST);
1147 }
1148 txp->tx_mbhead = mb_head;
1149
1150 bus_dmamap_sync(sc->sc_dmat, dmamap, 0, dmamap->dm_mapsize,
1151 BUS_DMASYNC_PREWRITE);
1152
1153 dpd = txp->tx_dpd;
1154 dpd->dpd_nextptr = 0;
1155 dpd->dpd_fsh = htole32(totlen);
1156
1157 /* Byte-swap constants so compiler can optimize. */
1158
1159 if (sc->ex_conf & EX_CONF_90XB) {
1160 csum_flags = 0;
1161
1162 if (m_csumflags & M_CSUM_IPv4)
1163 csum_flags |= htole32(EX_DPD_IPCKSUM);
1164
1165 if (m_csumflags & M_CSUM_TCPv4)
1166 csum_flags |= htole32(EX_DPD_TCPCKSUM);
1167 else if (m_csumflags & M_CSUM_UDPv4)
1168 csum_flags |= htole32(EX_DPD_UDPCKSUM);
1169
1170 dpd->dpd_fsh |= csum_flags;
1171 } else {
1172 KDASSERT((mb_head->m_pkthdr.csum_flags &
1173 (M_CSUM_IPv4|M_CSUM_TCPv4|M_CSUM_UDPv4)) == 0);
1174 }
1175
1176 bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap,
1177 ((const char *)(intptr_t)dpd - (const char *)sc->sc_dpd),
1178 sizeof (struct ex_dpd),
1179 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1180
1181 /*
1182 * No need to stall the download engine, we know it's
1183 * not busy right now.
1184 *
1185 * Fix up pointers in both the "soft" tx and the physical
1186 * tx list.
1187 */
1188 if (sc->tx_head != NULL) {
1189 prevdpd = sc->tx_tail->tx_dpd;
1190 offset = ((const char *)(intptr_t)prevdpd - (const char *)sc->sc_dpd);
1191 bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap,
1192 offset, sizeof (struct ex_dpd),
1193 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
1194 prevdpd->dpd_nextptr = htole32(DPD_DMADDR(sc, txp));
1195 bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap,
1196 offset, sizeof (struct ex_dpd),
1197 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1198 sc->tx_tail->tx_next = txp;
1199 sc->tx_tail = txp;
1200 } else {
1201 sc->tx_tail = sc->tx_head = txp;
1202 }
1203
1204 #if NBPFILTER > 0
1205 /*
1206 * Pass packet to bpf if there is a listener.
1207 */
1208 if (ifp->if_bpf)
1209 bpf_mtap(ifp->if_bpf, mb_head);
1210 #endif
1211 }
1212 out:
1213 if (sc->tx_head) {
1214 sc->tx_tail->tx_dpd->dpd_fsh |= htole32(EX_DPD_DNIND);
1215 bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap,
1216 ((char *)sc->tx_tail->tx_dpd - (char *)sc->sc_dpd),
1217 sizeof (struct ex_dpd),
1218 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1219 ifp->if_flags |= IFF_OACTIVE;
1220 bus_space_write_2(iot, ioh, ELINK_COMMAND, ELINK_DNUNSTALL);
1221 bus_space_write_4(iot, ioh, ELINK_DNLISTPTR,
1222 DPD_DMADDR(sc, sc->tx_head));
1223
1224 /* trigger watchdog */
1225 ifp->if_timer = 5;
1226 }
1227 }
1228
1229
1230 int
1231 ex_intr(void *arg)
1232 {
1233 struct ex_softc *sc = arg;
1234 bus_space_tag_t iot = sc->sc_iot;
1235 bus_space_handle_t ioh = sc->sc_ioh;
1236 uint16_t stat;
1237 int ret = 0;
1238 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
1239
1240 if ((ifp->if_flags & IFF_RUNNING) == 0 ||
1241 !device_is_active(sc->sc_dev))
1242 return (0);
1243
1244 for (;;) {
1245 stat = bus_space_read_2(iot, ioh, ELINK_STATUS);
1246
1247 if ((stat & XL_WATCHED_INTERRUPTS) == 0) {
1248 if ((stat & INTR_LATCH) == 0) {
1249 #if 0
1250 aprint_error_dev(sc->sc_dev,
1251 "intr latch cleared\n");
1252 #endif
1253 break;
1254 }
1255 }
1256
1257 ret = 1;
1258
1259 /*
1260 * Acknowledge interrupts.
1261 */
1262 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR |
1263 (stat & (XL_WATCHED_INTERRUPTS | INTR_LATCH)));
1264 if (sc->intr_ack)
1265 (*sc->intr_ack)(sc);
1266
1267 if (stat & HOST_ERROR) {
1268 aprint_error_dev(sc->sc_dev,
1269 "adapter failure (%x)\n", stat);
1270 ex_reset(sc);
1271 ex_init(ifp);
1272 return 1;
1273 }
1274 if (stat & UPD_STATS) {
1275 ex_getstats(sc);
1276 }
1277 if (stat & TX_COMPLETE) {
1278 ex_txstat(sc);
1279 #if 0
1280 if (stat & DN_COMPLETE)
1281 aprint_error_dev(sc->sc_dev,
1282 "Ignoring Dn interrupt (%x)\n", stat);
1283 #endif
1284 /*
1285 * In some rare cases, both Tx Complete and
1286 * Dn Complete bits are set. However, the packet
1287 * has been reloaded in ex_txstat() and should not
1288 * handle the Dn Complete event here.
1289 * Hence the "else" below.
1290 */
1291 } else if (stat & DN_COMPLETE) {
1292 struct ex_txdesc *txp, *ptxp = NULL;
1293 bus_dmamap_t txmap;
1294
1295 /* reset watchdog timer, was set in ex_start() */
1296 ifp->if_timer = 0;
1297
1298 for (txp = sc->tx_head; txp != NULL;
1299 txp = txp->tx_next) {
1300 bus_dmamap_sync(sc->sc_dmat,
1301 sc->sc_dpd_dmamap,
1302 (char *)txp->tx_dpd - (char *)sc->sc_dpd,
1303 sizeof (struct ex_dpd),
1304 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
1305 if (txp->tx_mbhead != NULL) {
1306 txmap = txp->tx_dmamap;
1307 bus_dmamap_sync(sc->sc_dmat, txmap,
1308 0, txmap->dm_mapsize,
1309 BUS_DMASYNC_POSTWRITE);
1310 bus_dmamap_unload(sc->sc_dmat, txmap);
1311 m_freem(txp->tx_mbhead);
1312 txp->tx_mbhead = NULL;
1313 }
1314 ptxp = txp;
1315 }
1316
1317 /*
1318 * Move finished tx buffers back to the tx free list.
1319 */
1320 if (sc->tx_free) {
1321 sc->tx_ftail->tx_next = sc->tx_head;
1322 sc->tx_ftail = ptxp;
1323 } else
1324 sc->tx_ftail = sc->tx_free = sc->tx_head;
1325
1326 sc->tx_head = sc->tx_tail = NULL;
1327 ifp->if_flags &= ~IFF_OACTIVE;
1328
1329 if (sc->tx_succ_ok < 256)
1330 sc->tx_succ_ok++;
1331 }
1332
1333 if (stat & UP_COMPLETE) {
1334 struct ex_rxdesc *rxd;
1335 struct mbuf *m;
1336 struct ex_upd *upd;
1337 bus_dmamap_t rxmap;
1338 uint32_t pktstat;
1339
1340 rcvloop:
1341 rxd = sc->rx_head;
1342 rxmap = rxd->rx_dmamap;
1343 m = rxd->rx_mbhead;
1344 upd = rxd->rx_upd;
1345
1346 bus_dmamap_sync(sc->sc_dmat, rxmap, 0,
1347 rxmap->dm_mapsize,
1348 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
1349 bus_dmamap_sync(sc->sc_dmat, sc->sc_upd_dmamap,
1350 ((char *)upd - (char *)sc->sc_upd),
1351 sizeof (struct ex_upd),
1352 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
1353 pktstat = le32toh(upd->upd_pktstatus);
1354
1355 if (pktstat & EX_UPD_COMPLETE) {
1356 /*
1357 * Remove first packet from the chain.
1358 */
1359 sc->rx_head = rxd->rx_next;
1360 rxd->rx_next = NULL;
1361
1362 /*
1363 * Add a new buffer to the receive chain.
1364 * If this fails, the old buffer is recycled
1365 * instead.
1366 */
1367 if (ex_add_rxbuf(sc, rxd) == 0) {
1368 uint16_t total_len;
1369
1370 if (pktstat &
1371 ((sc->sc_ethercom.ec_capenable &
1372 ETHERCAP_VLAN_MTU) ?
1373 EX_UPD_ERR_VLAN : EX_UPD_ERR)) {
1374 ifp->if_ierrors++;
1375 m_freem(m);
1376 goto rcvloop;
1377 }
1378
1379 total_len = pktstat & EX_UPD_PKTLENMASK;
1380 if (total_len <
1381 sizeof(struct ether_header)) {
1382 m_freem(m);
1383 goto rcvloop;
1384 }
1385 m->m_pkthdr.rcvif = ifp;
1386 m->m_pkthdr.len = m->m_len = total_len;
1387 #if NBPFILTER > 0
1388 if (ifp->if_bpf)
1389 bpf_mtap(ifp->if_bpf, m);
1390 #endif
1391 /*
1392 * Set the incoming checksum information for the packet.
1393 */
1394 if ((sc->ex_conf & EX_CONF_90XB) != 0 &&
1395 (pktstat & EX_UPD_IPCHECKED) != 0) {
1396 m->m_pkthdr.csum_flags |= M_CSUM_IPv4;
1397 if (pktstat & EX_UPD_IPCKSUMERR)
1398 m->m_pkthdr.csum_flags |= M_CSUM_IPv4_BAD;
1399 if (pktstat & EX_UPD_TCPCHECKED) {
1400 m->m_pkthdr.csum_flags |= M_CSUM_TCPv4;
1401 if (pktstat & EX_UPD_TCPCKSUMERR)
1402 m->m_pkthdr.csum_flags |=
1403 M_CSUM_TCP_UDP_BAD;
1404 } else if (pktstat & EX_UPD_UDPCHECKED) {
1405 m->m_pkthdr.csum_flags |= M_CSUM_UDPv4;
1406 if (pktstat & EX_UPD_UDPCKSUMERR)
1407 m->m_pkthdr.csum_flags |=
1408 M_CSUM_TCP_UDP_BAD;
1409 }
1410 }
1411 (*ifp->if_input)(ifp, m);
1412 }
1413 goto rcvloop;
1414 }
1415 /*
1416 * Just in case we filled up all UPDs and the DMA engine
1417 * stalled. We could be more subtle about this.
1418 */
1419 if (bus_space_read_4(iot, ioh, ELINK_UPLISTPTR) == 0) {
1420 aprint_error_dev(sc->sc_dev,
1421 "uplistptr was 0\n");
1422 ex_init(ifp);
1423 } else if (bus_space_read_4(iot, ioh, ELINK_UPPKTSTATUS)
1424 & 0x2000) {
1425 aprint_error_dev(sc->sc_dev,
1426 "receive stalled\n");
1427 bus_space_write_2(iot, ioh, ELINK_COMMAND,
1428 ELINK_UPUNSTALL);
1429 }
1430 }
1431
1432 #if NRND > 0
1433 if (stat)
1434 rnd_add_uint32(&sc->rnd_source, stat);
1435 #endif
1436 }
1437
1438 /* no more interrupts */
1439 if (ret && IFQ_IS_EMPTY(&ifp->if_snd) == 0)
1440 ex_start(ifp);
1441 return ret;
1442 }
1443
1444 static int
1445 ex_ifflags_cb(struct ethercom *ec)
1446 {
1447 struct ifnet *ifp = &ec->ec_if;
1448 struct ex_softc *sc = ifp->if_softc;
1449 int change = ifp->if_flags ^ sc->sc_if_flags;
1450
1451 if ((change & ~(IFF_CANTCHANGE|IFF_DEBUG)) != 0)
1452 return ENETRESET;
1453 else if ((change & IFF_PROMISC) != 0)
1454 ex_set_mc(sc);
1455 return 0;
1456 }
1457
1458 int
1459 ex_ioctl(struct ifnet *ifp, u_long cmd, void *data)
1460 {
1461 struct ex_softc *sc = ifp->if_softc;
1462 struct ifreq *ifr = (struct ifreq *)data;
1463 int s, error;
1464
1465 s = splnet();
1466
1467 switch (cmd) {
1468 case SIOCSIFMEDIA:
1469 case SIOCGIFMEDIA:
1470 error = ifmedia_ioctl(ifp, ifr, &sc->ex_mii.mii_media, cmd);
1471 break;
1472 default:
1473 if ((error = ether_ioctl(ifp, cmd, data)) != ENETRESET)
1474 break;
1475
1476 error = 0;
1477
1478 if (cmd != SIOCADDMULTI && cmd != SIOCDELMULTI)
1479 ;
1480 else if (ifp->if_flags & IFF_RUNNING) {
1481 /*
1482 * Multicast list has changed; set the hardware filter
1483 * accordingly.
1484 */
1485 ex_set_mc(sc);
1486 }
1487 break;
1488 }
1489
1490 sc->sc_if_flags = ifp->if_flags;
1491 splx(s);
1492 return (error);
1493 }
1494
1495 void
1496 ex_getstats(struct ex_softc *sc)
1497 {
1498 bus_space_handle_t ioh = sc->sc_ioh;
1499 bus_space_tag_t iot = sc->sc_iot;
1500 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
1501 uint8_t upperok;
1502
1503 GO_WINDOW(6);
1504 upperok = bus_space_read_1(iot, ioh, UPPER_FRAMES_OK);
1505 ifp->if_ipackets += bus_space_read_1(iot, ioh, RX_FRAMES_OK);
1506 ifp->if_ipackets += (upperok & 0x03) << 8;
1507 ifp->if_opackets += bus_space_read_1(iot, ioh, TX_FRAMES_OK);
1508 ifp->if_opackets += (upperok & 0x30) << 4;
1509 ifp->if_ierrors += bus_space_read_1(iot, ioh, RX_OVERRUNS);
1510 ifp->if_collisions += bus_space_read_1(iot, ioh, TX_COLLISIONS);
1511 /*
1512 * There seems to be no way to get the exact number of collisions,
1513 * this is the number that occurred at the very least.
1514 */
1515 ifp->if_collisions += 2 * bus_space_read_1(iot, ioh,
1516 TX_AFTER_X_COLLISIONS);
1517 /*
1518 * Interface byte counts are counted by ether_input() and
1519 * ether_output(), so don't accumulate them here. Just
1520 * read the NIC counters so they don't generate overflow interrupts.
1521 * Upper byte counters are latched from reading the totals, so
1522 * they don't need to be read if we don't need their values.
1523 */
1524 (void)bus_space_read_2(iot, ioh, RX_TOTAL_OK);
1525 (void)bus_space_read_2(iot, ioh, TX_TOTAL_OK);
1526
1527 /*
1528 * Clear the following to avoid stats overflow interrupts
1529 */
1530 (void)bus_space_read_1(iot, ioh, TX_DEFERRALS);
1531 (void)bus_space_read_1(iot, ioh, TX_AFTER_1_COLLISION);
1532 (void)bus_space_read_1(iot, ioh, TX_NO_SQE);
1533 (void)bus_space_read_1(iot, ioh, TX_CD_LOST);
1534 GO_WINDOW(4);
1535 (void)bus_space_read_1(iot, ioh, ELINK_W4_BADSSD);
1536 GO_WINDOW(1);
1537 }
1538
1539 void
1540 ex_printstats(struct ex_softc *sc)
1541 {
1542 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
1543
1544 ex_getstats(sc);
1545 printf("in %llu out %llu ierror %llu oerror %llu ibytes %llu obytes "
1546 "%llu\n", (unsigned long long)ifp->if_ipackets,
1547 (unsigned long long)ifp->if_opackets,
1548 (unsigned long long)ifp->if_ierrors,
1549 (unsigned long long)ifp->if_oerrors,
1550 (unsigned long long)ifp->if_ibytes,
1551 (unsigned long long)ifp->if_obytes);
1552 }
1553
1554 void
1555 ex_tick(void *arg)
1556 {
1557 struct ex_softc *sc = arg;
1558 int s;
1559
1560 if (!device_is_active(sc->sc_dev))
1561 return;
1562
1563 s = splnet();
1564
1565 if (sc->ex_conf & EX_CONF_MII)
1566 mii_tick(&sc->ex_mii);
1567
1568 if (!(bus_space_read_2((sc)->sc_iot, (sc)->sc_ioh, ELINK_STATUS)
1569 & COMMAND_IN_PROGRESS))
1570 ex_getstats(sc);
1571
1572 splx(s);
1573
1574 callout_reset(&sc->ex_mii_callout, hz, ex_tick, sc);
1575 }
1576
1577 void
1578 ex_reset(struct ex_softc *sc)
1579 {
1580 uint16_t val = GLOBAL_RESET;
1581
1582 if (sc->ex_conf & EX_CONF_RESETHACK)
1583 val |= 0x10;
1584 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_COMMAND, val);
1585 /*
1586 * XXX apparently the command in progress bit can't be trusted
1587 * during a reset, so we just always wait this long. Fortunately
1588 * we normally only reset the chip during autoconfig.
1589 */
1590 delay(100000);
1591 ex_waitcmd(sc);
1592 }
1593
1594 void
1595 ex_watchdog(struct ifnet *ifp)
1596 {
1597 struct ex_softc *sc = ifp->if_softc;
1598
1599 log(LOG_ERR, "%s: device timeout\n", device_xname(sc->sc_dev));
1600 ++sc->sc_ethercom.ec_if.if_oerrors;
1601
1602 ex_reset(sc);
1603 ex_init(ifp);
1604 }
1605
1606 void
1607 ex_stop(struct ifnet *ifp, int disable)
1608 {
1609 struct ex_softc *sc = ifp->if_softc;
1610 bus_space_tag_t iot = sc->sc_iot;
1611 bus_space_handle_t ioh = sc->sc_ioh;
1612 struct ex_txdesc *tx;
1613 struct ex_rxdesc *rx;
1614 int i;
1615
1616 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_DISABLE);
1617 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_DISABLE);
1618 bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER);
1619
1620 for (tx = sc->tx_head ; tx != NULL; tx = tx->tx_next) {
1621 if (tx->tx_mbhead == NULL)
1622 continue;
1623 m_freem(tx->tx_mbhead);
1624 tx->tx_mbhead = NULL;
1625 bus_dmamap_unload(sc->sc_dmat, tx->tx_dmamap);
1626 tx->tx_dpd->dpd_fsh = tx->tx_dpd->dpd_nextptr = 0;
1627 bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap,
1628 ((char *)tx->tx_dpd - (char *)sc->sc_dpd),
1629 sizeof (struct ex_dpd),
1630 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1631 }
1632 sc->tx_tail = sc->tx_head = NULL;
1633 ex_init_txdescs(sc);
1634
1635 sc->rx_tail = sc->rx_head = 0;
1636 for (i = 0; i < EX_NUPD; i++) {
1637 rx = &sc->sc_rxdescs[i];
1638 if (rx->rx_mbhead != NULL) {
1639 bus_dmamap_unload(sc->sc_dmat, rx->rx_dmamap);
1640 m_freem(rx->rx_mbhead);
1641 rx->rx_mbhead = NULL;
1642 }
1643 ex_add_rxbuf(sc, rx);
1644 }
1645
1646 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | INTR_LATCH);
1647
1648 callout_stop(&sc->ex_mii_callout);
1649 if (sc->ex_conf & EX_CONF_MII)
1650 mii_down(&sc->ex_mii);
1651
1652 if (disable)
1653 ex_disable(sc);
1654
1655 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
1656 sc->sc_if_flags = ifp->if_flags;
1657 ifp->if_timer = 0;
1658 }
1659
1660 static void
1661 ex_init_txdescs(struct ex_softc *sc)
1662 {
1663 int i;
1664
1665 for (i = 0; i < EX_NDPD; i++) {
1666 sc->sc_txdescs[i].tx_dmamap = sc->sc_tx_dmamaps[i];
1667 sc->sc_txdescs[i].tx_dpd = &sc->sc_dpd[i];
1668 if (i < EX_NDPD - 1)
1669 sc->sc_txdescs[i].tx_next = &sc->sc_txdescs[i + 1];
1670 else
1671 sc->sc_txdescs[i].tx_next = NULL;
1672 }
1673 sc->tx_free = &sc->sc_txdescs[0];
1674 sc->tx_ftail = &sc->sc_txdescs[EX_NDPD-1];
1675 }
1676
1677
1678 int
1679 ex_activate(device_t self, enum devact act)
1680 {
1681 struct ex_softc *sc = device_private(self);
1682
1683 switch (act) {
1684 case DVACT_DEACTIVATE:
1685 if_deactivate(&sc->sc_ethercom.ec_if);
1686 return 0;
1687 default:
1688 return EOPNOTSUPP;
1689 }
1690 }
1691
1692 int
1693 ex_detach(struct ex_softc *sc)
1694 {
1695 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
1696 struct ex_rxdesc *rxd;
1697 int i;
1698
1699 /* Succeed now if there's no work to do. */
1700 if ((sc->ex_flags & EX_FLAGS_ATTACHED) == 0)
1701 return (0);
1702
1703 /* Unhook our tick handler. */
1704 callout_stop(&sc->ex_mii_callout);
1705
1706 if (sc->ex_conf & EX_CONF_MII) {
1707 /* Detach all PHYs */
1708 mii_detach(&sc->ex_mii, MII_PHY_ANY, MII_OFFSET_ANY);
1709 }
1710
1711 /* Delete all remaining media. */
1712 ifmedia_delete_instance(&sc->ex_mii.mii_media, IFM_INST_ANY);
1713
1714 #if NRND > 0
1715 rnd_detach_source(&sc->rnd_source);
1716 #endif
1717 ether_ifdetach(ifp);
1718 if_detach(ifp);
1719
1720 for (i = 0; i < EX_NUPD; i++) {
1721 rxd = &sc->sc_rxdescs[i];
1722 if (rxd->rx_mbhead != NULL) {
1723 bus_dmamap_unload(sc->sc_dmat, rxd->rx_dmamap);
1724 m_freem(rxd->rx_mbhead);
1725 rxd->rx_mbhead = NULL;
1726 }
1727 }
1728 for (i = 0; i < EX_NUPD; i++)
1729 bus_dmamap_destroy(sc->sc_dmat, sc->sc_rx_dmamaps[i]);
1730 for (i = 0; i < EX_NDPD; i++)
1731 bus_dmamap_destroy(sc->sc_dmat, sc->sc_tx_dmamaps[i]);
1732 bus_dmamap_unload(sc->sc_dmat, sc->sc_dpd_dmamap);
1733 bus_dmamap_destroy(sc->sc_dmat, sc->sc_dpd_dmamap);
1734 bus_dmamem_unmap(sc->sc_dmat, (void *)sc->sc_dpd,
1735 EX_NDPD * sizeof (struct ex_dpd));
1736 bus_dmamem_free(sc->sc_dmat, &sc->sc_dseg, sc->sc_drseg);
1737 bus_dmamap_unload(sc->sc_dmat, sc->sc_upd_dmamap);
1738 bus_dmamap_destroy(sc->sc_dmat, sc->sc_upd_dmamap);
1739 bus_dmamem_unmap(sc->sc_dmat, (void *)sc->sc_upd,
1740 EX_NUPD * sizeof (struct ex_upd));
1741 bus_dmamem_free(sc->sc_dmat, &sc->sc_useg, sc->sc_urseg);
1742
1743 pmf_device_deregister(sc->sc_dev);
1744
1745 return (0);
1746 }
1747
1748 /*
1749 * Before reboots, reset card completely.
1750 */
1751 static bool
1752 ex_shutdown(device_t self, int flags)
1753 {
1754 struct ex_softc *sc = device_private(self);
1755
1756 ex_stop(&sc->sc_ethercom.ec_if, 1);
1757 /*
1758 * Make sure the interface is powered up when we reboot,
1759 * otherwise firmware on some systems gets really confused.
1760 */
1761 (void) ex_enable(sc);
1762 return true;
1763 }
1764
1765 /*
1766 * Read EEPROM data.
1767 * XXX what to do if EEPROM doesn't unbusy?
1768 */
1769 uint16_t
1770 ex_read_eeprom(struct ex_softc *sc, int offset)
1771 {
1772 bus_space_tag_t iot = sc->sc_iot;
1773 bus_space_handle_t ioh = sc->sc_ioh;
1774 uint16_t data = 0, cmd = READ_EEPROM;
1775 int off;
1776
1777 off = sc->ex_conf & EX_CONF_EEPROM_OFF ? 0x30 : 0;
1778 cmd = sc->ex_conf & EX_CONF_EEPROM_8BIT ? READ_EEPROM8 : READ_EEPROM;
1779
1780 GO_WINDOW(0);
1781 if (ex_eeprom_busy(sc))
1782 goto out;
1783 bus_space_write_2(iot, ioh, ELINK_W0_EEPROM_COMMAND,
1784 cmd | (off + (offset & 0x3f)));
1785 if (ex_eeprom_busy(sc))
1786 goto out;
1787 data = bus_space_read_2(iot, ioh, ELINK_W0_EEPROM_DATA);
1788 out:
1789 return data;
1790 }
1791
1792 static int
1793 ex_eeprom_busy(struct ex_softc *sc)
1794 {
1795 bus_space_tag_t iot = sc->sc_iot;
1796 bus_space_handle_t ioh = sc->sc_ioh;
1797 int i = 100;
1798
1799 while (i--) {
1800 if (!(bus_space_read_2(iot, ioh, ELINK_W0_EEPROM_COMMAND) &
1801 EEPROM_BUSY))
1802 return 0;
1803 delay(100);
1804 }
1805 aprint_error_dev(sc->sc_dev, "eeprom stays busy.\n");
1806 return (1);
1807 }
1808
1809 /*
1810 * Create a new rx buffer and add it to the 'soft' rx list.
1811 */
1812 static int
1813 ex_add_rxbuf(struct ex_softc *sc, struct ex_rxdesc *rxd)
1814 {
1815 struct mbuf *m, *oldm;
1816 bus_dmamap_t rxmap;
1817 int error, rval = 0;
1818
1819 oldm = rxd->rx_mbhead;
1820 rxmap = rxd->rx_dmamap;
1821
1822 MGETHDR(m, M_DONTWAIT, MT_DATA);
1823 if (m != NULL) {
1824 MCLGET(m, M_DONTWAIT);
1825 if ((m->m_flags & M_EXT) == 0) {
1826 m_freem(m);
1827 if (oldm == NULL)
1828 return 1;
1829 m = oldm;
1830 MRESETDATA(m);
1831 rval = 1;
1832 }
1833 } else {
1834 if (oldm == NULL)
1835 return 1;
1836 m = oldm;
1837 MRESETDATA(m);
1838 rval = 1;
1839 }
1840
1841 /*
1842 * Setup the DMA map for this receive buffer.
1843 */
1844 if (m != oldm) {
1845 if (oldm != NULL)
1846 bus_dmamap_unload(sc->sc_dmat, rxmap);
1847 error = bus_dmamap_load(sc->sc_dmat, rxmap,
1848 m->m_ext.ext_buf, MCLBYTES, NULL,
1849 BUS_DMA_READ|BUS_DMA_NOWAIT);
1850 if (error) {
1851 aprint_error_dev(sc->sc_dev, "can't load rx buffer, error = %d\n",
1852 error);
1853 panic("ex_add_rxbuf"); /* XXX */
1854 }
1855 }
1856
1857 /*
1858 * Align for data after 14 byte header.
1859 */
1860 m->m_data += 2;
1861
1862 rxd->rx_mbhead = m;
1863 rxd->rx_upd->upd_pktstatus = htole32(MCLBYTES - 2);
1864 rxd->rx_upd->upd_frags[0].fr_addr =
1865 htole32(rxmap->dm_segs[0].ds_addr + 2);
1866 rxd->rx_upd->upd_nextptr = 0;
1867
1868 /*
1869 * Attach it to the end of the list.
1870 */
1871 if (sc->rx_head != NULL) {
1872 sc->rx_tail->rx_next = rxd;
1873 sc->rx_tail->rx_upd->upd_nextptr = htole32(sc->sc_upddma +
1874 ((char *)rxd->rx_upd - (char *)sc->sc_upd));
1875 bus_dmamap_sync(sc->sc_dmat, sc->sc_upd_dmamap,
1876 (char *)sc->rx_tail->rx_upd - (char *)sc->sc_upd,
1877 sizeof (struct ex_upd),
1878 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1879 } else {
1880 sc->rx_head = rxd;
1881 }
1882 sc->rx_tail = rxd;
1883
1884 bus_dmamap_sync(sc->sc_dmat, rxmap, 0, rxmap->dm_mapsize,
1885 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1886 bus_dmamap_sync(sc->sc_dmat, sc->sc_upd_dmamap,
1887 ((char *)rxd->rx_upd - (char *)sc->sc_upd),
1888 sizeof (struct ex_upd), BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1889 return (rval);
1890 }
1891
1892 uint32_t
1893 ex_mii_bitbang_read(device_t self)
1894 {
1895 struct ex_softc *sc = device_private(self);
1896
1897 /* We're already in Window 4. */
1898 return (bus_space_read_2(sc->sc_iot, sc->sc_ioh, ELINK_W4_PHYSMGMT));
1899 }
1900
1901 void
1902 ex_mii_bitbang_write(device_t self, uint32_t val)
1903 {
1904 struct ex_softc *sc = device_private(self);
1905
1906 /* We're already in Window 4. */
1907 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_W4_PHYSMGMT, val);
1908 }
1909
1910 int
1911 ex_mii_readreg(device_t v, int phy, int reg)
1912 {
1913 struct ex_softc *sc = device_private(v);
1914 int val;
1915
1916 if ((sc->ex_conf & EX_CONF_INTPHY) && phy != ELINK_INTPHY_ID)
1917 return 0;
1918
1919 GO_WINDOW(4);
1920
1921 val = mii_bitbang_readreg(v, &ex_mii_bitbang_ops, phy, reg);
1922
1923 GO_WINDOW(1);
1924
1925 return (val);
1926 }
1927
1928 void
1929 ex_mii_writereg(device_t v, int phy, int reg, int data)
1930 {
1931 struct ex_softc *sc = device_private(v);
1932
1933 GO_WINDOW(4);
1934
1935 mii_bitbang_writereg(v, &ex_mii_bitbang_ops, phy, reg, data);
1936
1937 GO_WINDOW(1);
1938 }
1939
1940 void
1941 ex_mii_statchg(device_t v)
1942 {
1943 struct ex_softc *sc = device_private(v);
1944 bus_space_tag_t iot = sc->sc_iot;
1945 bus_space_handle_t ioh = sc->sc_ioh;
1946 int mctl;
1947
1948 GO_WINDOW(3);
1949 mctl = bus_space_read_2(iot, ioh, ELINK_W3_MAC_CONTROL);
1950 if (sc->ex_mii.mii_media_active & IFM_FDX)
1951 mctl |= MAC_CONTROL_FDX;
1952 else
1953 mctl &= ~MAC_CONTROL_FDX;
1954 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, mctl);
1955 GO_WINDOW(1); /* back to operating window */
1956 }
1957
1958 int
1959 ex_enable(struct ex_softc *sc)
1960 {
1961 if (sc->enabled == 0 && sc->enable != NULL) {
1962 if ((*sc->enable)(sc) != 0) {
1963 aprint_error_dev(sc->sc_dev, "device enable failed\n");
1964 return (EIO);
1965 }
1966 sc->enabled = 1;
1967 }
1968 return (0);
1969 }
1970
1971 void
1972 ex_disable(struct ex_softc *sc)
1973 {
1974 if (sc->enabled == 1 && sc->disable != NULL) {
1975 (*sc->disable)(sc);
1976 sc->enabled = 0;
1977 }
1978 }
1979
NetBSD on the FriendlyARM MINI2440