sys/dev/ic/hd64570var.h

   1 /*      $NetBSD: hd64570var.h,v 1.7 2005/12/11 12:21:26 christos Exp $  */
   2
   3 /*
   4  * Copyright (c) 1999 Christian E. Hopps
   5  * Copyright (c) 1998 Vixie Enterprises
   6  * All rights reserved.
   7  *
   8  * Redistribution and use in source and binary forms, with or without
   9  * modification, are permitted provided that the following conditions
  10  * are met:
  11  *
  12  * 1. Redistributions of source code must retain the above copyright
  13  *    notice, this list of conditions and the following disclaimer.
  14  * 2. Redistributions in binary form must reproduce the above copyright
  15  *    notice, this list of conditions and the following disclaimer in the
  16  *    documentation and/or other materials provided with the distribution.
  17  * 3. Neither the name of Vixie Enterprises nor the names
  18  *    of its contributors may be used to endorse or promote products derived
  19  *    from this software without specific prior written permission.
  20  *
  21  * THIS SOFTWARE IS PROVIDED BY VIXIE ENTERPRISES AND
  22  * CONTRIBUTORS ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES,
  23  * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  24  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  25  * DISCLAIMED.  IN NO EVENT SHALL VIXIE ENTERPRISES OR
  26  * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  27  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  28  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
  29  * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  30  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  31  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
  32  * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  33  * SUCH DAMAGE.
  34  *
  35  * This software has been written for Vixie Enterprises by Michael Graff
  36  * <explorer@flame.org>.  To learn more about Vixie Enterprises, see
  37  * ``http://www.vix.com''.
  38  */
  39
  40 #ifndef _DEV_IC_HD64570VAR_H_
  41 #define _DEV_IC_HD64570VAR_H_
  42
  43 #include "bpfilter.h"
  44
  45 #define SCA_USE_FASTQ           /* use a split queue, one for fast traffic */
  46
  47 #define SCA_MTU         1500    /* hard coded */
  48
  49 #ifndef SCA_BSIZE
  50 #define SCA_BSIZE       (SCA_MTU + 4)   /* room for HDLC as well */
  51 #endif
  52
  53
  54 struct sca_softc;
  55 typedef struct sca_port sca_port_t;
  56 typedef struct sca_desc sca_desc_t;
  57
  58 /*
  59  * device DMA descriptor
  60  */
  61 struct sca_desc {
  62         u_int16_t       sd_chainp;      /* chain pointer */
  63         u_int16_t       sd_bufp;        /* buffer pointer (low bits) */
  64         u_int8_t        sd_hbufp;       /* buffer pointer (high bits) */
  65         u_int8_t        sd_unused0;
  66         u_int16_t       sd_buflen;              /* total length */
  67         u_int8_t        sd_stat;        /* status */
  68         u_int8_t        sd_unused1;
  69 };
  70 #define SCA_DESC_EOT            0x01
  71 #define SCA_DESC_CRC            0x04
  72 #define SCA_DESC_OVRN           0x08
  73 #define SCA_DESC_RESD           0x10
  74 #define SCA_DESC_ABORT          0x20
  75 #define SCA_DESC_SHRTFRM        0x40
  76 #define SCA_DESC_EOM            0x80
  77 #define SCA_DESC_ERRORS         0x7C
  78
  79 /*
  80  * softc structure for each port
  81  */
  82 struct sca_port {
  83         u_int msci_off;         /* offset for msci address for this port */
  84         u_int dmac_off;         /* offset of dmac address for this port */
  85
  86         u_int sp_port;
  87
  88         /*
  89          * CISCO keepalive stuff
  90          */
  91         u_int32_t       cka_lasttx;
  92         u_int32_t       cka_lastrx;
  93
  94         /*
  95          * clock values, clockrate = sysclock / tmc / 2^div;
  96          */
  97         u_int8_t        sp_eclock;      /* enable external clock generate */
  98         u_int8_t        sp_rxs;         /* recv clock source */
  99         u_int8_t        sp_txs;         /* transmit clock source */
 100         u_int8_t        sp_tmc;         /* clock constant */
 101
 102         /*
 103          * start of each important bit of information for transmit and
 104          * receive buffers.
 105          *
 106          * note: for non-DMA the phys and virtual version should be
 107          * the same value and should be an _offset_ from the beginning
 108          * of mapped memory described by sc_memt/sc_memh.
 109          */
 110         u_int sp_ntxdesc;               /* number of tx descriptors */
 111         u_int32_t sp_txdesc_p;          /* paddress of first tx desc */
 112         sca_desc_t *sp_txdesc;          /* vaddress of first tx desc */
 113         u_int32_t sp_txbuf_p;           /* paddress of first tx buffer */
 114         u_int8_t *sp_txbuf;             /* vaddress of first tx buffer */
 115
 116         volatile u_int sp_txcur;        /* last descriptor in chain */
 117         volatile u_int sp_txinuse;      /* descriptors in use */
 118         volatile u_int sp_txstart;      /* start descriptor */
 119
 120         u_int sp_nrxdesc;               /* number of rx descriptors */
 121         u_int32_t sp_rxdesc_p;          /* paddress of first rx desc */
 122         sca_desc_t *sp_rxdesc;          /* vaddress of first rx desc */
 123         u_int32_t sp_rxbuf_p;           /* paddress of first rx buffer */
 124         u_int8_t *sp_rxbuf;             /* vaddress of first rx buffer */
 125
 126         u_int sp_rxstart;               /* index of first descriptor */
 127         u_int sp_rxend;                 /* index of last descriptor */
 128
 129         struct ifnet sp_if;             /* the network information */
 130         struct ifqueue linkq;           /* link-level packets are high prio */
 131 #ifdef SCA_USE_FASTQ
 132         struct ifqueue fastq;           /* interactive packets */
 133 #endif
 134
 135         struct sca_softc *sca;          /* pointer to parent */
 136 };
 137
 138 /*
 139  * softc structure for the chip itself
 140  */
 141 struct sca_softc {
 142         struct device   *sc_parent;     /* our parent device, or NULL */
 143         int             sc_numports;    /* number of ports present */
 144         u_int32_t       sc_baseclock;   /* the base operating clock */
 145
 146         /*
 147          * a callback into the parent, since the SCA chip has no control
 148          * over DTR, we have to make a callback into the parent, which
 149          * might know about DTR.
 150          *
 151          * If the function pointer is NULL, no callback is specified.
 152          */
 153         void *sc_aux;
 154         void (*sc_dtr_callback)(void *, int, int);
 155         void (*sc_clock_callback)(void *, int, int);
 156
 157         /* used to read and write the device registers */
 158         u_int8_t        (*sc_read_1)(struct sca_softc *, u_int);
 159         u_int16_t       (*sc_read_2)(struct sca_softc *, u_int);
 160         void            (*sc_write_1)(struct sca_softc *, u_int, u_int8_t);
 161         void            (*sc_write_2)(struct sca_softc *, u_int, u_int16_t);
 162
 163         sca_port_t              sc_ports[2];
 164
 165         bus_space_tag_t         sc_iot;         /* io space for registers */
 166         bus_space_handle_t      sc_ioh;         /* io space for registers */
 167
 168         int                     sc_usedma;
 169         union {
 170                 struct {
 171                         bus_space_tag_t p_memt;         /* mem for non-DMA */
 172                         bus_space_handle_t p_memh;      /* mem for non-DMA */
 173                         bus_space_handle_t p_sca_ioh[16]; /* io for sca regs */
 174                         bus_size_t      p_pagesize;     /* memory page size */
 175                         bus_size_t      p_pagemask;     /* memory page mask */
 176                         u_int           p_pageshift;    /* memory page shift */
 177                         bus_size_t      p_npages;       /* num mem pages */
 178
 179                         void    (*p_set_page)(struct sca_softc *, bus_addr_t);
 180                         void    (*p_page_on)(struct sca_softc *);
 181                         void    (*p_page_off)(struct sca_softc *);
 182                 } u_paged;
 183                 struct {
 184                         bus_dma_tag_t   d_dmat; /* bus DMA tag */
 185                         bus_dmamap_t    d_dmam; /* bus DMA map */
 186                         bus_dma_segment_t d_seg;        /* bus DMA segment */
 187                         void *          d_dma_addr;     /* kva  of segment */
 188                         bus_size_t      d_allocsize;    /* size of region */
 189                 } u_dma;
 190         } sc_u;
 191 };
 192 #define scu_memt        sc_u.u_paged.p_memt
 193 #define scu_memh        sc_u.u_paged.p_memh
 194 #define scu_sca_ioh     sc_u.u_paged.p_sca_ioh
 195 #define scu_pagesize    sc_u.u_paged.p_pagesize
 196 #define scu_pagemask    sc_u.u_paged.p_pagemask
 197 #define scu_pageshift   sc_u.u_paged.p_pageshift
 198 #define scu_npages      sc_u.u_paged.p_npages
 199 #define scu_set_page    sc_u.u_paged.p_set_page
 200 #define scu_page_on     sc_u.u_paged.p_page_on
 201 #define scu_page_off    sc_u.u_paged.p_page_off
 202 #define scu_dmat        sc_u.u_dma.d_dmat
 203 #define scu_dmam        sc_u.u_dma.d_dmam
 204 #define scu_seg         sc_u.u_dma.d_seg
 205 #define scu_dma_addr    sc_u.u_dma.d_dma_addr
 206 #define scu_allocsize   sc_u.u_dma.d_allocsize
 207
 208 void    sca_init(struct sca_softc *);
 209 void    sca_port_attach(struct sca_softc *, u_int);
 210 int     sca_hardintr(struct sca_softc *);
 211 void    sca_shutdown(struct sca_softc *);
 212 void    sca_get_base_clock(struct sca_softc *);
 213 void    sca_print_clock_info(struct sca_softc *);
 214
 215 #endif /* _DEV_IC_HD64570VAR_H_ */