sys/dev/ic/ncr53c9xvar.h

   1 /*      $NetBSD: ncr53c9xvar.h,v 1.53 2009/09/02 10:34:05 tsutsui Exp $ */
   2
   3 /*-
   4  * Copyright (c) 1997 The NetBSD Foundation, Inc.
   5  * All rights reserved.
   6  *
   7  * This code is derived from software contributed to The NetBSD Foundation
   8  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
   9  * NASA Ames Research Center.
  10  *
  11  * Redistribution and use in source and binary forms, with or without
  12  * modification, are permitted provided that the following conditions
  13  * are met:
  14  * 1. Redistributions of source code must retain the above copyright
  15  *    notice, this list of conditions and the following disclaimer.
  16  * 2. Redistributions in binary form must reproduce the above copyright
  17  *    notice, this list of conditions and the following disclaimer in the
  18  *    documentation and/or other materials provided with the distribution.
  19  *
  20  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
  21  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  22  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  23  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
  24  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  25  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  26  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  27  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  28  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  29  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  30  * POSSIBILITY OF SUCH DAMAGE.
  31  */
  32
  33 /*
  34  * Copyright (c) 1994 Peter Galbavy.  All rights reserved.
  35  *
  36  * Redistribution and use in source and binary forms, with or without
  37  * modification, are permitted provided that the following conditions
  38  * are met:
  39  * 1. Redistributions of source code must retain the above copyright
  40  *    notice, this list of conditions and the following disclaimer.
  41  * 2. Redistributions in binary form must reproduce the above copyright
  42  *    notice, this list of conditions and the following disclaimer in the
  43  *    documentation and/or other materials provided with the distribution.
  44  * 3. All advertising materials mentioning features or use of this software
  45  *    must display the following acknowledgement:
  46  *      This product includes software developed by Peter Galbavy.
  47  * 4. The name of the author may not be used to endorse or promote products
  48  *    derived from this software without specific prior written permission.
  49  *
  50  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  51  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  52  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  53  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  54  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  55  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  56  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  57  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  58  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  59  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  60  */
  61
  62 #ifndef _DEV_IC_NCR53C9XVAR_H_
  63 #define _DEV_IC_NCR53C9XVAR_H_
  64
  65 #include <sys/simplelock.h>
  66
  67 /* Set this to 1 for normal debug, or 2 for per-target tracing. */
  68 /* #define NCR53C9X_DEBUG               1 */
  69
  70 /* Wide or differential can have 16 targets */
  71 #define NCR_NLUN                8
  72
  73 #define NCR_ABORT_TIMEOUT       2000    /* time to wait for abort */
  74 #define NCR_SENSE_TIMEOUT       1000    /* time to wait for sense */
  75
  76 #define FREQTOCCF(freq) (((freq + 4) / 5))
  77
  78 /*
  79  * NCR 53c9x variants.  Note, these values are used as indexes into
  80  * a table; don't modify them unless you know what you're doing.
  81  */
  82 #define NCR_VARIANT_ESP100              0
  83 #define NCR_VARIANT_ESP100A             1
  84 #define NCR_VARIANT_ESP200              2
  85 #define NCR_VARIANT_NCR53C94            3
  86 #define NCR_VARIANT_NCR53C96            4
  87 #define NCR_VARIANT_ESP406              5
  88 #define NCR_VARIANT_FAS408              6
  89 #define NCR_VARIANT_FAS216              7
  90 #define NCR_VARIANT_AM53C974            8
  91 #define NCR_VARIANT_FAS366              9
  92 #define NCR_VARIANT_NCR53C90_86C01      10
  93 #define NCR_VARIANT_MAX                 11
  94
  95 /*
  96  * ECB. Holds additional information for each SCSI command Comments: We
  97  * need a separate scsi command block because we may need to overwrite it
  98  * with a request sense command.  Basicly, we refrain from fiddling with
  99  * the scsipi_xfer struct (except do the expected updating of return values).
 100  * We'll generally update: xs->{flags,resid,error,sense,status} and
 101  * occasionally xs->retries.
 102  */
 103 struct ncr53c9x_ecb {
 104         TAILQ_ENTRY(ncr53c9x_ecb) chain;
 105         struct scsipi_xfer *xs; /* SCSI xfer ctrl block from above */
 106         int flags;
 107 #define ECB_ALLOC               0x01
 108 #define ECB_READY               0x02
 109 #define ECB_SENSE               0x04
 110 #define ECB_ABORT               0x40
 111 #define ECB_RESET               0x80
 112 #define ECB_TENTATIVE_DONE      0x100
 113         int timeout;
 114
 115         struct {
 116                 u_char  msg[3];                 /* Selection Id msg and tags */
 117                 struct scsipi_generic cmd;      /* SCSI command block */
 118         } cmd;
 119         uint8_t *daddr;         /* Saved data pointer */
 120         int      clen;          /* Size of command in cmd.cmd */
 121         int      dleft;         /* Residue */
 122         u_char   stat;          /* SCSI status byte */
 123         u_char   tag[2];        /* TAG bytes */
 124         u_char   pad[1];
 125
 126 #if NCR53C9X_DEBUG > 1
 127         char trace[1000];
 128 #endif
 129 };
 130 #if NCR53C9X_DEBUG > 1
 131 #define ECB_TRACE(ecb, msg, a, b) do { \
 132         const char *f = "[" msg "]"; \
 133         int n = strlen((ecb)->trace); \
 134         if (n < (sizeof((ecb)->trace)-100)) \
 135                 sprintf((ecb)->trace + n, f,  a, b); \
 136 } while(0)
 137 #else
 138 #define ECB_TRACE(ecb, msg, a, b)
 139 #endif
 140
 141 /*
 142  * Some info about each (possible) target and LUN on the SCSI bus.
 143  *
 144  * SCSI I and II devices can have up to 8 LUNs, each with up to 256
 145  * outstanding tags.  SCSI III devices have 64-bit LUN identifiers
 146  * that can be sparsely allocated.
 147  *
 148  * Since SCSI II devices can have up to 8 LUNs, we use an array
 149  * of 8 pointers to ncr53c9x_linfo structures for fast lookup.
 150  * Longer LUNs need to traverse the linked list.
 151  */
 152
 153 struct ncr53c9x_linfo {
 154         int64_t                 lun;
 155         LIST_ENTRY(ncr53c9x_linfo) link;
 156         time_t                  last_used;
 157         uint8_t                 used;   /* # slots in use */
 158         uint8_t                 avail;  /* where to start scanning */
 159         uint8_t                 busy;
 160         struct ncr53c9x_ecb     *untagged;
 161         struct ncr53c9x_ecb     *queued[256];
 162 };
 163
 164 struct ncr53c9x_tinfo {
 165         int     cmds;           /* # of commands processed */
 166         int     dconns;         /* # of disconnects */
 167         int     touts;          /* # of timeouts */
 168         int     perrs;          /* # of parity errors */
 169         int     senses;         /* # of request sense commands sent */
 170         uint8_t flags;
 171 #define T_NEGOTIATE     0x02    /* (Re)Negotiate synchronous options */
 172 #define T_SYNCMODE      0x08    /* SYNC mode has been negotiated */
 173 #define T_SYNCHOFF      0x10    /* SYNC mode for is permanently off */
 174 #define T_RSELECTOFF    0x20    /* RE-SELECT mode is off */
 175 #define T_TAG           0x40    /* Turn on TAG QUEUEs */
 176 #define T_WIDE          0x80    /* Negotiate wide options */
 177 #define T_WDTRSENT      0x04    /* WDTR message has been sent to */
 178         uint8_t period;         /* Period suggestion */
 179         uint8_t offset;         /* Offset suggestion */
 180         uint8_t cfg3;           /* per target config 3  */
 181         uint8_t nextag;         /* Next available tag */
 182         uint8_t width;          /* width suggesion */
 183         LIST_HEAD(lun_list, ncr53c9x_linfo) luns;
 184         struct ncr53c9x_linfo *lun[NCR_NLUN]; /* For speedy lookups */
 185 };
 186
 187 /* Look up a lun in a tinfo */
 188 #define TINFO_LUN(t, l) (                                       \
 189         (((l) < NCR_NLUN) && (((t)->lun[(l)]) != NULL))         \
 190                 ? ((t)->lun[(l)])                               \
 191                 : ncr53c9x_lunsearch((t), (int64_t)(l))         \
 192 )
 193
 194 /* Register a linenumber (for debugging) */
 195 #define LOGLINE(p)
 196
 197 #define NCR_SHOWECBS    0x01
 198 #define NCR_SHOWINTS    0x02
 199 #define NCR_SHOWCMDS    0x04
 200 #define NCR_SHOWMISC    0x08
 201 #define NCR_SHOWTRAC    0x10
 202 #define NCR_SHOWSTART   0x20
 203 #define NCR_SHOWPHASE   0x40
 204 #define NCR_SHOWDMA     0x80
 205 #define NCR_SHOWCCMDS   0x100
 206 #define NCR_SHOWMSGS    0x200
 207
 208 #ifdef NCR53C9X_DEBUG
 209 extern int ncr53c9x_debug;
 210 #define NCR_ECBS(str)   \
 211         do {if (ncr53c9x_debug & NCR_SHOWECBS) printf str;} while (0)
 212 #define NCR_MISC(str)   \
 213         do {if (ncr53c9x_debug & NCR_SHOWMISC) printf str;} while (0)
 214 #define NCR_INTS(str)   \
 215         do {if (ncr53c9x_debug & NCR_SHOWINTS) printf str;} while (0)
 216 #define NCR_TRACE(str)  \
 217         do {if (ncr53c9x_debug & NCR_SHOWTRAC) printf str;} while (0)
 218 #define NCR_CMDS(str)   \
 219         do {if (ncr53c9x_debug & NCR_SHOWCMDS) printf str;} while (0)
 220 #define NCR_START(str)  \
 221         do {if (ncr53c9x_debug & NCR_SHOWSTART) printf str;}while (0)
 222 #define NCR_PHASE(str)  \
 223         do {if (ncr53c9x_debug & NCR_SHOWPHASE) printf str;}while (0)
 224 #define NCR_DMA(str)    \
 225         do {if (ncr53c9x_debug & NCR_SHOWDMA) printf str;}while (0)
 226 #define NCR_MSGS(str)   \
 227         do {if (ncr53c9x_debug & NCR_SHOWMSGS) printf str;}while (0)
 228 #else
 229 #define NCR_ECBS(str)
 230 #define NCR_MISC(str)
 231 #define NCR_INTS(str)
 232 #define NCR_TRACE(str)
 233 #define NCR_CMDS(str)
 234 #define NCR_START(str)
 235 #define NCR_PHASE(str)
 236 #define NCR_DMA(str)
 237 #define NCR_MSGS(str)
 238 #endif
 239
 240 #define NCR_MAX_MSG_LEN 8
 241
 242 struct ncr53c9x_softc;
 243
 244 /*
 245  * Function switch used as glue to MD code.
 246  */
 247 struct ncr53c9x_glue {
 248         /* Mandatory entry points. */
 249         uint8_t (*gl_read_reg)(struct ncr53c9x_softc *, int);
 250         void    (*gl_write_reg)(struct ncr53c9x_softc *, int, uint8_t);
 251         int     (*gl_dma_isintr)(struct ncr53c9x_softc *);
 252         void    (*gl_dma_reset)(struct ncr53c9x_softc *);
 253         int     (*gl_dma_intr)(struct ncr53c9x_softc *);
 254         int     (*gl_dma_setup)(struct ncr53c9x_softc *,
 255                     uint8_t **, size_t *, int, size_t *);
 256         void    (*gl_dma_go)(struct ncr53c9x_softc *);
 257         void    (*gl_dma_stop)(struct ncr53c9x_softc *);
 258         int     (*gl_dma_isactive)(struct ncr53c9x_softc *);
 259
 260         /* Optional entry points. */
 261         void    (*gl_clear_latched_intr)(struct ncr53c9x_softc *);
 262 };
 263
 264 struct ncr53c9x_softc {
 265         device_t sc_dev;                        /* us as a device */
 266
 267         struct evcnt sc_intrcnt;                /* intr count */
 268         struct scsipi_adapter sc_adapter;       /* out scsipi adapter */
 269         struct scsipi_channel sc_channel;       /* our scsipi channel */
 270         device_t sc_child;              /* attached scsibus, if any */
 271         struct callout sc_watchdog;             /* periodic timer */
 272
 273         const struct ncr53c9x_glue *sc_glue;    /* glue to MD code */
 274
 275         int     sc_cfflags;                     /* Copy of config flags */
 276
 277         /* register defaults */
 278         uint8_t sc_cfg1;                        /* Config 1 */
 279         uint8_t sc_cfg2;                        /* Config 2, not ESP100 */
 280         uint8_t sc_cfg3;                        /* Config 3, ESP200,FAS */
 281         uint8_t sc_cfg3_fscsi;                  /* Chip-specific FSCSI bit */
 282         uint8_t sc_cfg4;                        /* Config 4, only ESP200 */
 283         uint8_t sc_cfg5;                        /* Config 5, only ESP200 */
 284         uint8_t sc_ccf;                         /* Clock Conversion */
 285         uint8_t sc_timeout;
 286
 287         /* register copies, see espreadregs() */
 288         uint8_t sc_espintr;
 289         uint8_t sc_espstat;
 290         uint8_t sc_espstep;
 291         uint8_t  sc_espstat2;
 292         uint8_t sc_espfflags;
 293
 294         /* Lists of command blocks */
 295         TAILQ_HEAD(ecb_list, ncr53c9x_ecb)
 296                 ready_list;
 297
 298         struct ncr53c9x_ecb *sc_nexus;          /* Current command */
 299         int     sc_ntarg;
 300         struct ncr53c9x_tinfo *sc_tinfo;
 301
 302         /* Data about the current nexus (updated for every cmd switch) */
 303         uint8_t *sc_dp;         /* Current data pointer */
 304         ssize_t sc_dleft;       /* Data left to transfer */
 305
 306         /* Adapter state */
 307         int     sc_phase;       /* Copy of what bus phase we are in */
 308         int     sc_prevphase;   /* Copy of what bus phase we were in */
 309         uint8_t sc_state;       /* State applicable to the adapter */
 310         uint8_t sc_flags;       /* See below */
 311         uint8_t sc_selid;
 312         uint8_t sc_lastcmd;
 313
 314         /* Message stuff */
 315         uint16_t sc_msgify;     /* IDENTIFY msg associated with this nexus */
 316         uint16_t sc_msgout;     /* What message is on its way out? */
 317         uint16_t sc_msgpriq;    /* One or more messages to send (encoded) */
 318         uint16_t sc_msgoutq;    /* What messages have been sent so far? */
 319
 320         uint8_t *sc_omess;      /* MSGOUT buffer */
 321         uint8_t *sc_omp;        /* Message pointer (for multibyte messages) */
 322         size_t  sc_omlen;
 323         uint8_t *sc_imess;      /* MSGIN buffer */
 324         uint8_t *sc_imp;        /* Message pointer (for multibyte messages) */
 325         size_t  sc_imlen;
 326
 327         uint8_t *sc_cmdp;       /* Command pointer (for DMAed commands) */
 328         size_t  sc_cmdlen;      /* Size of command in transit */
 329
 330         /* Hardware attributes */
 331         int sc_freq;            /* SCSI bus frequency in MHz */
 332         int sc_id;              /* Our SCSI id */
 333         int sc_rev;             /* Chip revision */
 334         int sc_features;        /* Chip features */
 335         int sc_minsync;         /* Minimum sync period / 4 */
 336         int sc_maxxfer;         /* Maximum transfer size */
 337
 338         struct simplelock sc_lock;/* driver mutex */
 339 };
 340
 341 /* values for sc_state */
 342 #define NCR_IDLE        1       /* waiting for something to do */
 343 #define NCR_SELECTING   2       /* SCSI command is arbiting  */
 344 #define NCR_RESELECTED  3       /* Has been reselected */
 345 #define NCR_IDENTIFIED  4       /* Has gotten IFY but not TAG */
 346 #define NCR_CONNECTED   5       /* Actively using the SCSI bus */
 347 #define NCR_DISCONNECT  6       /* MSG_DISCONNECT received */
 348 #define NCR_CMDCOMPLETE 7       /* MSG_CMDCOMPLETE received */
 349 #define NCR_CLEANING    8
 350 #define NCR_SBR         9       /* Expect a SCSI RST because we commanded it */
 351
 352 /* values for sc_flags */
 353 #define NCR_DROP_MSGI   0x01    /* Discard all msgs (parity err detected) */
 354 #define NCR_ABORTING    0x02    /* Bailing out */
 355 #define NCR_DOINGDMA    0x04    /* The FIFO data path is active! */
 356 #define NCR_SYNCHNEGO   0x08    /* Synch negotiation in progress. */
 357 #define NCR_ICCS        0x10    /* Expect status phase results */
 358 #define NCR_WAITI       0x20    /* Waiting for non-DMA data to arrive */
 359 #define NCR_ATN         0x40    /* ATN asserted */
 360 #define NCR_EXPECT_ILLCMD       0x80    /* Expect Illegal Command Interrupt */
 361
 362 /* values for sc_features */
 363 #define NCR_F_HASCFG3   0x01    /* chip has CFG3 register */
 364 #define NCR_F_FASTSCSI  0x02    /* chip supports Fast mode */
 365 #define NCR_F_DMASELECT 0x04    /*      can do dmaselect */
 366 #define NCR_F_SELATN3   0x08    /* chip supports SELATN3 command */
 367
 368 /* values for sc_msgout */
 369 #define SEND_DEV_RESET          0x0001
 370 #define SEND_PARITY_ERROR       0x0002
 371 #define SEND_INIT_DET_ERR       0x0004
 372 #define SEND_REJECT             0x0008
 373 #define SEND_IDENTIFY           0x0010
 374 #define SEND_ABORT              0x0020
 375 #define SEND_WDTR               0x0040
 376 #define SEND_SDTR               0x0080
 377 #define SEND_TAG                0x0100
 378
 379 /* SCSI Status codes */
 380 #define ST_MASK                 0x3e /* bit 0,6,7 is reserved */
 381
 382 /* phase bits */
 383 #define IOI                     0x01
 384 #define CDI                     0x02
 385 #define MSGI                    0x04
 386
 387 /* Information transfer phases */
 388 #define DATA_OUT_PHASE          (0)
 389 #define DATA_IN_PHASE           (IOI)
 390 #define COMMAND_PHASE           (CDI)
 391 #define STATUS_PHASE            (CDI|IOI)
 392 #define MESSAGE_OUT_PHASE       (MSGI|CDI)
 393 #define MESSAGE_IN_PHASE        (MSGI|CDI|IOI)
 394
 395 #define PHASE_MASK              (MSGI|CDI|IOI)
 396
 397 /* Some pseudo phases for getphase()*/
 398 #define BUSFREE_PHASE           0x100   /* Re/Selection no longer valid */
 399 #define INVALID_PHASE           0x101   /* Re/Selection valid, but no REQ yet */
 400 #define PSEUDO_PHASE            0x100   /* "pseudo" bit */
 401
 402 /*
 403  * Macros to read and write the chip's registers.
 404  */
 405 #define NCR_READ_REG(sc, reg)           \
 406         (*(sc)->sc_glue->gl_read_reg)((sc), (reg))
 407 #define NCR_WRITE_REG(sc, reg, val)     \
 408         (*(sc)->sc_glue->gl_write_reg)((sc), (reg), (val))
 409
 410 #ifdef NCR53C9X_DEBUG
 411 #define NCRCMD(sc, cmd) do {                                            \
 412         if ((ncr53c9x_debug & NCR_SHOWCCMDS) != 0)                      \
 413                 printf("<CMD:0x%x %d>", (unsigned int)cmd, __LINE__);   \
 414         sc->sc_lastcmd = cmd;                                           \
 415         NCR_WRITE_REG(sc, NCR_CMD, cmd);                                \
 416 } while (/* CONSTCOND */ 0)
 417 #else
 418 #define NCRCMD(sc, cmd)         NCR_WRITE_REG(sc, NCR_CMD, cmd)
 419 #endif
 420
 421 /*
 422  * DMA macros for NCR53c9x
 423  */
 424 #define NCRDMA_ISINTR(sc)       (*(sc)->sc_glue->gl_dma_isintr)((sc))
 425 #define NCRDMA_RESET(sc)        (*(sc)->sc_glue->gl_dma_reset)((sc))
 426 #define NCRDMA_INTR(sc)         (*(sc)->sc_glue->gl_dma_intr)((sc))
 427 #define NCRDMA_SETUP(sc, addr, len, datain, dmasize)    \
 428      (*(sc)->sc_glue->gl_dma_setup)((sc), (addr), (len), (datain), (dmasize))
 429 #define NCRDMA_GO(sc)           (*(sc)->sc_glue->gl_dma_go)((sc))
 430 #define NCRDMA_ISACTIVE(sc)     (*(sc)->sc_glue->gl_dma_isactive)((sc))
 431
 432 /*
 433  * Macro to convert the chip register Clock Per Byte value to
 434  * Synchronous Transfer Period.
 435  */
 436 #define ncr53c9x_cpb2stp(sc, cpb)       \
 437         ((250 * (cpb)) / (sc)->sc_freq)
 438
 439 void    ncr53c9x_attach(struct ncr53c9x_softc *);
 440 int     ncr53c9x_detach(struct ncr53c9x_softc *, int);
 441 void    ncr53c9x_scsipi_request(struct scsipi_channel *chan,
 442             scsipi_adapter_req_t req, void *);
 443 void    ncr53c9x_reset(struct ncr53c9x_softc *);
 444 int     ncr53c9x_intr(void *);
 445 void    ncr53c9x_init(struct ncr53c9x_softc *, int);
 446 void    ncr53c9x_abort(struct ncr53c9x_softc *, struct ncr53c9x_ecb *);
 447
 448 #endif /* _DEV_IC_NCR53C9XVAR_H_ */