sys/dev/mca/if_elmc_mca.c

   1 /*      $NetBSD: if_elmc_mca.c,v 1.28 2009/05/12 13:15:24 cegger Exp $  */
   2
   3 /*-
   4  * Copyright (c) 2001 The NetBSD Foundation, Inc.
   5  * All rights reserved.
   6  *
   7  * This code is derived from software contributed to The NetBSD Foundation
   8  * by Rafal K. Boni and Jaromir Dolecek.
   9  *
  10  * Redistribution and use in source and binary forms, with or without
  11  * modification, are permitted provided that the following conditions
  12  * are met:
  13  * 1. Redistributions of source code must retain the above copyright
  14  *    notice, this list of conditions and the following disclaimer.
  15  * 2. Redistributions in binary form must reproduce the above copyright
  16  *    notice, this list of conditions and the following disclaimer in the
  17  *    documentation and/or other materials provided with the distribution.
  18  *
  19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
  20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
  23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  29  * POSSIBILITY OF SUCH DAMAGE.
  30  */
  31
  32 /*
  33  * 3Com 3c523 EtherLink/MC Ethernet card driver (uses i82586 Ethernet chip).
  34  *
  35  * The 3c523-specific hooks were derived from Linux driver (file
  36  * drivers/net/3c523.[ch]).
  37  *
  38  * This driver uses generic i82586 stuff. See also ai(4), ef(4), ix(4).
  39  */
  40
  41 #include <sys/cdefs.h>
  42 __KERNEL_RCSID(0, "$NetBSD: if_elmc_mca.c,v 1.28 2009/05/12 13:15:24 cegger Exp $");
  43
  44 #include <sys/param.h>
  45 #include <sys/systm.h>
  46 #include <sys/mbuf.h>
  47 #include <sys/errno.h>
  48 #include <sys/device.h>
  49 #include <sys/protosw.h>
  50 #include <sys/socket.h>
  51
  52 #include <net/if.h>
  53 #include <net/if_types.h>
  54 #include <net/if_media.h>
  55 #include <net/if_ether.h>
  56
  57 #include <sys/bus.h>
  58
  59 #include <dev/ic/i82586reg.h>
  60 #include <dev/ic/i82586var.h>
  61 #include <dev/mca/mcadevs.h>
  62 #include <dev/mca/mcavar.h>
  63
  64 #include <dev/mca/3c523reg.h>
  65
  66 struct elmc_mca_softc {
  67         struct ie_softc sc_ie;
  68
  69         bus_space_tag_t sc_regt;        /* space tag for registers */
  70         bus_space_handle_t sc_regh;     /* space handle for registers */
  71
  72         void            *sc_ih;         /* interrupt handle */
  73 };
  74
  75 int     elmc_mca_match(device_t, cfdata_t, void *);
  76 void    elmc_mca_attach(device_t, device_t, void *);
  77
  78 static void     elmc_mca_copyin(struct ie_softc *, void *, int, size_t);
  79 static void     elmc_mca_copyout(struct ie_softc *, const void *, int, size_t);
  80 static u_int16_t elmc_mca_read_16(struct ie_softc *, int);
  81 static void     elmc_mca_write_16(struct ie_softc *, int, u_int16_t);
  82 static void     elmc_mca_write_24(struct ie_softc *, int, int);
  83 static void     elmc_mca_attn(struct ie_softc *, int);
  84 static void     elmc_mca_hwreset(struct ie_softc *, int);
  85 static int      elmc_mca_intrhook(struct ie_softc *, int);
  86
  87 int
  88 elmc_mca_match(device_t parent, cfdata_t cf,
  89     void *aux)
  90 {
  91         struct mca_attach_args *ma = aux;
  92
  93         switch (ma->ma_id) {
  94         case MCA_PRODUCT_3C523:
  95                 return 1;
  96         }
  97
  98         return 0;
  99 }
 100
 101 void
 102 elmc_mca_attach(device_t parent, device_t self, void *aux)
 103 {
 104         struct elmc_mca_softc *asc = device_private(self);
 105         struct ie_softc *sc = &asc->sc_ie;
 106         struct mca_attach_args *ma = aux;
 107         int pos2, pos3, i, revision;
 108         int iobase, irq, pbram_addr;
 109         bus_space_handle_t ioh, memh;
 110         u_int8_t myaddr[ETHER_ADDR_LEN];
 111
 112         pos2 = mca_conf_read(ma->ma_mc, ma->ma_slot, 2);
 113         pos3 = mca_conf_read(ma->ma_mc, ma->ma_slot, 3);
 114
 115         /*
 116          * POS register 2: (adf pos0)
 117          *
 118          * 7 6 5 4 3 2 1 0
 119          *     \ \_/ \_/ \__ enable: 0=adapter disabled, 1=adapter enabled
 120          *      \  \   \____ I/O Address Range: 00=300-307, 01=1300-1307,
 121          *       \  \                           10=2300-2307, 11=3300-3307
 122          *        \  \______ Packet Buffer RAM Address Range:
 123          *         \            00=0x0c0000-0x0c5fff 01=0x0c8000-0x0cdfff
 124          *          \           10=0x0d0000-0x0d5fff 11=0x0d8000-0x0ddfff
 125          *           \______ Transceiver Type: 0=onboard(BNC) 1=ext(DIX)
 126          *
 127          * POS register 3: (adf pos1)
 128          *
 129          * 7 6 5 4 3 2 1 0
 130          *          \____/
 131          *               \__ Interrupt level: 0100=3, 0010=7, 1000=9, 0001=12
 132          */
 133
 134         iobase = ELMC_IOADDR_BASE + (0x1000 * ((pos2 & 0x6) >> 1));
 135
 136         /* get irq */
 137         switch (pos3 & 0x1f) {
 138         case 4: irq = 3; break;
 139         case 2: irq = 7; break;
 140         case 8: irq = 9; break;
 141         case 1: irq = 12; break;
 142         default:
 143                 printf(": cannot determine irq\n");
 144                 return;
 145         }
 146
 147         pbram_addr = ELMC_MADDR_BASE + (((pos2 & 0x18) >> 3) * 0x8000);
 148
 149         printf(" slot %d irq %d: 3Com EtherLink/MC Ethernet Adapter (3C523)\n",
 150                 ma->ma_slot + 1, irq);
 151
 152         /* map the pio registers */
 153         if (bus_space_map(ma->ma_iot, iobase, ELMC_IOADDR_SIZE, 0, &ioh)) {
 154                 aprint_error_dev(&sc->sc_dev, "unable to map i/o space\n");
 155                 return;
 156         }
 157
 158         /*
 159          * 3c523 has a 24K memory. The first 16K is the shared memory, while
 160          * the last 8K is for the EtherStart BIOS ROM, which we don't care
 161          * about. Just use the first 16K.
 162          */
 163         if (bus_space_map(ma->ma_memt, pbram_addr, ELMC_MADDR_SIZE, 0, &memh)) {
 164                 aprint_error_dev(&sc->sc_dev, "unable to map memory space\n");
 165                 if (pbram_addr == 0xc0000) {
 166                         aprint_error_dev(&sc->sc_dev, "memory space 0xc0000 may conflict with vga\n");
 167                 }
 168
 169                 bus_space_unmap(ma->ma_iot, ioh, ELMC_IOADDR_SIZE);
 170                 return;
 171         }
 172
 173         asc->sc_regt = ma->ma_iot;
 174         asc->sc_regh = ioh;
 175
 176         sc->hwinit = NULL;
 177         sc->intrhook = elmc_mca_intrhook;
 178         sc->hwreset = elmc_mca_hwreset;
 179         sc->chan_attn = elmc_mca_attn;
 180
 181         sc->ie_bus_barrier = NULL;
 182
 183         sc->memcopyin = elmc_mca_copyin;
 184         sc->memcopyout = elmc_mca_copyout;
 185         sc->ie_bus_read16 = elmc_mca_read_16;
 186         sc->ie_bus_write16 = elmc_mca_write_16;
 187         sc->ie_bus_write24 = elmc_mca_write_24;
 188
 189         sc->do_xmitnopchain = 0;
 190
 191         sc->sc_mediachange = NULL;
 192         sc->sc_mediastatus = NULL;
 193
 194         sc->bt = ma->ma_memt;
 195         sc->bh = memh;
 196
 197         /* Map i/o space. */
 198         sc->sc_msize = ELMC_MADDR_SIZE;
 199         sc->sc_maddr = (void *)memh;
 200         sc->sc_iobase = (char *)sc->sc_maddr + sc->sc_msize - (1 << 24);
 201
 202         /* set up pointers to important on-card control structures */
 203         sc->iscp = 0;
 204         sc->scb = IE_ISCP_SZ;
 205         sc->scp = sc->sc_msize + IE_SCP_ADDR - (1 << 24);
 206
 207         sc->buf_area = sc->scb + IE_SCB_SZ;
 208         sc->buf_area_sz = sc->sc_msize - IE_ISCP_SZ - IE_SCB_SZ - IE_SCP_SZ;
 209
 210         /*
 211          * According to docs, we might need to read the interrupt number and
 212          * write it back to the IRQ select register, since the POST might not
 213          * configure the IRQ properly.
 214          */
 215         (void) mca_conf_write(ma->ma_mc, ma->ma_slot, 3, pos3 & 0x1f);
 216
 217         /* reset the card first */
 218         elmc_mca_hwreset(sc, CARD_RESET);
 219         delay(1000000 / ( 1<< 5));
 220
 221         /* zero card memory */
 222         bus_space_set_region_1(sc->bt, sc->bh, 0, 0, sc->sc_msize);
 223
 224         /* set card to 16-bit bus mode */
 225         bus_space_write_1(sc->bt, sc->bh, IE_SCP_BUS_USE((u_long)sc->scp),
 226                           IE_SYSBUS_16BIT);
 227
 228         /* set up pointers to key structures */
 229         elmc_mca_write_24(sc, IE_SCP_ISCP((u_long)sc->scp), (u_long) sc->iscp);
 230         elmc_mca_write_16(sc, IE_ISCP_SCB((u_long)sc->iscp), (u_long) sc->scb);
 231         elmc_mca_write_24(sc, IE_ISCP_BASE((u_long)sc->iscp), (u_long) sc->iscp);
 232
 233         /* flush setup of pointers, check if chip answers */
 234         bus_space_barrier(sc->bt, sc->bh, 0, sc->sc_msize,
 235                           BUS_SPACE_BARRIER_WRITE);
 236         if (!i82586_proberam(sc)) {
 237                 aprint_error_dev(&sc->sc_dev, "can't talk to i82586!\n");
 238
 239                 bus_space_unmap(asc->sc_regt, asc->sc_regh, ELMC_IOADDR_SIZE);
 240                 bus_space_unmap(sc->bt, sc->bh, ELMC_MADDR_SIZE);
 241                 return;
 242         }
 243
 244         /* revision is stored in the first 4 bits of the revision register */
 245         revision = (int) bus_space_read_1(asc->sc_regt, asc->sc_regh,
 246                                 ELMC_REVISION) & ELMC_REVISION_MASK;
 247
 248         /* dump known info */
 249         printf("%s: rev %d, i/o %#04x-%#04x, mem %#06x-%#06x, %sternal xcvr\n",
 250                 device_xname(&sc->sc_dev), revision,
 251                 iobase, iobase + ELMC_IOADDR_SIZE - 1,
 252                 pbram_addr, pbram_addr + ELMC_MADDR_SIZE - 1,
 253                 (pos2 & 0x20) ? "ex" : "in");
 254
 255         /*
 256          * Hardware ethernet address is stored in the first six bytes
 257          * of the IO space.
 258          */
 259         for(i=0; i < MIN(6, ETHER_ADDR_LEN); i++)
 260                 myaddr[i] = bus_space_read_1(asc->sc_regt, asc->sc_regh, i);
 261
 262         printf("%s:", device_xname(&sc->sc_dev));
 263         i82586_attach((void *)sc, "3C523", myaddr, NULL, 0, 0);
 264
 265         /* establish interrupt handler */
 266         asc->sc_ih = mca_intr_establish(ma->ma_mc, irq, IPL_NET, i82586_intr,
 267                         sc);
 268         if (asc->sc_ih == NULL) {
 269                 aprint_error_dev(&sc->sc_dev, "couldn't establish interrupt handler\n");
 270                 return;
 271         }
 272 }
 273
 274 static void
 275 elmc_mca_copyin (struct ie_softc *sc, void *dst, int offset, size_t size)
 276 {
 277         int dribble;
 278         u_int8_t* bptr = dst;
 279
 280         bus_space_barrier(sc->bt, sc->bh, offset, size,
 281                           BUS_SPACE_BARRIER_READ);
 282
 283         if (offset % 2) {
 284                 *bptr = bus_space_read_1(sc->bt, sc->bh, offset);
 285                 offset++; bptr++; size--;
 286         }
 287
 288         dribble = size % 2;
 289         bus_space_read_region_2(sc->bt, sc->bh, offset, (u_int16_t *) bptr,
 290                                 size >> 1);
 291
 292         if (dribble) {
 293                 bptr += size - 1;
 294                 offset += size - 1;
 295                 *bptr = bus_space_read_1(sc->bt, sc->bh, offset);
 296         }
 297 }
 298
 299 static void
 300 elmc_mca_copyout (struct ie_softc *sc, const void *src, int offset, size_t size)
 301 {
 302         int dribble;
 303         int osize = size;
 304         int ooffset = offset;
 305         const u_int8_t* bptr = src;
 306
 307         if (offset % 2) {
 308                 bus_space_write_1(sc->bt, sc->bh, offset, *bptr);
 309                 offset++; bptr++; size--;
 310         }
 311
 312         dribble = size % 2;
 313         bus_space_write_region_2(sc->bt, sc->bh, offset,
 314             (const u_int16_t *)bptr, size >> 1);
 315         if (dribble) {
 316                 bptr += size - 1;
 317                 offset += size - 1;
 318                 bus_space_write_1(sc->bt, sc->bh, offset, *bptr);
 319         }
 320
 321         bus_space_barrier(sc->bt, sc->bh, ooffset, osize,
 322                           BUS_SPACE_BARRIER_WRITE);
 323 }
 324
 325 static u_int16_t
 326 elmc_mca_read_16 (struct ie_softc *sc, int offset)
 327 {
 328         bus_space_barrier(sc->bt, sc->bh, offset, 2, BUS_SPACE_BARRIER_READ);
 329         return bus_space_read_2(sc->bt, sc->bh, offset);
 330 }
 331
 332 static void
 333 elmc_mca_write_16 (struct ie_softc *sc, int offset, u_int16_t value)
 334 {
 335         bus_space_write_2(sc->bt, sc->bh, offset, value);
 336         bus_space_barrier(sc->bt, sc->bh, offset, 2, BUS_SPACE_BARRIER_WRITE);
 337 }
 338
 339 static void
 340 elmc_mca_write_24 (struct ie_softc *sc, int offset, int addr)
 341 {
 342         bus_space_write_4(sc->bt, sc->bh, offset, addr +
 343                                 (u_long) sc->sc_maddr - (u_long) sc->sc_iobase);
 344         bus_space_barrier(sc->bt, sc->bh, offset, 4, BUS_SPACE_BARRIER_WRITE);
 345 }
 346
 347 /*
 348  * Channel attention hook.
 349  */
 350 static void
 351 elmc_mca_attn(struct ie_softc *sc, int why)
 352 {
 353     struct elmc_mca_softc* asc = (struct elmc_mca_softc *) sc;
 354     int intr = 0;
 355
 356     switch (why) {
 357     case CHIP_PROBE:
 358         intr = 0;
 359         break;
 360     case CARD_RESET:
 361         intr = ELMC_CTRL_INT;
 362         break;
 363     }
 364
 365     bus_space_write_1(asc->sc_regt, asc->sc_regh, ELMC_CTRL,
 366                 ELMC_CTRL_RST | ELMC_CTRL_BS3 | ELMC_CTRL_CHA | intr);
 367     delay(1);   /* should be > 500 ns */
 368     bus_space_write_1(asc->sc_regt, asc->sc_regh, ELMC_CTRL,
 369                 ELMC_CTRL_RST | ELMC_CTRL_BS3 | intr);
 370 }
 371
 372 /*
 373  * Do full card hardware reset.
 374  */
 375 static void
 376 elmc_mca_hwreset(struct ie_softc *sc, int why)
 377 {
 378     struct elmc_mca_softc* asc = (struct elmc_mca_softc *) sc;
 379
 380     /* toggle the RST bit low then high */
 381     bus_space_write_1(asc->sc_regt, asc->sc_regh, ELMC_CTRL,
 382                 ELMC_CTRL_BS3 | ELMC_CTRL_LOOP);
 383     delay(1);   /* should be > 500 ns */
 384     bus_space_write_1(asc->sc_regt, asc->sc_regh, ELMC_CTRL,
 385                 ELMC_CTRL_BS3 | ELMC_CTRL_LOOP | ELMC_CTRL_RST);
 386
 387     elmc_mca_attn(sc, why);
 388 }
 389
 390 /*
 391  * Interrupt hook.
 392  */
 393 static int
 394 elmc_mca_intrhook(struct ie_softc *sc, int why)
 395 {
 396         switch (why) {
 397         case INTR_ACK:
 398                 elmc_mca_attn(sc, CHIP_PROBE);
 399                 break;
 400         default:
 401                 /* do nothing */
 402                 break;
 403         }
 404
 405         return (0);
 406 }
 407
 408 CFATTACH_DECL(elmc_mca, sizeof(struct elmc_mca_softc),
 409     elmc_mca_match, elmc_mca_attach, NULL, NULL);