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[netbsd-mini2440.git] / sys / dev / usb / ohci.c
blob7db281d0d3ff6b08859c6bb41cf584f81811427d
1 /* $NetBSD: ohci.c,v 1.204 2010/01/08 16:40:30 martin Exp $ */
2 /* $FreeBSD: src/sys/dev/usb/ohci.c,v 1.22 1999/11/17 22:33:40 n_hibma Exp $ */
3
4 /*
5 * Copyright (c) 1998, 2004, 2005 The NetBSD Foundation, Inc.
6 * All rights reserved.
7 *
8 * This code is derived from software contributed to The NetBSD Foundation
9 * by Lennart Augustsson (lennart@augustsson.net) at
10 * Carlstedt Research & Technology.
11 * This code is derived from software contributed to The NetBSD Foundation
12 * by Charles M. Hannum.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions
16 * are met:
17 * 1. Redistributions of source code must retain the above copyright
18 * notice, this list of conditions and the following disclaimer.
19 * 2. Redistributions in binary form must reproduce the above copyright
20 * notice, this list of conditions and the following disclaimer in the
21 * documentation and/or other materials provided with the distribution.
22 *
23 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
24 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
25 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
26 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
27 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
28 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
30 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
31 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
32 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
33 * POSSIBILITY OF SUCH DAMAGE.
34 */
35
36 /*
37 * USB Open Host Controller driver.
38 *
39 * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html
40 * USB spec: http://www.usb.org/developers/docs/
41 */
42
43 #include <sys/cdefs.h>
44 __KERNEL_RCSID(0, "$NetBSD: ohci.c,v 1.204 2010/01/08 16:40:30 martin Exp $");
45
46 #include <sys/param.h>
47 #include <sys/systm.h>
48 #include <sys/malloc.h>
49 #include <sys/kernel.h>
50 #include <sys/device.h>
51 #include <sys/select.h>
52 #include <uvm/uvm_extern.h>
53 #include <sys/proc.h>
54 #include <sys/queue.h>
55
56 #include <sys/bus.h>
57 #include <machine/endian.h>
58
59 #include <dev/usb/usb.h>
60 #include <dev/usb/usbdi.h>
61 #include <dev/usb/usbdivar.h>
62 #include <dev/usb/usb_mem.h>
63 #include <dev/usb/usb_quirks.h>
64
65 #include <dev/usb/ohcireg.h>
66 #include <dev/usb/ohcivar.h>
67 #include <dev/usb/usbroothub_subr.h>
68
69
70
71 #ifdef OHCI_DEBUG
72 #define DPRINTF(x) if (ohcidebug) logprintf x
73 #define DPRINTFN(n,x) if (ohcidebug>(n)) logprintf x
74 int ohcidebug = 0;
75 #else
76 #define DPRINTF(x)
77 #define DPRINTFN(n,x)
78 #endif
79
80 #if BYTE_ORDER == BIG_ENDIAN
81 #define SWAP_ENDIAN OHCI_LITTLE_ENDIAN
82 #else
83 #define SWAP_ENDIAN OHCI_BIG_ENDIAN
84 #endif
85
86 #define O16TOH(val) (sc->sc_endian == SWAP_ENDIAN ? bswap16(val) : val)
87 #define O32TOH(val) (sc->sc_endian == SWAP_ENDIAN ? bswap32(val) : val)
88 #define HTOO16(val) O16TOH(val)
89 #define HTOO32(val) O32TOH(val)
90
91 struct ohci_pipe;
92
93 Static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *);
94 Static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *);
95
96 Static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *);
97 Static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *);
98
99 Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *);
100 Static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *);
101
102 #if 0
103 Static void ohci_free_std_chain(ohci_softc_t *, ohci_soft_td_t *,
104 ohci_soft_td_t *);
105 #endif
106 Static usbd_status ohci_alloc_std_chain(struct ohci_pipe *,
107 ohci_softc_t *, int, int, usbd_xfer_handle,
108 ohci_soft_td_t *, ohci_soft_td_t **);
109
110 Static usbd_status ohci_open(usbd_pipe_handle);
111 Static void ohci_poll(struct usbd_bus *);
112 Static void ohci_softintr(void *);
113 Static void ohci_waitintr(ohci_softc_t *, usbd_xfer_handle);
114 Static void ohci_rhsc(ohci_softc_t *, usbd_xfer_handle);
115
116 Static usbd_status ohci_device_request(usbd_xfer_handle xfer);
117 Static void ohci_add_ed(ohci_softc_t *, ohci_soft_ed_t *,
118 ohci_soft_ed_t *);
119
120 Static void ohci_rem_ed(ohci_soft_ed_t *, ohci_soft_ed_t *);
121 Static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *);
122 Static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *);
123 Static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t);
124 Static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *);
125 Static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *);
126 Static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t);
127
128 Static usbd_status ohci_setup_isoc(usbd_pipe_handle pipe);
129 Static void ohci_device_isoc_enter(usbd_xfer_handle);
130
131 Static usbd_status ohci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t);
132 Static void ohci_freem(struct usbd_bus *, usb_dma_t *);
133
134 Static usbd_xfer_handle ohci_allocx(struct usbd_bus *);
135 Static void ohci_freex(struct usbd_bus *, usbd_xfer_handle);
136
137 Static usbd_status ohci_root_ctrl_transfer(usbd_xfer_handle);
138 Static usbd_status ohci_root_ctrl_start(usbd_xfer_handle);
139 Static void ohci_root_ctrl_abort(usbd_xfer_handle);
140 Static void ohci_root_ctrl_close(usbd_pipe_handle);
141 Static void ohci_root_ctrl_done(usbd_xfer_handle);
142
143 Static usbd_status ohci_root_intr_transfer(usbd_xfer_handle);
144 Static usbd_status ohci_root_intr_start(usbd_xfer_handle);
145 Static void ohci_root_intr_abort(usbd_xfer_handle);
146 Static void ohci_root_intr_close(usbd_pipe_handle);
147 Static void ohci_root_intr_done(usbd_xfer_handle);
148
149 Static usbd_status ohci_device_ctrl_transfer(usbd_xfer_handle);
150 Static usbd_status ohci_device_ctrl_start(usbd_xfer_handle);
151 Static void ohci_device_ctrl_abort(usbd_xfer_handle);
152 Static void ohci_device_ctrl_close(usbd_pipe_handle);
153 Static void ohci_device_ctrl_done(usbd_xfer_handle);
154
155 Static usbd_status ohci_device_bulk_transfer(usbd_xfer_handle);
156 Static usbd_status ohci_device_bulk_start(usbd_xfer_handle);
157 Static void ohci_device_bulk_abort(usbd_xfer_handle);
158 Static void ohci_device_bulk_close(usbd_pipe_handle);
159 Static void ohci_device_bulk_done(usbd_xfer_handle);
160
161 Static usbd_status ohci_device_intr_transfer(usbd_xfer_handle);
162 Static usbd_status ohci_device_intr_start(usbd_xfer_handle);
163 Static void ohci_device_intr_abort(usbd_xfer_handle);
164 Static void ohci_device_intr_close(usbd_pipe_handle);
165 Static void ohci_device_intr_done(usbd_xfer_handle);
166
167 Static usbd_status ohci_device_isoc_transfer(usbd_xfer_handle);
168 Static usbd_status ohci_device_isoc_start(usbd_xfer_handle);
169 Static void ohci_device_isoc_abort(usbd_xfer_handle);
170 Static void ohci_device_isoc_close(usbd_pipe_handle);
171 Static void ohci_device_isoc_done(usbd_xfer_handle);
172
173 Static usbd_status ohci_device_setintr(ohci_softc_t *sc,
174 struct ohci_pipe *pipe, int ival);
175
176 Static void ohci_timeout(void *);
177 Static void ohci_timeout_task(void *);
178 Static void ohci_rhsc_enable(void *);
179
180 Static void ohci_close_pipe(usbd_pipe_handle, ohci_soft_ed_t *);
181 Static void ohci_abort_xfer(usbd_xfer_handle, usbd_status);
182
183 Static void ohci_device_clear_toggle(usbd_pipe_handle pipe);
184 Static void ohci_noop(usbd_pipe_handle pipe);
185
186 #ifdef OHCI_DEBUG
187 Static void ohci_dumpregs(ohci_softc_t *);
188 Static void ohci_dump_tds(ohci_softc_t *, ohci_soft_td_t *);
189 Static void ohci_dump_td(ohci_softc_t *, ohci_soft_td_t *);
190 Static void ohci_dump_ed(ohci_softc_t *, ohci_soft_ed_t *);
191 Static void ohci_dump_itd(ohci_softc_t *, ohci_soft_itd_t *);
192 Static void ohci_dump_itds(ohci_softc_t *, ohci_soft_itd_t *);
193 #endif
194
195 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \
196 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
197 #define OWRITE1(sc, r, x) \
198 do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
199 #define OWRITE2(sc, r, x) \
200 do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
201 #define OWRITE4(sc, r, x) \
202 do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
203 static __inline uint8_t
204 OREAD1(ohci_softc_t *sc, bus_size_t r)
205 {
206
207 OBARR(sc);
208 return bus_space_read_1(sc->iot, sc->ioh, r);
209 }
210
211 static __inline uint16_t
212 OREAD2(ohci_softc_t *sc, bus_size_t r)
213 {
214
215 OBARR(sc);
216 return bus_space_read_2(sc->iot, sc->ioh, r);
217 }
218
219 static __inline uint32_t
220 OREAD4(ohci_softc_t *sc, bus_size_t r)
221 {
222
223 OBARR(sc);
224 return bus_space_read_4(sc->iot, sc->ioh, r);
225 }
226
227 /* Reverse the bits in a value 0 .. 31 */
228 Static u_int8_t revbits[OHCI_NO_INTRS] =
229 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c,
230 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e,
231 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d,
232 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f };
233
234 struct ohci_pipe {
235 struct usbd_pipe pipe;
236 ohci_soft_ed_t *sed;
237 union {
238 ohci_soft_td_t *td;
239 ohci_soft_itd_t *itd;
240 } tail;
241 /* Info needed for different pipe kinds. */
242 union {
243 /* Control pipe */
244 struct {
245 usb_dma_t reqdma;
246 u_int length;
247 ohci_soft_td_t *setup, *data, *stat;
248 } ctl;
249 /* Interrupt pipe */
250 struct {
251 int nslots;
252 int pos;
253 } intr;
254 /* Bulk pipe */
255 struct {
256 u_int length;
257 int isread;
258 } bulk;
259 /* Iso pipe */
260 struct iso {
261 int next, inuse;
262 } iso;
263 } u;
264 };
265
266 #define OHCI_INTR_ENDPT 1
267
268 Static const struct usbd_bus_methods ohci_bus_methods = {
269 ohci_open,
270 ohci_softintr,
271 ohci_poll,
272 ohci_allocm,
273 ohci_freem,
274 ohci_allocx,
275 ohci_freex,
276 };
277
278 Static const struct usbd_pipe_methods ohci_root_ctrl_methods = {
279 ohci_root_ctrl_transfer,
280 ohci_root_ctrl_start,
281 ohci_root_ctrl_abort,
282 ohci_root_ctrl_close,
283 ohci_noop,
284 ohci_root_ctrl_done,
285 };
286
287 Static const struct usbd_pipe_methods ohci_root_intr_methods = {
288 ohci_root_intr_transfer,
289 ohci_root_intr_start,
290 ohci_root_intr_abort,
291 ohci_root_intr_close,
292 ohci_noop,
293 ohci_root_intr_done,
294 };
295
296 Static const struct usbd_pipe_methods ohci_device_ctrl_methods = {
297 ohci_device_ctrl_transfer,
298 ohci_device_ctrl_start,
299 ohci_device_ctrl_abort,
300 ohci_device_ctrl_close,
301 ohci_noop,
302 ohci_device_ctrl_done,
303 };
304
305 Static const struct usbd_pipe_methods ohci_device_intr_methods = {
306 ohci_device_intr_transfer,
307 ohci_device_intr_start,
308 ohci_device_intr_abort,
309 ohci_device_intr_close,
310 ohci_device_clear_toggle,
311 ohci_device_intr_done,
312 };
313
314 Static const struct usbd_pipe_methods ohci_device_bulk_methods = {
315 ohci_device_bulk_transfer,
316 ohci_device_bulk_start,
317 ohci_device_bulk_abort,
318 ohci_device_bulk_close,
319 ohci_device_clear_toggle,
320 ohci_device_bulk_done,
321 };
322
323 Static const struct usbd_pipe_methods ohci_device_isoc_methods = {
324 ohci_device_isoc_transfer,
325 ohci_device_isoc_start,
326 ohci_device_isoc_abort,
327 ohci_device_isoc_close,
328 ohci_noop,
329 ohci_device_isoc_done,
330 };
331
332 int
333 ohci_activate(device_t self, enum devact act)
334 {
335 struct ohci_softc *sc = device_private(self);
336
337 switch (act) {
338 case DVACT_DEACTIVATE:
339 sc->sc_dying = 1;
340 return 0;
341 default:
342 return EOPNOTSUPP;
343 }
344 }
345
346 void
347 ohci_childdet(device_t self, device_t child)
348 {
349 struct ohci_softc *sc = device_private(self);
350
351 KASSERT(sc->sc_child == child);
352 sc->sc_child = NULL;
353 }
354
355 int
356 ohci_detach(struct ohci_softc *sc, int flags)
357 {
358 int rv = 0;
359 usbd_xfer_handle xfer;
360
361 if (sc->sc_child != NULL)
362 rv = config_detach(sc->sc_child, flags);
363
364 if (rv != 0)
365 return (rv);
366
367 usb_uncallout(sc->sc_tmo_rhsc, ohci_rhsc_enable, sc);
368
369 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */
370 usb_callout_destroy(sc->sc_tmo_rhsc);
371
372 if (sc->sc_hcca != NULL)
373 usb_freemem(&sc->sc_bus, &sc->sc_hccadma);
374 while((xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers)) != NULL) {
375 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
376 free(xfer, M_USB);
377 }
378
379 return (rv);
380 }
381
382 ohci_soft_ed_t *
383 ohci_alloc_sed(ohci_softc_t *sc)
384 {
385 ohci_soft_ed_t *sed;
386 usbd_status err;
387 int i, offs;
388 usb_dma_t dma;
389
390 if (sc->sc_freeeds == NULL) {
391 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n"));
392 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK,
393 OHCI_ED_ALIGN, &dma);
394 if (err)
395 return (0);
396 for(i = 0; i < OHCI_SED_CHUNK; i++) {
397 offs = i * OHCI_SED_SIZE;
398 sed = KERNADDR(&dma, offs);
399 sed->physaddr = DMAADDR(&dma, offs);
400 sed->dma = dma;
401 sed->offs = offs;
402 sed->next = sc->sc_freeeds;
403 sc->sc_freeeds = sed;
404 }
405 }
406 sed = sc->sc_freeeds;
407 sc->sc_freeeds = sed->next;
408 memset(&sed->ed, 0, sizeof(ohci_ed_t));
409 sed->next = 0;
410 return (sed);
411 }
412
413 void
414 ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed)
415 {
416 sed->next = sc->sc_freeeds;
417 sc->sc_freeeds = sed;
418 }
419
420 ohci_soft_td_t *
421 ohci_alloc_std(ohci_softc_t *sc)
422 {
423 ohci_soft_td_t *std;
424 usbd_status err;
425 int i, offs;
426 usb_dma_t dma;
427 int s;
428
429 if (sc->sc_freetds == NULL) {
430 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n"));
431 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK,
432 OHCI_TD_ALIGN, &dma);
433 if (err)
434 return (NULL);
435 s = splusb();
436 for(i = 0; i < OHCI_STD_CHUNK; i++) {
437 offs = i * OHCI_STD_SIZE;
438 std = KERNADDR(&dma, offs);
439 std->physaddr = DMAADDR(&dma, offs);
440 std->dma = dma;
441 std->offs = offs;
442 std->nexttd = sc->sc_freetds;
443 sc->sc_freetds = std;
444 }
445 splx(s);
446 }
447
448 s = splusb();
449 std = sc->sc_freetds;
450 sc->sc_freetds = std->nexttd;
451 memset(&std->td, 0, sizeof(ohci_td_t));
452 std->nexttd = NULL;
453 std->xfer = NULL;
454 ohci_hash_add_td(sc, std);
455 splx(s);
456
457 return (std);
458 }
459
460 void
461 ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std)
462 {
463 int s;
464
465 s = splusb();
466 ohci_hash_rem_td(sc, std);
467 std->nexttd = sc->sc_freetds;
468 sc->sc_freetds = std;
469 splx(s);
470 }
471
472 usbd_status
473 ohci_alloc_std_chain(struct ohci_pipe *opipe, ohci_softc_t *sc,
474 int alen, int rd, usbd_xfer_handle xfer,
475 ohci_soft_td_t *sp, ohci_soft_td_t **ep)
476 {
477 ohci_soft_td_t *next, *cur;
478 ohci_physaddr_t dataphys, dataphysend;
479 u_int32_t tdflags;
480 int len, curlen;
481 usb_dma_t *dma = &xfer->dmabuf;
482 u_int16_t flags = xfer->flags;
483
484 DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%d\n", alen));
485
486 len = alen;
487 cur = sp;
488 dataphys = DMAADDR(dma, 0);
489 dataphysend = OHCI_PAGE(dataphys + len - 1);
490 usb_syncmem(dma, 0, len,
491 rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
492 tdflags = HTOO32(
493 (rd ? OHCI_TD_IN : OHCI_TD_OUT) |
494 (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) |
495 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR);
496
497 for (;;) {
498 next = ohci_alloc_std(sc);
499 if (next == NULL)
500 goto nomem;
501
502 /* The OHCI hardware can handle at most one page crossing. */
503 if (OHCI_PAGE(dataphys) == dataphysend ||
504 OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) {
505 /* we can handle it in this TD */
506 curlen = len;
507 } else {
508 /* must use multiple TDs, fill as much as possible. */
509 curlen = 2 * OHCI_PAGE_SIZE -
510 (dataphys & (OHCI_PAGE_SIZE-1));
511 /* the length must be a multiple of the max size */
512 curlen -= curlen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize);
513 #ifdef DIAGNOSTIC
514 if (curlen == 0)
515 panic("ohci_alloc_std: curlen == 0");
516 #endif
517 }
518 DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x "
519 "dataphysend=0x%08x len=%d curlen=%d\n",
520 dataphys, dataphysend,
521 len, curlen));
522 len -= curlen;
523
524 cur->td.td_flags = tdflags;
525 cur->td.td_cbp = HTOO32(dataphys);
526 cur->nexttd = next;
527 cur->td.td_nexttd = HTOO32(next->physaddr);
528 cur->td.td_be = HTOO32(dataphys + curlen - 1);
529 cur->len = curlen;
530 cur->flags = OHCI_ADD_LEN;
531 cur->xfer = xfer;
532 usb_syncmem(&cur->dma, cur->offs, sizeof(cur->td),
533 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
534 DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n",
535 dataphys, dataphys + curlen - 1));
536 if (len == 0)
537 break;
538 DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n"));
539 dataphys += curlen;
540 cur = next;
541 }
542 if (!rd && (flags & USBD_FORCE_SHORT_XFER) &&
543 alen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) {
544 /* Force a 0 length transfer at the end. */
545
546 cur = next;
547 next = ohci_alloc_std(sc);
548 if (next == NULL)
549 goto nomem;
550
551 cur->td.td_flags = tdflags;
552 cur->td.td_cbp = 0; /* indicate 0 length packet */
553 cur->nexttd = next;
554 cur->td.td_nexttd = HTOO32(next->physaddr);
555 cur->td.td_be = ~0;
556 cur->len = 0;
557 cur->flags = 0;
558 cur->xfer = xfer;
559 usb_syncmem(&cur->dma, cur->offs, sizeof(cur->td),
560 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
561 DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n"));
562 }
563 *ep = cur;
564
565 return (USBD_NORMAL_COMPLETION);
566
567 nomem:
568 /* XXX free chain */
569 return (USBD_NOMEM);
570 }
571
572 #if 0
573 Static void
574 ohci_free_std_chain(ohci_softc_t *sc, ohci_soft_td_t *std,
575 ohci_soft_td_t *stdend)
576 {
577 ohci_soft_td_t *p;
578
579 for (; std != stdend; std = p) {
580 p = std->nexttd;
581 ohci_free_std(sc, std);
582 }
583 }
584 #endif
585
586 ohci_soft_itd_t *
587 ohci_alloc_sitd(ohci_softc_t *sc)
588 {
589 ohci_soft_itd_t *sitd;
590 usbd_status err;
591 int i, s, offs;
592 usb_dma_t dma;
593
594 if (sc->sc_freeitds == NULL) {
595 DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n"));
596 err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK,
597 OHCI_ITD_ALIGN, &dma);
598 if (err)
599 return (NULL);
600 s = splusb();
601 for(i = 0; i < OHCI_SITD_CHUNK; i++) {
602 offs = i * OHCI_SITD_SIZE;
603 sitd = KERNADDR(&dma, offs);
604 sitd->physaddr = DMAADDR(&dma, offs);
605 sitd->dma = dma;
606 sitd->offs = offs;
607 sitd->nextitd = sc->sc_freeitds;
608 sc->sc_freeitds = sitd;
609 }
610 splx(s);
611 }
612
613 s = splusb();
614 sitd = sc->sc_freeitds;
615 sc->sc_freeitds = sitd->nextitd;
616 memset(&sitd->itd, 0, sizeof(ohci_itd_t));
617 sitd->nextitd = NULL;
618 sitd->xfer = NULL;
619 ohci_hash_add_itd(sc, sitd);
620 splx(s);
621
622 #ifdef DIAGNOSTIC
623 sitd->isdone = 0;
624 #endif
625
626 return (sitd);
627 }
628
629 void
630 ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
631 {
632 int s;
633
634 DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd));
635
636 #ifdef DIAGNOSTIC
637 if (!sitd->isdone) {
638 panic("ohci_free_sitd: sitd=%p not done", sitd);
639 return;
640 }
641 /* Warn double free */
642 sitd->isdone = 0;
643 #endif
644
645 s = splusb();
646 ohci_hash_rem_itd(sc, sitd);
647 sitd->nextitd = sc->sc_freeitds;
648 sc->sc_freeitds = sitd;
649 splx(s);
650 }
651
652 usbd_status
653 ohci_init(ohci_softc_t *sc)
654 {
655 ohci_soft_ed_t *sed, *psed;
656 usbd_status err;
657 int i;
658 u_int32_t s, ctl, rwc, ival, hcr, fm, per, rev, desca, descb;
659
660 DPRINTF(("ohci_init: start\n"));
661 aprint_normal_dev(sc->sc_dev, "");
662
663 sc->sc_hcca = NULL;
664 usb_callout_init(sc->sc_tmo_rhsc);
665
666 for (i = 0; i < OHCI_HASH_SIZE; i++)
667 LIST_INIT(&sc->sc_hash_tds[i]);
668 for (i = 0; i < OHCI_HASH_SIZE; i++)
669 LIST_INIT(&sc->sc_hash_itds[i]);
670
671 SIMPLEQ_INIT(&sc->sc_free_xfers);
672
673 rev = OREAD4(sc, OHCI_REVISION);
674 aprint_normal("OHCI version %d.%d%s\n",
675 OHCI_REV_HI(rev), OHCI_REV_LO(rev),
676 OHCI_REV_LEGACY(rev) ? ", legacy support" : "");
677
678 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) {
679 aprint_error_dev(sc->sc_dev, "unsupported OHCI revision\n");
680 sc->sc_bus.usbrev = USBREV_UNKNOWN;
681 return (USBD_INVAL);
682 }
683 sc->sc_bus.usbrev = USBREV_1_0;
684
685 usb_setup_reserve(sc->sc_dev, &sc->sc_dma_reserve, sc->sc_bus.dmatag,
686 USB_MEM_RESERVE);
687
688 /* XXX determine alignment by R/W */
689 /* Allocate the HCCA area. */
690 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE,
691 OHCI_HCCA_ALIGN, &sc->sc_hccadma);
692 if (err) {
693 sc->sc_hcca = NULL;
694 return err;
695 }
696 sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0);
697 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE);
698
699 sc->sc_eintrs = OHCI_NORMAL_INTRS;
700
701 /* Allocate dummy ED that starts the control list. */
702 sc->sc_ctrl_head = ohci_alloc_sed(sc);
703 if (sc->sc_ctrl_head == NULL) {
704 err = USBD_NOMEM;
705 goto bad1;
706 }
707 sc->sc_ctrl_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
708
709 /* Allocate dummy ED that starts the bulk list. */
710 sc->sc_bulk_head = ohci_alloc_sed(sc);
711 if (sc->sc_bulk_head == NULL) {
712 err = USBD_NOMEM;
713 goto bad2;
714 }
715 sc->sc_bulk_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
716 usb_syncmem(&sc->sc_bulk_head->dma, sc->sc_bulk_head->offs,
717 sizeof(sc->sc_bulk_head->ed),
718 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
719
720 /* Allocate dummy ED that starts the isochronous list. */
721 sc->sc_isoc_head = ohci_alloc_sed(sc);
722 if (sc->sc_isoc_head == NULL) {
723 err = USBD_NOMEM;
724 goto bad3;
725 }
726 sc->sc_isoc_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
727 usb_syncmem(&sc->sc_isoc_head->dma, sc->sc_isoc_head->offs,
728 sizeof(sc->sc_isoc_head->ed),
729 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
730
731 /* Allocate all the dummy EDs that make up the interrupt tree. */
732 for (i = 0; i < OHCI_NO_EDS; i++) {
733 sed = ohci_alloc_sed(sc);
734 if (sed == NULL) {
735 while (--i >= 0)
736 ohci_free_sed(sc, sc->sc_eds[i]);
737 err = USBD_NOMEM;
738 goto bad4;
739 }
740 /* All ED fields are set to 0. */
741 sc->sc_eds[i] = sed;
742 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
743 if (i != 0)
744 psed = sc->sc_eds[(i-1) / 2];
745 else
746 psed= sc->sc_isoc_head;
747 sed->next = psed;
748 sed->ed.ed_nexted = HTOO32(psed->physaddr);
749 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
750 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
751 }
752 /*
753 * Fill HCCA interrupt table. The bit reversal is to get
754 * the tree set up properly to spread the interrupts.
755 */
756 for (i = 0; i < OHCI_NO_INTRS; i++)
757 sc->sc_hcca->hcca_interrupt_table[revbits[i]] =
758 HTOO32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr);
759 usb_syncmem(&sc->sc_hccadma, 0, OHCI_HCCA_SIZE,
760 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
761
762 #ifdef OHCI_DEBUG
763 if (ohcidebug > 15) {
764 for (i = 0; i < OHCI_NO_EDS; i++) {
765 printf("ed#%d ", i);
766 ohci_dump_ed(sc, sc->sc_eds[i]);
767 }
768 printf("iso ");
769 ohci_dump_ed(sc, sc->sc_isoc_head);
770 }
771 #endif
772
773 /* Preserve values programmed by SMM/BIOS but lost over reset. */
774 ctl = OREAD4(sc, OHCI_CONTROL);
775 rwc = ctl & OHCI_RWC;
776 fm = OREAD4(sc, OHCI_FM_INTERVAL);
777 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
778 descb = OREAD4(sc, OHCI_RH_DESCRIPTOR_B);
779
780 /* Determine in what context we are running. */
781 if (ctl & OHCI_IR) {
782 /* SMM active, request change */
783 DPRINTF(("ohci_init: SMM active, request owner change\n"));
784 if ((sc->sc_intre & (OHCI_OC | OHCI_MIE)) ==
785 (OHCI_OC | OHCI_MIE))
786 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_MIE);
787 s = OREAD4(sc, OHCI_COMMAND_STATUS);
788 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR);
789 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) {
790 usb_delay_ms(&sc->sc_bus, 1);
791 ctl = OREAD4(sc, OHCI_CONTROL);
792 }
793 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_MIE);
794 if ((ctl & OHCI_IR) == 0) {
795 aprint_error_dev(sc->sc_dev,
796 "SMM does not respond, resetting\n");
797 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc);
798 goto reset;
799 }
800 #if 0
801 /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */
802 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) {
803 /* BIOS started controller. */
804 DPRINTF(("ohci_init: BIOS active\n"));
805 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) {
806 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL | rwc);
807 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
808 }
809 #endif
810 } else {
811 DPRINTF(("ohci_init: cold started\n"));
812 reset:
813 /* Controller was cold started. */
814 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY);
815 }
816
817 /*
818 * This reset should not be necessary according to the OHCI spec, but
819 * without it some controllers do not start.
820 */
821 DPRINTF(("%s: resetting\n", device_xname(sc->sc_dev)));
822 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc);
823 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY);
824
825 /* We now own the host controller and the bus has been reset. */
826
827 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */
828 /* Nominal time for a reset is 10 us. */
829 for (i = 0; i < 10; i++) {
830 delay(10);
831 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR;
832 if (!hcr)
833 break;
834 }
835 if (hcr) {
836 aprint_error_dev(sc->sc_dev, "reset timeout\n");
837 err = USBD_IOERROR;
838 goto bad5;
839 }
840 #ifdef OHCI_DEBUG
841 if (ohcidebug > 15)
842 ohci_dumpregs(sc);
843 #endif
844
845 /* The controller is now in SUSPEND state, we have 2ms to finish. */
846
847 /* Set up HC registers. */
848 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0));
849 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr);
850 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr);
851 /* disable all interrupts and then switch on all desired interrupts */
852 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
853 /* switch on desired functional features */
854 ctl = OREAD4(sc, OHCI_CONTROL);
855 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR);
856 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE |
857 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL | rwc;
858 /* And finally start it! */
859 OWRITE4(sc, OHCI_CONTROL, ctl);
860
861 /*
862 * The controller is now OPERATIONAL. Set a some final
863 * registers that should be set earlier, but that the
864 * controller ignores when in the SUSPEND state.
865 */
866 ival = OHCI_GET_IVAL(fm);
867 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT;
868 fm |= OHCI_FSMPS(ival) | ival;
869 OWRITE4(sc, OHCI_FM_INTERVAL, fm);
870 per = OHCI_PERIODIC(ival); /* 90% periodic */
871 OWRITE4(sc, OHCI_PERIODIC_START, per);
872
873 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */
874 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP);
875 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */
876 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY);
877 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca);
878
879 /*
880 * The AMD756 requires a delay before re-reading the register,
881 * otherwise it will occasionally report 0 ports.
882 */
883 sc->sc_noport = 0;
884 for (i = 0; i < 10 && sc->sc_noport == 0; i++) {
885 usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY);
886 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A));
887 }
888
889 #ifdef OHCI_DEBUG
890 if (ohcidebug > 5)
891 ohci_dumpregs(sc);
892 #endif
893
894 /* Set up the bus struct. */
895 sc->sc_bus.methods = &ohci_bus_methods;
896 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe);
897
898 sc->sc_control = sc->sc_intre = 0;
899
900 /* Finally, turn on interrupts. */
901 DPRINTFN(1,("ohci_init: enabling\n"));
902 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE);
903
904 return (USBD_NORMAL_COMPLETION);
905
906 bad5:
907 for (i = 0; i < OHCI_NO_EDS; i++)
908 ohci_free_sed(sc, sc->sc_eds[i]);
909 bad4:
910 ohci_free_sed(sc, sc->sc_isoc_head);
911 bad3:
912 ohci_free_sed(sc, sc->sc_bulk_head);
913 bad2:
914 ohci_free_sed(sc, sc->sc_ctrl_head);
915 bad1:
916 usb_freemem(&sc->sc_bus, &sc->sc_hccadma);
917 sc->sc_hcca = NULL;
918 return (err);
919 }
920
921 usbd_status
922 ohci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size)
923 {
924 struct ohci_softc *sc = bus->hci_private;
925 usbd_status status;
926
927 status = usb_allocmem(&sc->sc_bus, size, 0, dma);
928 if (status == USBD_NOMEM)
929 status = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size);
930 return status;
931 }
932
933 void
934 ohci_freem(struct usbd_bus *bus, usb_dma_t *dma)
935 {
936 struct ohci_softc *sc = bus->hci_private;
937 if (dma->block->flags & USB_DMA_RESERVE) {
938 usb_reserve_freem(&sc->sc_dma_reserve, dma);
939 return;
940 }
941 usb_freemem(&sc->sc_bus, dma);
942 }
943
944 usbd_xfer_handle
945 ohci_allocx(struct usbd_bus *bus)
946 {
947 struct ohci_softc *sc = bus->hci_private;
948 usbd_xfer_handle xfer;
949
950 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
951 if (xfer != NULL) {
952 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
953 #ifdef DIAGNOSTIC
954 if (xfer->busy_free != XFER_FREE) {
955 printf("ohci_allocx: xfer=%p not free, 0x%08x\n", xfer,
956 xfer->busy_free);
957 }
958 #endif
959 } else {
960 xfer = malloc(sizeof(struct ohci_xfer), M_USB, M_NOWAIT);
961 }
962 if (xfer != NULL) {
963 memset(xfer, 0, sizeof (struct ohci_xfer));
964 #ifdef DIAGNOSTIC
965 xfer->busy_free = XFER_BUSY;
966 #endif
967 }
968 return (xfer);
969 }
970
971 void
972 ohci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer)
973 {
974 struct ohci_softc *sc = bus->hci_private;
975
976 #ifdef DIAGNOSTIC
977 if (xfer->busy_free != XFER_BUSY) {
978 printf("ohci_freex: xfer=%p not busy, 0x%08x\n", xfer,
979 xfer->busy_free);
980 }
981 xfer->busy_free = XFER_FREE;
982 #endif
983 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next);
984 }
985
986 /*
987 * Shut down the controller when the system is going down.
988 */
989 bool
990 ohci_shutdown(device_t self, int flags)
991 {
992 ohci_softc_t *sc = device_private(self);
993
994 DPRINTF(("ohci_shutdown: stopping the HC\n"));
995 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
996 return true;
997 }
998
999 bool
1000 ohci_resume(device_t dv, pmf_qual_t qual)
1001 {
1002 ohci_softc_t *sc = device_private(dv);
1003 uint32_t ctl;
1004 int s;
1005
1006 s = splhardusb();
1007 sc->sc_bus.use_polling++;
1008 /* Some broken BIOSes do not recover these values */
1009 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0));
1010 OWRITE4(sc, OHCI_CONTROL_HEAD_ED,
1011 sc->sc_ctrl_head->physaddr);
1012 OWRITE4(sc, OHCI_BULK_HEAD_ED,
1013 sc->sc_bulk_head->physaddr);
1014 if (sc->sc_intre)
1015 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_intre &
1016 (OHCI_ALL_INTRS | OHCI_MIE));
1017 if (sc->sc_control)
1018 ctl = sc->sc_control;
1019 else
1020 ctl = OREAD4(sc, OHCI_CONTROL);
1021 ctl |= OHCI_HCFS_RESUME;
1022 OWRITE4(sc, OHCI_CONTROL, ctl);
1023 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
1024 ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL;
1025 OWRITE4(sc, OHCI_CONTROL, ctl);
1026 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY);
1027 sc->sc_control = sc->sc_intre = 0;
1028 sc->sc_bus.use_polling--;
1029 splx(s);
1030
1031 return true;
1032 }
1033
1034 bool
1035 ohci_suspend(device_t dv, pmf_qual_t qual)
1036 {
1037 ohci_softc_t *sc = device_private(dv);
1038 uint32_t ctl;
1039 int s;
1040
1041 s = splhardusb();
1042 sc->sc_bus.use_polling++;
1043 ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK;
1044 if (sc->sc_control == 0) {
1045 /*
1046 * Preserve register values, in case that BIOS
1047 * does not recover them.
1048 */
1049 sc->sc_control = ctl;
1050 sc->sc_intre = OREAD4(sc,
1051 OHCI_INTERRUPT_ENABLE);
1052 }
1053 ctl |= OHCI_HCFS_SUSPEND;
1054 OWRITE4(sc, OHCI_CONTROL, ctl);
1055 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
1056 sc->sc_bus.use_polling--;
1057 splx(s);
1058
1059 return true;
1060 }
1061
1062 #ifdef OHCI_DEBUG
1063 void
1064 ohci_dumpregs(ohci_softc_t *sc)
1065 {
1066 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n",
1067 OREAD4(sc, OHCI_REVISION),
1068 OREAD4(sc, OHCI_CONTROL),
1069 OREAD4(sc, OHCI_COMMAND_STATUS)));
1070 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n",
1071 OREAD4(sc, OHCI_INTERRUPT_STATUS),
1072 OREAD4(sc, OHCI_INTERRUPT_ENABLE),
1073 OREAD4(sc, OHCI_INTERRUPT_DISABLE)));
1074 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n",
1075 OREAD4(sc, OHCI_HCCA),
1076 OREAD4(sc, OHCI_PERIOD_CURRENT_ED),
1077 OREAD4(sc, OHCI_CONTROL_HEAD_ED)));
1078 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n",
1079 OREAD4(sc, OHCI_CONTROL_CURRENT_ED),
1080 OREAD4(sc, OHCI_BULK_HEAD_ED),
1081 OREAD4(sc, OHCI_BULK_CURRENT_ED)));
1082 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n",
1083 OREAD4(sc, OHCI_DONE_HEAD),
1084 OREAD4(sc, OHCI_FM_INTERVAL),
1085 OREAD4(sc, OHCI_FM_REMAINING)));
1086 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n",
1087 OREAD4(sc, OHCI_FM_NUMBER),
1088 OREAD4(sc, OHCI_PERIODIC_START),
1089 OREAD4(sc, OHCI_LS_THRESHOLD)));
1090 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n",
1091 OREAD4(sc, OHCI_RH_DESCRIPTOR_A),
1092 OREAD4(sc, OHCI_RH_DESCRIPTOR_B),
1093 OREAD4(sc, OHCI_RH_STATUS)));
1094 DPRINTF((" port1=0x%08x port2=0x%08x\n",
1095 OREAD4(sc, OHCI_RH_PORT_STATUS(1)),
1096 OREAD4(sc, OHCI_RH_PORT_STATUS(2))));
1097 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n",
1098 O32TOH(sc->sc_hcca->hcca_frame_number),
1099 O32TOH(sc->sc_hcca->hcca_done_head)));
1100 }
1101 #endif
1102
1103 Static int ohci_intr1(ohci_softc_t *);
1104
1105 int
1106 ohci_intr(void *p)
1107 {
1108 ohci_softc_t *sc = p;
1109
1110 if (sc == NULL || sc->sc_dying || !device_has_power(sc->sc_dev))
1111 return (0);
1112
1113 /* If we get an interrupt while polling, then just ignore it. */
1114 if (sc->sc_bus.use_polling) {
1115 #ifdef DIAGNOSTIC
1116 DPRINTFN(16, ("ohci_intr: ignored interrupt while polling\n"));
1117 #endif
1118 /* for level triggered intrs, should do something to ack */
1119 OWRITE4(sc, OHCI_INTERRUPT_STATUS,
1120 OREAD4(sc, OHCI_INTERRUPT_STATUS));
1121
1122 return (0);
1123 }
1124
1125 return (ohci_intr1(sc));
1126 }
1127
1128 Static int
1129 ohci_intr1(ohci_softc_t *sc)
1130 {
1131 u_int32_t intrs, eintrs;
1132
1133 DPRINTFN(14,("ohci_intr1: enter\n"));
1134
1135 /* In case the interrupt occurs before initialization has completed. */
1136 if (sc == NULL || sc->sc_hcca == NULL) {
1137 #ifdef DIAGNOSTIC
1138 printf("ohci_intr: sc->sc_hcca == NULL\n");
1139 #endif
1140 return (0);
1141 }
1142
1143 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS);
1144 if (!intrs)
1145 return (0);
1146
1147 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs & ~(OHCI_MIE|OHCI_WDH)); /* Acknowledge */
1148 eintrs = intrs & sc->sc_eintrs;
1149 if (!eintrs)
1150 return (0);
1151
1152 sc->sc_bus.intr_context++;
1153 sc->sc_bus.no_intrs++;
1154 DPRINTFN(7, ("ohci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n",
1155 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS),
1156 (u_int)eintrs));
1157
1158 if (eintrs & OHCI_SO) {
1159 sc->sc_overrun_cnt++;
1160 if (usbd_ratecheck(&sc->sc_overrun_ntc)) {
1161 printf("%s: %u scheduling overruns\n",
1162 device_xname(sc->sc_dev), sc->sc_overrun_cnt);
1163 sc->sc_overrun_cnt = 0;
1164 }
1165 /* XXX do what */
1166 eintrs &= ~OHCI_SO;
1167 }
1168 if (eintrs & OHCI_WDH) {
1169 /*
1170 * We block the interrupt below, and reenable it later from
1171 * ohci_softintr().
1172 */
1173 usb_schedsoftintr(&sc->sc_bus);
1174 }
1175 if (eintrs & OHCI_RD) {
1176 printf("%s: resume detect\n", device_xname(sc->sc_dev));
1177 /* XXX process resume detect */
1178 }
1179 if (eintrs & OHCI_UE) {
1180 printf("%s: unrecoverable error, controller halted\n",
1181 device_xname(sc->sc_dev));
1182 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
1183 /* XXX what else */
1184 }
1185 if (eintrs & OHCI_RHSC) {
1186 /*
1187 * We block the interrupt below, and reenable it later from
1188 * a timeout.
1189 */
1190 ohci_rhsc(sc, sc->sc_intrxfer);
1191 /* Do not allow RHSC interrupts > 1 per second */
1192 usb_callout(sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc);
1193 }
1194
1195 sc->sc_bus.intr_context--;
1196
1197 if (eintrs != 0) {
1198 /* Block unprocessed interrupts. */
1199 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs);
1200 sc->sc_eintrs &= ~eintrs;
1201 DPRINTFN(1, ("%s: blocking intrs 0x%x\n",
1202 device_xname(sc->sc_dev), eintrs));
1203 }
1204
1205 return (1);
1206 }
1207
1208 void
1209 ohci_rhsc_enable(void *v_sc)
1210 {
1211 ohci_softc_t *sc = v_sc;
1212 int s;
1213
1214 s = splhardusb();
1215 sc->sc_eintrs |= OHCI_RHSC;
1216 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC);
1217 splx(s);
1218 }
1219
1220 #ifdef OHCI_DEBUG
1221 const char *ohci_cc_strs[] = {
1222 "NO_ERROR",
1223 "CRC",
1224 "BIT_STUFFING",
1225 "DATA_TOGGLE_MISMATCH",
1226 "STALL",
1227 "DEVICE_NOT_RESPONDING",
1228 "PID_CHECK_FAILURE",
1229 "UNEXPECTED_PID",
1230 "DATA_OVERRUN",
1231 "DATA_UNDERRUN",
1232 "BUFFER_OVERRUN",
1233 "BUFFER_UNDERRUN",
1234 "reserved",
1235 "reserved",
1236 "NOT_ACCESSED",
1237 "NOT_ACCESSED",
1238 };
1239 #endif
1240
1241 void
1242 ohci_softintr(void *v)
1243 {
1244 struct usbd_bus *bus = v;
1245 ohci_softc_t *sc = bus->hci_private;
1246 ohci_soft_itd_t *sitd, *sidone, *sitdnext;
1247 ohci_soft_td_t *std, *sdone, *stdnext;
1248 usbd_xfer_handle xfer;
1249 struct ohci_pipe *opipe;
1250 int len, cc, s;
1251 int i, j, actlen, iframes, uedir;
1252 ohci_physaddr_t done;
1253
1254 DPRINTFN(10,("ohci_softintr: enter\n"));
1255
1256 sc->sc_bus.intr_context++;
1257
1258 s = splhardusb();
1259 usb_syncmem(&sc->sc_hccadma, offsetof(struct ohci_hcca, hcca_done_head),
1260 sizeof(sc->sc_hcca->hcca_done_head),
1261 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
1262 done = O32TOH(sc->sc_hcca->hcca_done_head) & ~OHCI_DONE_INTRS;
1263 sc->sc_hcca->hcca_done_head = 0;
1264 usb_syncmem(&sc->sc_hccadma, offsetof(struct ohci_hcca, hcca_done_head),
1265 sizeof(sc->sc_hcca->hcca_done_head),
1266 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1267 OWRITE4(sc, OHCI_INTERRUPT_STATUS, OHCI_WDH);
1268 sc->sc_eintrs |= OHCI_WDH;
1269 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_WDH);
1270 splx(s);
1271
1272 /* Reverse the done list. */
1273 for (sdone = NULL, sidone = NULL; done != 0; ) {
1274 std = ohci_hash_find_td(sc, done);
1275 if (std != NULL) {
1276 usb_syncmem(&std->dma, std->offs, sizeof(std->td),
1277 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
1278 std->dnext = sdone;
1279 done = O32TOH(std->td.td_nexttd);
1280 sdone = std;
1281 DPRINTFN(10,("add TD %p\n", std));
1282 continue;
1283 }
1284 sitd = ohci_hash_find_itd(sc, done);
1285 if (sitd != NULL) {
1286 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd),
1287 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
1288 sitd->dnext = sidone;
1289 done = O32TOH(sitd->itd.itd_nextitd);
1290 sidone = sitd;
1291 DPRINTFN(5,("add ITD %p\n", sitd));
1292 continue;
1293 }
1294 panic("ohci_softintr: addr 0x%08lx not found", (u_long)done);
1295 }
1296
1297 DPRINTFN(10,("ohci_softintr: sdone=%p sidone=%p\n", sdone, sidone));
1298
1299 #ifdef OHCI_DEBUG
1300 if (ohcidebug > 10) {
1301 DPRINTF(("ohci_process_done: TD done:\n"));
1302 ohci_dump_tds(sc, sdone);
1303 }
1304 #endif
1305
1306 for (std = sdone; std; std = stdnext) {
1307 xfer = std->xfer;
1308 stdnext = std->dnext;
1309 DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n",
1310 std, xfer, xfer ? xfer->hcpriv : 0));
1311 if (xfer == NULL) {
1312 /*
1313 * xfer == NULL: There seems to be no xfer associated
1314 * with this TD. It is tailp that happened to end up on
1315 * the done queue.
1316 * Shouldn't happen, but some chips are broken(?).
1317 */
1318 continue;
1319 }
1320 if (xfer->status == USBD_CANCELLED ||
1321 xfer->status == USBD_TIMEOUT) {
1322 DPRINTF(("ohci_process_done: cancel/timeout %p\n",
1323 xfer));
1324 /* Handled by abort routine. */
1325 continue;
1326 }
1327 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer);
1328
1329 len = std->len;
1330 if (std->td.td_cbp != 0)
1331 len -= O32TOH(std->td.td_be) -
1332 O32TOH(std->td.td_cbp) + 1;
1333 DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n", len,
1334 std->flags));
1335 if (std->flags & OHCI_ADD_LEN)
1336 xfer->actlen += len;
1337
1338 cc = OHCI_TD_GET_CC(O32TOH(std->td.td_flags));
1339 if (cc == OHCI_CC_NO_ERROR) {
1340 if (std->flags & OHCI_CALL_DONE) {
1341 xfer->status = USBD_NORMAL_COMPLETION;
1342 s = splusb();
1343 usb_transfer_complete(xfer);
1344 splx(s);
1345 }
1346 ohci_free_std(sc, std);
1347 } else {
1348 /*
1349 * Endpoint is halted. First unlink all the TDs
1350 * belonging to the failed transfer, and then restart
1351 * the endpoint.
1352 */
1353 ohci_soft_td_t *p, *n;
1354 opipe = (struct ohci_pipe *)xfer->pipe;
1355
1356 DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n",
1357 OHCI_TD_GET_CC(O32TOH(std->td.td_flags)),
1358 ohci_cc_strs[OHCI_TD_GET_CC(O32TOH(std->td.td_flags))]));
1359
1360 /* remove TDs */
1361 for (p = std; p->xfer == xfer; p = n) {
1362 n = p->nexttd;
1363 ohci_free_std(sc, p);
1364 }
1365
1366 /* clear halt */
1367 opipe->sed->ed.ed_headp = HTOO32(p->physaddr);
1368 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1369
1370 if (cc == OHCI_CC_STALL)
1371 xfer->status = USBD_STALLED;
1372 else
1373 xfer->status = USBD_IOERROR;
1374 s = splusb();
1375 usb_transfer_complete(xfer);
1376 splx(s);
1377 }
1378 }
1379
1380 #ifdef OHCI_DEBUG
1381 if (ohcidebug > 10) {
1382 DPRINTF(("ohci_softintr: ITD done:\n"));
1383 ohci_dump_itds(sc, sidone);
1384 }
1385 #endif
1386
1387 for (sitd = sidone; sitd != NULL; sitd = sitdnext) {
1388 xfer = sitd->xfer;
1389 sitdnext = sitd->dnext;
1390 DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n",
1391 sitd, xfer, xfer ? xfer->hcpriv : 0));
1392 if (xfer == NULL)
1393 continue;
1394 if (xfer->status == USBD_CANCELLED ||
1395 xfer->status == USBD_TIMEOUT) {
1396 DPRINTF(("ohci_process_done: cancel/timeout %p\n",
1397 xfer));
1398 /* Handled by abort routine. */
1399 continue;
1400 }
1401 #ifdef DIAGNOSTIC
1402 if (sitd->isdone)
1403 printf("ohci_softintr: sitd=%p is done\n", sitd);
1404 sitd->isdone = 1;
1405 #endif
1406 if (sitd->flags & OHCI_CALL_DONE) {
1407 ohci_soft_itd_t *next;
1408
1409 opipe = (struct ohci_pipe *)xfer->pipe;
1410 opipe->u.iso.inuse -= xfer->nframes;
1411 uedir = UE_GET_DIR(xfer->pipe->endpoint->edesc->
1412 bEndpointAddress);
1413 xfer->status = USBD_NORMAL_COMPLETION;
1414 actlen = 0;
1415 for (i = 0, sitd = xfer->hcpriv;;
1416 sitd = next) {
1417 next = sitd->nextitd;
1418 if (OHCI_ITD_GET_CC(O32TOH(sitd->
1419 itd.itd_flags)) != OHCI_CC_NO_ERROR)
1420 xfer->status = USBD_IOERROR;
1421 /* For input, update frlengths with actual */
1422 /* XXX anything necessary for output? */
1423 if (uedir == UE_DIR_IN &&
1424 xfer->status == USBD_NORMAL_COMPLETION) {
1425 iframes = OHCI_ITD_GET_FC(O32TOH(
1426 sitd->itd.itd_flags));
1427 for (j = 0; j < iframes; i++, j++) {
1428 len = O16TOH(sitd->
1429 itd.itd_offset[j]);
1430 if ((OHCI_ITD_PSW_GET_CC(len) &
1431 OHCI_CC_NOT_ACCESSED_MASK)
1432 == OHCI_CC_NOT_ACCESSED)
1433 len = 0;
1434 else
1435 len = OHCI_ITD_PSW_LENGTH(len);
1436 xfer->frlengths[i] = len;
1437 actlen += len;
1438 }
1439 }
1440 if (sitd->flags & OHCI_CALL_DONE)
1441 break;
1442 ohci_free_sitd(sc, sitd);
1443 }
1444 ohci_free_sitd(sc, sitd);
1445 if (uedir == UE_DIR_IN &&
1446 xfer->status == USBD_NORMAL_COMPLETION)
1447 xfer->actlen = actlen;
1448 xfer->hcpriv = NULL;
1449
1450 s = splusb();
1451 usb_transfer_complete(xfer);
1452 splx(s);
1453 }
1454 }
1455
1456 #ifdef USB_USE_SOFTINTR
1457 if (sc->sc_softwake) {
1458 sc->sc_softwake = 0;
1459 wakeup(&sc->sc_softwake);
1460 }
1461 #endif /* USB_USE_SOFTINTR */
1462
1463 sc->sc_bus.intr_context--;
1464 DPRINTFN(10,("ohci_softintr: done:\n"));
1465 }
1466
1467 void
1468 ohci_device_ctrl_done(usbd_xfer_handle xfer)
1469 {
1470 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
1471 int len = UGETW(xfer->request.wLength);
1472 int isread = (xfer->request.bmRequestType & UT_READ);
1473
1474 DPRINTFN(10,("ohci_device_ctrl_done: xfer=%p\n", xfer));
1475
1476 #ifdef DIAGNOSTIC
1477 if (!(xfer->rqflags & URQ_REQUEST)) {
1478 panic("ohci_device_ctrl_done: not a request");
1479 }
1480 #endif
1481 if (len)
1482 usb_syncmem(&xfer->dmabuf, 0, len,
1483 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
1484 usb_syncmem(&opipe->u.ctl.reqdma, 0,
1485 sizeof(usb_device_request_t), BUS_DMASYNC_POSTWRITE);
1486 }
1487
1488 void
1489 ohci_device_intr_done(usbd_xfer_handle xfer)
1490 {
1491 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
1492 ohci_softc_t *sc = opipe->pipe.device->bus->hci_private;
1493 ohci_soft_ed_t *sed = opipe->sed;
1494 ohci_soft_td_t *data, *tail;
1495 int isread =
1496 (UE_GET_DIR(xfer->pipe->endpoint->edesc->bEndpointAddress) == UE_DIR_IN);
1497
1498
1499 DPRINTFN(10,("ohci_device_intr_done: xfer=%p, actlen=%d\n",
1500 xfer, xfer->actlen));
1501
1502 usb_syncmem(&xfer->dmabuf, 0, xfer->length,
1503 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
1504 if (xfer->pipe->repeat) {
1505 data = opipe->tail.td;
1506 tail = ohci_alloc_std(sc); /* XXX should reuse TD */
1507 if (tail == NULL) {
1508 xfer->status = USBD_NOMEM;
1509 return;
1510 }
1511 tail->xfer = NULL;
1512
1513 data->td.td_flags = HTOO32(
1514 OHCI_TD_IN | OHCI_TD_NOCC |
1515 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
1516 if (xfer->flags & USBD_SHORT_XFER_OK)
1517 data->td.td_flags |= HTOO32(OHCI_TD_R);
1518 data->td.td_cbp = HTOO32(DMAADDR(&xfer->dmabuf, 0));
1519 data->nexttd = tail;
1520 data->td.td_nexttd = HTOO32(tail->physaddr);
1521 data->td.td_be = HTOO32(O32TOH(data->td.td_cbp) +
1522 xfer->length - 1);
1523 data->len = xfer->length;
1524 data->xfer = xfer;
1525 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN;
1526 usb_syncmem(&data->dma, data->offs, sizeof(data->td),
1527 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1528 xfer->hcpriv = data;
1529 xfer->actlen = 0;
1530
1531 sed->ed.ed_tailp = HTOO32(tail->physaddr);
1532 usb_syncmem(&sed->dma,
1533 sed->offs + offsetof(ohci_ed_t, ed_tailp),
1534 sizeof(sed->ed.ed_tailp),
1535 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1536 opipe->tail.td = tail;
1537 }
1538 }
1539
1540 void
1541 ohci_device_bulk_done(usbd_xfer_handle xfer)
1542 {
1543 int isread =
1544 (UE_GET_DIR(xfer->pipe->endpoint->edesc->bEndpointAddress) == UE_DIR_IN);
1545
1546 DPRINTFN(10,("ohci_device_bulk_done: xfer=%p, actlen=%d\n",
1547 xfer, xfer->actlen));
1548 usb_syncmem(&xfer->dmabuf, 0, xfer->length,
1549 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
1550 }
1551
1552 void
1553 ohci_rhsc(ohci_softc_t *sc, usbd_xfer_handle xfer)
1554 {
1555 usbd_pipe_handle pipe;
1556 u_char *p;
1557 int i, m;
1558 int hstatus;
1559
1560 hstatus = OREAD4(sc, OHCI_RH_STATUS);
1561 DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n",
1562 sc, xfer, hstatus));
1563
1564 if (xfer == NULL) {
1565 /* Just ignore the change. */
1566 return;
1567 }
1568
1569 pipe = xfer->pipe;
1570
1571 p = KERNADDR(&xfer->dmabuf, 0);
1572 m = min(sc->sc_noport, xfer->length * 8 - 1);
1573 memset(p, 0, xfer->length);
1574 for (i = 1; i <= m; i++) {
1575 /* Pick out CHANGE bits from the status reg. */
1576 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16)
1577 p[i/8] |= 1 << (i%8);
1578 }
1579 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p));
1580 xfer->actlen = xfer->length;
1581 xfer->status = USBD_NORMAL_COMPLETION;
1582
1583 usb_transfer_complete(xfer);
1584 }
1585
1586 void
1587 ohci_root_intr_done(usbd_xfer_handle xfer)
1588 {
1589 }
1590
1591 void
1592 ohci_root_ctrl_done(usbd_xfer_handle xfer)
1593 {
1594 }
1595
1596 /*
1597 * Wait here until controller claims to have an interrupt.
1598 * Then call ohci_intr and return. Use timeout to avoid waiting
1599 * too long.
1600 */
1601 void
1602 ohci_waitintr(ohci_softc_t *sc, usbd_xfer_handle xfer)
1603 {
1604 int timo;
1605 u_int32_t intrs;
1606
1607 xfer->status = USBD_IN_PROGRESS;
1608 for (timo = xfer->timeout; timo >= 0; timo--) {
1609 usb_delay_ms(&sc->sc_bus, 1);
1610 if (sc->sc_dying)
1611 break;
1612 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs;
1613 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs));
1614 #ifdef OHCI_DEBUG
1615 if (ohcidebug > 15)
1616 ohci_dumpregs(sc);
1617 #endif
1618 if (intrs) {
1619 ohci_intr1(sc);
1620 if (xfer->status != USBD_IN_PROGRESS)
1621 return;
1622 }
1623 }
1624
1625 /* Timeout */
1626 DPRINTF(("ohci_waitintr: timeout\n"));
1627 xfer->status = USBD_TIMEOUT;
1628 usb_transfer_complete(xfer);
1629 /* XXX should free TD */
1630 }
1631
1632 void
1633 ohci_poll(struct usbd_bus *bus)
1634 {
1635 ohci_softc_t *sc = bus->hci_private;
1636 #ifdef OHCI_DEBUG
1637 static int last;
1638 int new;
1639 new = OREAD4(sc, OHCI_INTERRUPT_STATUS);
1640 if (new != last) {
1641 DPRINTFN(10,("ohci_poll: intrs=0x%04x\n", new));
1642 last = new;
1643 }
1644 #endif
1645
1646 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs)
1647 ohci_intr1(sc);
1648 }
1649
1650 usbd_status
1651 ohci_device_request(usbd_xfer_handle xfer)
1652 {
1653 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
1654 usb_device_request_t *req = &xfer->request;
1655 usbd_device_handle dev = opipe->pipe.device;
1656 ohci_softc_t *sc = dev->bus->hci_private;
1657 int addr = dev->address;
1658 ohci_soft_td_t *setup, *stat, *next, *tail;
1659 ohci_soft_ed_t *sed;
1660 int isread;
1661 int len;
1662 usbd_status err;
1663 int s;
1664
1665 isread = req->bmRequestType & UT_READ;
1666 len = UGETW(req->wLength);
1667
1668 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, "
1669 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
1670 req->bmRequestType, req->bRequest, UGETW(req->wValue),
1671 UGETW(req->wIndex), len, addr,
1672 opipe->pipe.endpoint->edesc->bEndpointAddress));
1673
1674 setup = opipe->tail.td;
1675 stat = ohci_alloc_std(sc);
1676 if (stat == NULL) {
1677 err = USBD_NOMEM;
1678 goto bad1;
1679 }
1680 tail = ohci_alloc_std(sc);
1681 if (tail == NULL) {
1682 err = USBD_NOMEM;
1683 goto bad2;
1684 }
1685 tail->xfer = NULL;
1686
1687 sed = opipe->sed;
1688 opipe->u.ctl.length = len;
1689
1690 /* Update device address and length since they may have changed
1691 during the setup of the control pipe in usbd_new_device(). */
1692 /* XXX This only needs to be done once, but it's too early in open. */
1693 /* XXXX Should not touch ED here! */
1694
1695 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
1696 sizeof(sed->ed.ed_flags),
1697 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
1698 sed->ed.ed_flags = HTOO32(
1699 (O32TOH(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) |
1700 OHCI_ED_SET_FA(addr) |
1701 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize)));
1702 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
1703 sizeof(sed->ed.ed_flags),
1704 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1705
1706 next = stat;
1707
1708 /* Set up data transaction */
1709 if (len != 0) {
1710 ohci_soft_td_t *std = stat;
1711
1712 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer,
1713 std, &stat);
1714 stat = stat->nexttd; /* point at free TD */
1715 if (err)
1716 goto bad3;
1717 /* Start toggle at 1 and then use the carried toggle. */
1718 std->td.td_flags &= HTOO32(~OHCI_TD_TOGGLE_MASK);
1719 std->td.td_flags |= HTOO32(OHCI_TD_TOGGLE_1);
1720 usb_syncmem(&std->dma,
1721 std->offs + offsetof(ohci_td_t, td_flags),
1722 sizeof(std->td.td_flags),
1723 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1724 }
1725
1726 memcpy(KERNADDR(&opipe->u.ctl.reqdma, 0), req, sizeof *req);
1727 usb_syncmem(&opipe->u.ctl.reqdma, 0, sizeof *req, BUS_DMASYNC_PREWRITE);
1728
1729 setup->td.td_flags = HTOO32(OHCI_TD_SETUP | OHCI_TD_NOCC |
1730 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR);
1731 setup->td.td_cbp = HTOO32(DMAADDR(&opipe->u.ctl.reqdma, 0));
1732 setup->nexttd = next;
1733 setup->td.td_nexttd = HTOO32(next->physaddr);
1734 setup->td.td_be = HTOO32(O32TOH(setup->td.td_cbp) + sizeof *req - 1);
1735 setup->len = 0;
1736 setup->xfer = xfer;
1737 setup->flags = 0;
1738 xfer->hcpriv = setup;
1739 usb_syncmem(&setup->dma, setup->offs, sizeof(setup->td),
1740 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1741
1742 stat->td.td_flags = HTOO32(
1743 (isread ? OHCI_TD_OUT : OHCI_TD_IN) |
1744 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1));
1745 stat->td.td_cbp = 0;
1746 stat->nexttd = tail;
1747 stat->td.td_nexttd = HTOO32(tail->physaddr);
1748 stat->td.td_be = 0;
1749 stat->flags = OHCI_CALL_DONE;
1750 stat->len = 0;
1751 stat->xfer = xfer;
1752 usb_syncmem(&stat->dma, stat->offs, sizeof(stat->td),
1753 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1754
1755 #ifdef OHCI_DEBUG
1756 if (ohcidebug > 5) {
1757 DPRINTF(("ohci_device_request:\n"));
1758 ohci_dump_ed(sc, sed);
1759 ohci_dump_tds(sc, setup);
1760 }
1761 #endif
1762
1763 /* Insert ED in schedule */
1764 s = splusb();
1765 sed->ed.ed_tailp = HTOO32(tail->physaddr);
1766 usb_syncmem(&sed->dma,
1767 sed->offs + offsetof(ohci_ed_t, ed_tailp),
1768 sizeof(sed->ed.ed_tailp),
1769 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1770 opipe->tail.td = tail;
1771 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1772 if (xfer->timeout && !sc->sc_bus.use_polling) {
1773 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout),
1774 ohci_timeout, xfer);
1775 }
1776 splx(s);
1777
1778 #ifdef OHCI_DEBUG
1779 if (ohcidebug > 20) {
1780 delay(10000);
1781 DPRINTF(("ohci_device_request: status=%x\n",
1782 OREAD4(sc, OHCI_COMMAND_STATUS)));
1783 ohci_dumpregs(sc);
1784 printf("ctrl head:\n");
1785 ohci_dump_ed(sc, sc->sc_ctrl_head);
1786 printf("sed:\n");
1787 ohci_dump_ed(sc, sed);
1788 ohci_dump_tds(sc, setup);
1789 }
1790 #endif
1791
1792 return (USBD_NORMAL_COMPLETION);
1793
1794 bad3:
1795 ohci_free_std(sc, tail);
1796 bad2:
1797 ohci_free_std(sc, stat);
1798 bad1:
1799 return (err);
1800 }
1801
1802 /*
1803 * Add an ED to the schedule. Called at splusb().
1804 */
1805 void
1806 ohci_add_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed, ohci_soft_ed_t *head)
1807 {
1808 DPRINTFN(8,("ohci_add_ed: sed=%p head=%p\n", sed, head));
1809
1810 SPLUSBCHECK;
1811 usb_syncmem(&head->dma, head->offs + offsetof(ohci_ed_t, ed_nexted),
1812 sizeof(head->ed.ed_nexted),
1813 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
1814 sed->next = head->next;
1815 sed->ed.ed_nexted = head->ed.ed_nexted;
1816 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_nexted),
1817 sizeof(sed->ed.ed_nexted),
1818 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1819 head->next = sed;
1820 head->ed.ed_nexted = HTOO32(sed->physaddr);
1821 usb_syncmem(&head->dma, head->offs + offsetof(ohci_ed_t, ed_nexted),
1822 sizeof(head->ed.ed_nexted),
1823 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1824 }
1825
1826 /*
1827 * Remove an ED from the schedule. Called at splusb().
1828 */
1829 void
1830 ohci_rem_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head)
1831 {
1832 ohci_soft_ed_t *p;
1833
1834 SPLUSBCHECK;
1835
1836 /* XXX */
1837 for (p = head; p != NULL && p->next != sed; p = p->next)
1838 ;
1839 if (p == NULL)
1840 panic("ohci_rem_ed: ED not found");
1841 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_nexted),
1842 sizeof(sed->ed.ed_nexted),
1843 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
1844 p->next = sed->next;
1845 p->ed.ed_nexted = sed->ed.ed_nexted;
1846 usb_syncmem(&p->dma, p->offs + offsetof(ohci_ed_t, ed_nexted),
1847 sizeof(p->ed.ed_nexted),
1848 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1849 }
1850
1851 /*
1852 * When a transfer is completed the TD is added to the done queue by
1853 * the host controller. This queue is the processed by software.
1854 * Unfortunately the queue contains the physical address of the TD
1855 * and we have no simple way to translate this back to a kernel address.
1856 * To make the translation possible (and fast) we use a hash table of
1857 * TDs currently in the schedule. The physical address is used as the
1858 * hash value.
1859 */
1860
1861 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE)
1862 /* Called at splusb() */
1863 void
1864 ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std)
1865 {
1866 int h = HASH(std->physaddr);
1867
1868 SPLUSBCHECK;
1869
1870 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext);
1871 }
1872
1873 /* Called at splusb() */
1874 void
1875 ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std)
1876 {
1877 SPLUSBCHECK;
1878
1879 LIST_REMOVE(std, hnext);
1880 }
1881
1882 ohci_soft_td_t *
1883 ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a)
1884 {
1885 int h = HASH(a);
1886 ohci_soft_td_t *std;
1887
1888 for (std = LIST_FIRST(&sc->sc_hash_tds[h]);
1889 std != NULL;
1890 std = LIST_NEXT(std, hnext))
1891 if (std->physaddr == a)
1892 return (std);
1893 return (NULL);
1894 }
1895
1896 /* Called at splusb() */
1897 void
1898 ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
1899 {
1900 int h = HASH(sitd->physaddr);
1901
1902 SPLUSBCHECK;
1903
1904 DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n",
1905 sitd, (u_long)sitd->physaddr));
1906
1907 LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext);
1908 }
1909
1910 /* Called at splusb() */
1911 void
1912 ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
1913 {
1914 SPLUSBCHECK;
1915
1916 DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n",
1917 sitd, (u_long)sitd->physaddr));
1918
1919 LIST_REMOVE(sitd, hnext);
1920 }
1921
1922 ohci_soft_itd_t *
1923 ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a)
1924 {
1925 int h = HASH(a);
1926 ohci_soft_itd_t *sitd;
1927
1928 for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]);
1929 sitd != NULL;
1930 sitd = LIST_NEXT(sitd, hnext))
1931 if (sitd->physaddr == a)
1932 return (sitd);
1933 return (NULL);
1934 }
1935
1936 void
1937 ohci_timeout(void *addr)
1938 {
1939 struct ohci_xfer *oxfer = addr;
1940 struct ohci_pipe *opipe = (struct ohci_pipe *)oxfer->xfer.pipe;
1941 ohci_softc_t *sc = opipe->pipe.device->bus->hci_private;
1942
1943 DPRINTF(("ohci_timeout: oxfer=%p\n", oxfer));
1944
1945 if (sc->sc_dying) {
1946 ohci_abort_xfer(&oxfer->xfer, USBD_TIMEOUT);
1947 return;
1948 }
1949
1950 /* Execute the abort in a process context. */
1951 usb_init_task(&oxfer->abort_task, ohci_timeout_task, addr);
1952 usb_add_task(oxfer->xfer.pipe->device, &oxfer->abort_task,
1953 USB_TASKQ_HC);
1954 }
1955
1956 void
1957 ohci_timeout_task(void *addr)
1958 {
1959 usbd_xfer_handle xfer = addr;
1960 int s;
1961
1962 DPRINTF(("ohci_timeout_task: xfer=%p\n", xfer));
1963
1964 s = splusb();
1965 ohci_abort_xfer(xfer, USBD_TIMEOUT);
1966 splx(s);
1967 }
1968
1969 #ifdef OHCI_DEBUG
1970 void
1971 ohci_dump_tds(ohci_softc_t *sc, ohci_soft_td_t *std)
1972 {
1973 for (; std; std = std->nexttd)
1974 ohci_dump_td(sc, std);
1975 }
1976
1977 void
1978 ohci_dump_td(ohci_softc_t *sc, ohci_soft_td_t *std)
1979 {
1980 char sbuf[128];
1981
1982 usb_syncmem(&std->dma, std->offs, sizeof(std->td),
1983 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
1984 snprintb(sbuf, sizeof(sbuf),
1985 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE",
1986 (u_int32_t)O32TOH(std->td.td_flags));
1987 printf("TD(%p) at %08lx: %s delay=%d ec=%d cc=%d\ncbp=0x%08lx "
1988 "nexttd=0x%08lx be=0x%08lx\n",
1989 std, (u_long)std->physaddr, sbuf,
1990 OHCI_TD_GET_DI(O32TOH(std->td.td_flags)),
1991 OHCI_TD_GET_EC(O32TOH(std->td.td_flags)),
1992 OHCI_TD_GET_CC(O32TOH(std->td.td_flags)),
1993 (u_long)O32TOH(std->td.td_cbp),
1994 (u_long)O32TOH(std->td.td_nexttd),
1995 (u_long)O32TOH(std->td.td_be));
1996 }
1997
1998 void
1999 ohci_dump_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
2000 {
2001 int i;
2002
2003 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd),
2004 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
2005 printf("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n"
2006 "bp0=0x%08lx next=0x%08lx be=0x%08lx\n",
2007 sitd, (u_long)sitd->physaddr,
2008 OHCI_ITD_GET_SF(O32TOH(sitd->itd.itd_flags)),
2009 OHCI_ITD_GET_DI(O32TOH(sitd->itd.itd_flags)),
2010 OHCI_ITD_GET_FC(O32TOH(sitd->itd.itd_flags)),
2011 OHCI_ITD_GET_CC(O32TOH(sitd->itd.itd_flags)),
2012 (u_long)O32TOH(sitd->itd.itd_bp0),
2013 (u_long)O32TOH(sitd->itd.itd_nextitd),
2014 (u_long)O32TOH(sitd->itd.itd_be));
2015 for (i = 0; i < OHCI_ITD_NOFFSET; i++)
2016 printf("offs[%d]=0x%04x ", i,
2017 (u_int)O16TOH(sitd->itd.itd_offset[i]));
2018 printf("\n");
2019 }
2020
2021 void
2022 ohci_dump_itds(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
2023 {
2024 for (; sitd; sitd = sitd->nextitd)
2025 ohci_dump_itd(sc, sitd);
2026 }
2027
2028 void
2029 ohci_dump_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed)
2030 {
2031 char sbuf[128], sbuf2[128];
2032
2033 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
2034 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
2035 snprintb(sbuf, sizeof(sbuf),
2036 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO",
2037 (u_int32_t)O32TOH(sed->ed.ed_flags));
2038 snprintb(sbuf2, sizeof(sbuf2), "\20\1HALT\2CARRY",
2039 (u_int32_t)O32TOH(sed->ed.ed_headp));
2040
2041 printf("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d flags=%s\ntailp=0x%08lx "
2042 "headflags=%s headp=0x%08lx nexted=0x%08lx\n",
2043 sed, (u_long)sed->physaddr,
2044 OHCI_ED_GET_FA(O32TOH(sed->ed.ed_flags)),
2045 OHCI_ED_GET_EN(O32TOH(sed->ed.ed_flags)),
2046 OHCI_ED_GET_MAXP(O32TOH(sed->ed.ed_flags)), sbuf,
2047 (u_long)O32TOH(sed->ed.ed_tailp), sbuf2,
2048 (u_long)O32TOH(sed->ed.ed_headp),
2049 (u_long)O32TOH(sed->ed.ed_nexted));
2050 }
2051 #endif
2052
2053 usbd_status
2054 ohci_open(usbd_pipe_handle pipe)
2055 {
2056 usbd_device_handle dev = pipe->device;
2057 ohci_softc_t *sc = dev->bus->hci_private;
2058 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
2059 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2060 u_int8_t addr = dev->address;
2061 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE;
2062 ohci_soft_ed_t *sed;
2063 ohci_soft_td_t *std;
2064 ohci_soft_itd_t *sitd;
2065 ohci_physaddr_t tdphys;
2066 u_int32_t fmt;
2067 usbd_status err;
2068 int s;
2069 int ival;
2070
2071 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
2072 pipe, addr, ed->bEndpointAddress, sc->sc_addr));
2073
2074 if (sc->sc_dying)
2075 return (USBD_IOERROR);
2076
2077 std = NULL;
2078 sed = NULL;
2079
2080 if (addr == sc->sc_addr) {
2081 switch (ed->bEndpointAddress) {
2082 case USB_CONTROL_ENDPOINT:
2083 pipe->methods = &ohci_root_ctrl_methods;
2084 break;
2085 case UE_DIR_IN | OHCI_INTR_ENDPT:
2086 pipe->methods = &ohci_root_intr_methods;
2087 break;
2088 default:
2089 return (USBD_INVAL);
2090 }
2091 } else {
2092 sed = ohci_alloc_sed(sc);
2093 if (sed == NULL)
2094 goto bad0;
2095 opipe->sed = sed;
2096 if (xfertype == UE_ISOCHRONOUS) {
2097 sitd = ohci_alloc_sitd(sc);
2098 if (sitd == NULL)
2099 goto bad1;
2100 opipe->tail.itd = sitd;
2101 tdphys = sitd->physaddr;
2102 fmt = OHCI_ED_FORMAT_ISO;
2103 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN)
2104 fmt |= OHCI_ED_DIR_IN;
2105 else
2106 fmt |= OHCI_ED_DIR_OUT;
2107 } else {
2108 std = ohci_alloc_std(sc);
2109 if (std == NULL)
2110 goto bad1;
2111 opipe->tail.td = std;
2112 tdphys = std->physaddr;
2113 fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD;
2114 }
2115 sed->ed.ed_flags = HTOO32(
2116 OHCI_ED_SET_FA(addr) |
2117 OHCI_ED_SET_EN(UE_GET_ADDR(ed->bEndpointAddress)) |
2118 (dev->speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) |
2119 fmt |
2120 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize)));
2121 sed->ed.ed_headp = sed->ed.ed_tailp = HTOO32(tdphys);
2122 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
2123 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
2124
2125 switch (xfertype) {
2126 case UE_CONTROL:
2127 pipe->methods = &ohci_device_ctrl_methods;
2128 err = usb_allocmem(&sc->sc_bus,
2129 sizeof(usb_device_request_t),
2130 0, &opipe->u.ctl.reqdma);
2131 if (err)
2132 goto bad;
2133 s = splusb();
2134 ohci_add_ed(sc, sed, sc->sc_ctrl_head);
2135 splx(s);
2136 break;
2137 case UE_INTERRUPT:
2138 pipe->methods = &ohci_device_intr_methods;
2139 ival = pipe->interval;
2140 if (ival == USBD_DEFAULT_INTERVAL)
2141 ival = ed->bInterval;
2142 return (ohci_device_setintr(sc, opipe, ival));
2143 case UE_ISOCHRONOUS:
2144 pipe->methods = &ohci_device_isoc_methods;
2145 return (ohci_setup_isoc(pipe));
2146 case UE_BULK:
2147 pipe->methods = &ohci_device_bulk_methods;
2148 s = splusb();
2149 ohci_add_ed(sc, sed, sc->sc_bulk_head);
2150 splx(s);
2151 break;
2152 }
2153 }
2154 return (USBD_NORMAL_COMPLETION);
2155
2156 bad:
2157 if (std != NULL)
2158 ohci_free_std(sc, std);
2159 bad1:
2160 if (sed != NULL)
2161 ohci_free_sed(sc, sed);
2162 bad0:
2163 return (USBD_NOMEM);
2164
2165 }
2166
2167 /*
2168 * Close a reqular pipe.
2169 * Assumes that there are no pending transactions.
2170 */
2171 void
2172 ohci_close_pipe(usbd_pipe_handle pipe, ohci_soft_ed_t *head)
2173 {
2174 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2175 ohci_softc_t *sc = pipe->device->bus->hci_private;
2176 ohci_soft_ed_t *sed = opipe->sed;
2177 int s;
2178
2179 s = splusb();
2180 #ifdef DIAGNOSTIC
2181 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
2182 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
2183 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) {
2184 ohci_soft_td_t *std;
2185 std = ohci_hash_find_td(sc, O32TOH(sed->ed.ed_headp));
2186 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x "
2187 "tl=0x%x pipe=%p, std=%p\n", sed,
2188 (int)O32TOH(sed->ed.ed_headp),
2189 (int)O32TOH(sed->ed.ed_tailp),
2190 pipe, std);
2191 #ifdef USB_DEBUG
2192 usbd_dump_pipe(&opipe->pipe);
2193 #endif
2194 #ifdef OHCI_DEBUG
2195 ohci_dump_ed(sc, sed);
2196 if (std)
2197 ohci_dump_td(sc, std);
2198 #endif
2199 usb_delay_ms(&sc->sc_bus, 2);
2200 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
2201 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK))
2202 printf("ohci_close_pipe: pipe still not empty\n");
2203 }
2204 #endif
2205 ohci_rem_ed(sed, head);
2206 /* Make sure the host controller is not touching this ED */
2207 usb_delay_ms(&sc->sc_bus, 1);
2208 splx(s);
2209 ohci_free_sed(sc, opipe->sed);
2210 }
2211
2212 /*
2213 * Abort a device request.
2214 * If this routine is called at splusb() it guarantees that the request
2215 * will be removed from the hardware scheduling and that the callback
2216 * for it will be called with USBD_CANCELLED status.
2217 * It's impossible to guarantee that the requested transfer will not
2218 * have happened since the hardware runs concurrently.
2219 * If the transaction has already happened we rely on the ordinary
2220 * interrupt processing to process it.
2221 */
2222 void
2223 ohci_abort_xfer(usbd_xfer_handle xfer, usbd_status status)
2224 {
2225 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
2226 ohci_softc_t *sc = opipe->pipe.device->bus->hci_private;
2227 ohci_soft_ed_t *sed = opipe->sed;
2228 ohci_soft_td_t *p, *n;
2229 ohci_physaddr_t headp;
2230 int s, hit;
2231 int wake;
2232
2233 DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p sed=%p\n", xfer, opipe,sed));
2234
2235 if (sc->sc_dying) {
2236 /* If we're dying, just do the software part. */
2237 s = splusb();
2238 xfer->status = status; /* make software ignore it */
2239 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer);
2240 usb_transfer_complete(xfer);
2241 splx(s);
2242 return;
2243 }
2244
2245 if (xfer->device->bus->intr_context || !curproc)
2246 panic("ohci_abort_xfer: not in process context");
2247
2248 /*
2249 * If an abort is already in progress then just wait for it to
2250 * complete and return.
2251 */
2252 if (xfer->hcflags & UXFER_ABORTING) {
2253 DPRINTFN(2, ("ohci_abort_xfer: already aborting\n"));
2254 #ifdef DIAGNOSTIC
2255 if (status == USBD_TIMEOUT)
2256 printf("0hci_abort_xfer: TIMEOUT while aborting\n");
2257 #endif
2258 /* Override the status which might be USBD_TIMEOUT. */
2259 xfer->status = status;
2260 DPRINTFN(2, ("ohci_abort_xfer: waiting for abort to finish\n"));
2261 xfer->hcflags |= UXFER_ABORTWAIT;
2262 while (xfer->hcflags & UXFER_ABORTING)
2263 tsleep(&xfer->hcflags, PZERO, "ohciaw", 0);
2264 return;
2265 }
2266 xfer->hcflags |= UXFER_ABORTING;
2267
2268 /*
2269 * Step 1: Make interrupt routine and hardware ignore xfer.
2270 */
2271 s = splusb();
2272 xfer->status = status; /* make software ignore it */
2273 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer);
2274 splx(s);
2275 DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed));
2276 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
2277 sizeof(sed->ed.ed_flags),
2278 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
2279 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */
2280 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
2281 sizeof(sed->ed.ed_flags),
2282 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
2283
2284 /*
2285 * Step 2: Wait until we know hardware has finished any possible
2286 * use of the xfer. Also make sure the soft interrupt routine
2287 * has run.
2288 */
2289 usb_delay_ms(opipe->pipe.device->bus, 20); /* Hardware finishes in 1ms */
2290 s = splusb();
2291 #ifdef USB_USE_SOFTINTR
2292 sc->sc_softwake = 1;
2293 #endif /* USB_USE_SOFTINTR */
2294 usb_schedsoftintr(&sc->sc_bus);
2295 #ifdef USB_USE_SOFTINTR
2296 tsleep(&sc->sc_softwake, PZERO, "ohciab", 0);
2297 #endif /* USB_USE_SOFTINTR */
2298 splx(s);
2299
2300 /*
2301 * Step 3: Remove any vestiges of the xfer from the hardware.
2302 * The complication here is that the hardware may have executed
2303 * beyond the xfer we're trying to abort. So as we're scanning
2304 * the TDs of this xfer we check if the hardware points to
2305 * any of them.
2306 */
2307 s = splusb(); /* XXX why? */
2308 p = xfer->hcpriv;
2309 #ifdef DIAGNOSTIC
2310 if (p == NULL) {
2311 xfer->hcflags &= ~UXFER_ABORTING; /* XXX */
2312 splx(s);
2313 printf("ohci_abort_xfer: hcpriv is NULL\n");
2314 return;
2315 }
2316 #endif
2317 #ifdef OHCI_DEBUG
2318 if (ohcidebug > 1) {
2319 DPRINTF(("ohci_abort_xfer: sed=\n"));
2320 ohci_dump_ed(sc, sed);
2321 ohci_dump_tds(sc, p);
2322 }
2323 #endif
2324 headp = O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK;
2325 hit = 0;
2326 for (; p->xfer == xfer; p = n) {
2327 hit |= headp == p->physaddr;
2328 n = p->nexttd;
2329 ohci_free_std(sc, p);
2330 }
2331 /* Zap headp register if hardware pointed inside the xfer. */
2332 if (hit) {
2333 DPRINTFN(1,("ohci_abort_xfer: set hd=0x%08x, tl=0x%08x\n",
2334 (int)p->physaddr, (int)O32TOH(sed->ed.ed_tailp)));
2335 sed->ed.ed_headp = HTOO32(p->physaddr); /* unlink TDs */
2336 usb_syncmem(&sed->dma,
2337 sed->offs + offsetof(ohci_ed_t, ed_headp),
2338 sizeof(sed->ed.ed_headp),
2339 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
2340 } else {
2341 DPRINTFN(1,("ohci_abort_xfer: no hit\n"));
2342 }
2343
2344 /*
2345 * Step 4: Turn on hardware again.
2346 */
2347 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
2348 sizeof(sed->ed.ed_flags),
2349 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
2350 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */
2351 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
2352 sizeof(sed->ed.ed_flags),
2353 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
2354
2355 /*
2356 * Step 5: Execute callback.
2357 */
2358 wake = xfer->hcflags & UXFER_ABORTWAIT;
2359 xfer->hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT);
2360 usb_transfer_complete(xfer);
2361 if (wake)
2362 wakeup(&xfer->hcflags);
2363
2364 splx(s);
2365 }
2366
2367 /*
2368 * Data structures and routines to emulate the root hub.
2369 */
2370 Static usb_device_descriptor_t ohci_devd = {
2371 USB_DEVICE_DESCRIPTOR_SIZE,
2372 UDESC_DEVICE, /* type */
2373 {0x00, 0x01}, /* USB version */
2374 UDCLASS_HUB, /* class */
2375 UDSUBCLASS_HUB, /* subclass */
2376 UDPROTO_FSHUB, /* protocol */
2377 64, /* max packet */
2378 {0},{0},{0x00,0x01}, /* device id */
2379 1,2,0, /* string indicies */
2380 1 /* # of configurations */
2381 };
2382
2383 Static const usb_config_descriptor_t ohci_confd = {
2384 USB_CONFIG_DESCRIPTOR_SIZE,
2385 UDESC_CONFIG,
2386 {USB_CONFIG_DESCRIPTOR_SIZE +
2387 USB_INTERFACE_DESCRIPTOR_SIZE +
2388 USB_ENDPOINT_DESCRIPTOR_SIZE},
2389 1,
2390 1,
2391 0,
2392 UC_ATTR_MBO | UC_SELF_POWERED,
2393 0 /* max power */
2394 };
2395
2396 Static const usb_interface_descriptor_t ohci_ifcd = {
2397 USB_INTERFACE_DESCRIPTOR_SIZE,
2398 UDESC_INTERFACE,
2399 0,
2400 0,
2401 1,
2402 UICLASS_HUB,
2403 UISUBCLASS_HUB,
2404 UIPROTO_FSHUB,
2405 0
2406 };
2407
2408 Static const usb_endpoint_descriptor_t ohci_endpd = {
2409 .bLength = USB_ENDPOINT_DESCRIPTOR_SIZE,
2410 .bDescriptorType = UDESC_ENDPOINT,
2411 .bEndpointAddress = UE_DIR_IN | OHCI_INTR_ENDPT,
2412 .bmAttributes = UE_INTERRUPT,
2413 .wMaxPacketSize = {8, 0}, /* max packet */
2414 .bInterval = 255,
2415 };
2416
2417 Static const usb_hub_descriptor_t ohci_hubd = {
2418 .bDescLength = USB_HUB_DESCRIPTOR_SIZE,
2419 .bDescriptorType = UDESC_HUB,
2420 };
2421
2422 /*
2423 * Simulate a hardware hub by handling all the necessary requests.
2424 */
2425 Static usbd_status
2426 ohci_root_ctrl_transfer(usbd_xfer_handle xfer)
2427 {
2428 usbd_status err;
2429
2430 /* Insert last in queue. */
2431 err = usb_insert_transfer(xfer);
2432 if (err)
2433 return (err);
2434
2435 /* Pipe isn't running, start first */
2436 return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2437 }
2438
2439 Static usbd_status
2440 ohci_root_ctrl_start(usbd_xfer_handle xfer)
2441 {
2442 ohci_softc_t *sc = xfer->pipe->device->bus->hci_private;
2443 usb_device_request_t *req;
2444 void *buf = NULL;
2445 int port, i;
2446 int s, len, value, index, l, totlen = 0;
2447 usb_port_status_t ps;
2448 usb_hub_descriptor_t hubd;
2449 usbd_status err;
2450 u_int32_t v;
2451
2452 if (sc->sc_dying)
2453 return (USBD_IOERROR);
2454
2455 #ifdef DIAGNOSTIC
2456 if (!(xfer->rqflags & URQ_REQUEST))
2457 /* XXX panic */
2458 return (USBD_INVAL);
2459 #endif
2460 req = &xfer->request;
2461
2462 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n",
2463 req->bmRequestType, req->bRequest));
2464
2465 len = UGETW(req->wLength);
2466 value = UGETW(req->wValue);
2467 index = UGETW(req->wIndex);
2468
2469 if (len != 0)
2470 buf = KERNADDR(&xfer->dmabuf, 0);
2471
2472 #define C(x,y) ((x) | ((y) << 8))
2473 switch(C(req->bRequest, req->bmRequestType)) {
2474 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
2475 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
2476 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
2477 /*
2478 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
2479 * for the integrated root hub.
2480 */
2481 break;
2482 case C(UR_GET_CONFIG, UT_READ_DEVICE):
2483 if (len > 0) {
2484 *(u_int8_t *)buf = sc->sc_conf;
2485 totlen = 1;
2486 }
2487 break;
2488 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
2489 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value));
2490 if (len == 0)
2491 break;
2492 switch(value >> 8) {
2493 case UDESC_DEVICE:
2494 if ((value & 0xff) != 0) {
2495 err = USBD_IOERROR;
2496 goto ret;
2497 }
2498 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
2499 USETW(ohci_devd.idVendor, sc->sc_id_vendor);
2500 memcpy(buf, &ohci_devd, l);
2501 break;
2502 case UDESC_CONFIG:
2503 if ((value & 0xff) != 0) {
2504 err = USBD_IOERROR;
2505 goto ret;
2506 }
2507 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
2508 memcpy(buf, &ohci_confd, l);
2509 buf = (char *)buf + l;
2510 len -= l;
2511 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
2512 totlen += l;
2513 memcpy(buf, &ohci_ifcd, l);
2514 buf = (char *)buf + l;
2515 len -= l;
2516 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
2517 totlen += l;
2518 memcpy(buf, &ohci_endpd, l);
2519 break;
2520 case UDESC_STRING:
2521 #define sd ((usb_string_descriptor_t *)buf)
2522 switch (value & 0xff) {
2523 case 0: /* Language table */
2524 totlen = usb_makelangtbl(sd, len);
2525 break;
2526 case 1: /* Vendor */
2527 totlen = usb_makestrdesc(sd, len,
2528 sc->sc_vendor);
2529 break;
2530 case 2: /* Product */
2531 totlen = usb_makestrdesc(sd, len,
2532 "OHCI root hub");
2533 break;
2534 }
2535 #undef sd
2536 break;
2537 default:
2538 err = USBD_IOERROR;
2539 goto ret;
2540 }
2541 break;
2542 case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
2543 if (len > 0) {
2544 *(u_int8_t *)buf = 0;
2545 totlen = 1;
2546 }
2547 break;
2548 case C(UR_GET_STATUS, UT_READ_DEVICE):
2549 if (len > 1) {
2550 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
2551 totlen = 2;
2552 }
2553 break;
2554 case C(UR_GET_STATUS, UT_READ_INTERFACE):
2555 case C(UR_GET_STATUS, UT_READ_ENDPOINT):
2556 if (len > 1) {
2557 USETW(((usb_status_t *)buf)->wStatus, 0);
2558 totlen = 2;
2559 }
2560 break;
2561 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
2562 if (value >= USB_MAX_DEVICES) {
2563 err = USBD_IOERROR;
2564 goto ret;
2565 }
2566 sc->sc_addr = value;
2567 break;
2568 case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
2569 if (value != 0 && value != 1) {
2570 err = USBD_IOERROR;
2571 goto ret;
2572 }
2573 sc->sc_conf = value;
2574 break;
2575 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
2576 break;
2577 case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
2578 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
2579 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
2580 err = USBD_IOERROR;
2581 goto ret;
2582 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
2583 break;
2584 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
2585 break;
2586 /* Hub requests */
2587 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
2588 break;
2589 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
2590 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
2591 "port=%d feature=%d\n",
2592 index, value));
2593 if (index < 1 || index > sc->sc_noport) {
2594 err = USBD_IOERROR;
2595 goto ret;
2596 }
2597 port = OHCI_RH_PORT_STATUS(index);
2598 switch(value) {
2599 case UHF_PORT_ENABLE:
2600 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS);
2601 break;
2602 case UHF_PORT_SUSPEND:
2603 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR);
2604 break;
2605 case UHF_PORT_POWER:
2606 /* Yes, writing to the LOW_SPEED bit clears power. */
2607 OWRITE4(sc, port, UPS_LOW_SPEED);
2608 break;
2609 case UHF_C_PORT_CONNECTION:
2610 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16);
2611 break;
2612 case UHF_C_PORT_ENABLE:
2613 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16);
2614 break;
2615 case UHF_C_PORT_SUSPEND:
2616 OWRITE4(sc, port, UPS_C_SUSPEND << 16);
2617 break;
2618 case UHF_C_PORT_OVER_CURRENT:
2619 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16);
2620 break;
2621 case UHF_C_PORT_RESET:
2622 OWRITE4(sc, port, UPS_C_PORT_RESET << 16);
2623 break;
2624 default:
2625 err = USBD_IOERROR;
2626 goto ret;
2627 }
2628 switch(value) {
2629 case UHF_C_PORT_CONNECTION:
2630 case UHF_C_PORT_ENABLE:
2631 case UHF_C_PORT_SUSPEND:
2632 case UHF_C_PORT_OVER_CURRENT:
2633 case UHF_C_PORT_RESET:
2634 /* Enable RHSC interrupt if condition is cleared. */
2635 if ((OREAD4(sc, port) >> 16) == 0)
2636 ohci_rhsc_enable(sc);
2637 break;
2638 default:
2639 break;
2640 }
2641 break;
2642 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
2643 if (len == 0)
2644 break;
2645 if ((value & 0xff) != 0) {
2646 err = USBD_IOERROR;
2647 goto ret;
2648 }
2649 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
2650 hubd = ohci_hubd;
2651 hubd.bNbrPorts = sc->sc_noport;
2652 USETW(hubd.wHubCharacteristics,
2653 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH :
2654 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL)
2655 /* XXX overcurrent */
2656 );
2657 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v);
2658 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B);
2659 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8)
2660 hubd.DeviceRemovable[i++] = (u_int8_t)v;
2661 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i;
2662 l = min(len, hubd.bDescLength);
2663 totlen = l;
2664 memcpy(buf, &hubd, l);
2665 break;
2666 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
2667 if (len != 4) {
2668 err = USBD_IOERROR;
2669 goto ret;
2670 }
2671 memset(buf, 0, len); /* ? XXX */
2672 totlen = len;
2673 break;
2674 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
2675 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n",
2676 index));
2677 if (index < 1 || index > sc->sc_noport) {
2678 err = USBD_IOERROR;
2679 goto ret;
2680 }
2681 if (len != 4) {
2682 err = USBD_IOERROR;
2683 goto ret;
2684 }
2685 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index));
2686 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n",
2687 v));
2688 USETW(ps.wPortStatus, v);
2689 USETW(ps.wPortChange, v >> 16);
2690 l = min(len, sizeof ps);
2691 memcpy(buf, &ps, l);
2692 totlen = l;
2693 break;
2694 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
2695 err = USBD_IOERROR;
2696 goto ret;
2697 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
2698 break;
2699 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
2700 if (index < 1 || index > sc->sc_noport) {
2701 err = USBD_IOERROR;
2702 goto ret;
2703 }
2704 port = OHCI_RH_PORT_STATUS(index);
2705 switch(value) {
2706 case UHF_PORT_ENABLE:
2707 OWRITE4(sc, port, UPS_PORT_ENABLED);
2708 break;
2709 case UHF_PORT_SUSPEND:
2710 OWRITE4(sc, port, UPS_SUSPEND);
2711 break;
2712 case UHF_PORT_RESET:
2713 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n",
2714 index));
2715 OWRITE4(sc, port, UPS_RESET);
2716 for (i = 0; i < 5; i++) {
2717 usb_delay_ms(&sc->sc_bus,
2718 USB_PORT_ROOT_RESET_DELAY);
2719 if (sc->sc_dying) {
2720 err = USBD_IOERROR;
2721 goto ret;
2722 }
2723 if ((OREAD4(sc, port) & UPS_RESET) == 0)
2724 break;
2725 }
2726 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n",
2727 index, OREAD4(sc, port)));
2728 break;
2729 case UHF_PORT_POWER:
2730 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power "
2731 "%d\n", index));
2732 OWRITE4(sc, port, UPS_PORT_POWER);
2733 break;
2734 default:
2735 err = USBD_IOERROR;
2736 goto ret;
2737 }
2738 break;
2739 default:
2740 err = USBD_IOERROR;
2741 goto ret;
2742 }
2743 xfer->actlen = totlen;
2744 err = USBD_NORMAL_COMPLETION;
2745 ret:
2746 xfer->status = err;
2747 s = splusb();
2748 usb_transfer_complete(xfer);
2749 splx(s);
2750 return (USBD_IN_PROGRESS);
2751 }
2752
2753 /* Abort a root control request. */
2754 Static void
2755 ohci_root_ctrl_abort(usbd_xfer_handle xfer)
2756 {
2757 /* Nothing to do, all transfers are synchronous. */
2758 }
2759
2760 /* Close the root pipe. */
2761 Static void
2762 ohci_root_ctrl_close(usbd_pipe_handle pipe)
2763 {
2764 DPRINTF(("ohci_root_ctrl_close\n"));
2765 /* Nothing to do. */
2766 }
2767
2768 Static usbd_status
2769 ohci_root_intr_transfer(usbd_xfer_handle xfer)
2770 {
2771 usbd_status err;
2772
2773 /* Insert last in queue. */
2774 err = usb_insert_transfer(xfer);
2775 if (err)
2776 return (err);
2777
2778 /* Pipe isn't running, start first */
2779 return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2780 }
2781
2782 Static usbd_status
2783 ohci_root_intr_start(usbd_xfer_handle xfer)
2784 {
2785 usbd_pipe_handle pipe = xfer->pipe;
2786 ohci_softc_t *sc = pipe->device->bus->hci_private;
2787
2788 if (sc->sc_dying)
2789 return (USBD_IOERROR);
2790
2791 sc->sc_intrxfer = xfer;
2792
2793 return (USBD_IN_PROGRESS);
2794 }
2795
2796 /* Abort a root interrupt request. */
2797 Static void
2798 ohci_root_intr_abort(usbd_xfer_handle xfer)
2799 {
2800 int s;
2801
2802 if (xfer->pipe->intrxfer == xfer) {
2803 DPRINTF(("ohci_root_intr_abort: remove\n"));
2804 xfer->pipe->intrxfer = NULL;
2805 }
2806 xfer->status = USBD_CANCELLED;
2807 s = splusb();
2808 usb_transfer_complete(xfer);
2809 splx(s);
2810 }
2811
2812 /* Close the root pipe. */
2813 Static void
2814 ohci_root_intr_close(usbd_pipe_handle pipe)
2815 {
2816 ohci_softc_t *sc = pipe->device->bus->hci_private;
2817
2818 DPRINTF(("ohci_root_intr_close\n"));
2819
2820 sc->sc_intrxfer = NULL;
2821 }
2822
2823 /************************/
2824
2825 Static usbd_status
2826 ohci_device_ctrl_transfer(usbd_xfer_handle xfer)
2827 {
2828 usbd_status err;
2829
2830 /* Insert last in queue. */
2831 err = usb_insert_transfer(xfer);
2832 if (err)
2833 return (err);
2834
2835 /* Pipe isn't running, start first */
2836 return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2837 }
2838
2839 Static usbd_status
2840 ohci_device_ctrl_start(usbd_xfer_handle xfer)
2841 {
2842 ohci_softc_t *sc = xfer->pipe->device->bus->hci_private;
2843 usbd_status err;
2844
2845 if (sc->sc_dying)
2846 return (USBD_IOERROR);
2847
2848 #ifdef DIAGNOSTIC
2849 if (!(xfer->rqflags & URQ_REQUEST)) {
2850 /* XXX panic */
2851 printf("ohci_device_ctrl_transfer: not a request\n");
2852 return (USBD_INVAL);
2853 }
2854 #endif
2855
2856 err = ohci_device_request(xfer);
2857 if (err)
2858 return (err);
2859
2860 if (sc->sc_bus.use_polling)
2861 ohci_waitintr(sc, xfer);
2862 return (USBD_IN_PROGRESS);
2863 }
2864
2865 /* Abort a device control request. */
2866 Static void
2867 ohci_device_ctrl_abort(usbd_xfer_handle xfer)
2868 {
2869 DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer));
2870 ohci_abort_xfer(xfer, USBD_CANCELLED);
2871 }
2872
2873 /* Close a device control pipe. */
2874 Static void
2875 ohci_device_ctrl_close(usbd_pipe_handle pipe)
2876 {
2877 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2878 ohci_softc_t *sc = pipe->device->bus->hci_private;
2879
2880 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe));
2881 ohci_close_pipe(pipe, sc->sc_ctrl_head);
2882 ohci_free_std(sc, opipe->tail.td);
2883 }
2884
2885 /************************/
2886
2887 Static void
2888 ohci_device_clear_toggle(usbd_pipe_handle pipe)
2889 {
2890 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2891 ohci_softc_t *sc = pipe->device->bus->hci_private;
2892
2893 opipe->sed->ed.ed_headp &= HTOO32(~OHCI_TOGGLECARRY);
2894 }
2895
2896 Static void
2897 ohci_noop(usbd_pipe_handle pipe)
2898 {
2899 }
2900
2901 Static usbd_status
2902 ohci_device_bulk_transfer(usbd_xfer_handle xfer)
2903 {
2904 usbd_status err;
2905
2906 /* Insert last in queue. */
2907 err = usb_insert_transfer(xfer);
2908 if (err)
2909 return (err);
2910
2911 /* Pipe isn't running, start first */
2912 return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2913 }
2914
2915 Static usbd_status
2916 ohci_device_bulk_start(usbd_xfer_handle xfer)
2917 {
2918 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
2919 usbd_device_handle dev = opipe->pipe.device;
2920 ohci_softc_t *sc = dev->bus->hci_private;
2921 int addr = dev->address;
2922 ohci_soft_td_t *data, *tail, *tdp;
2923 ohci_soft_ed_t *sed;
2924 int s, len, isread, endpt;
2925 usbd_status err;
2926
2927 if (sc->sc_dying)
2928 return (USBD_IOERROR);
2929
2930 #ifdef DIAGNOSTIC
2931 if (xfer->rqflags & URQ_REQUEST) {
2932 /* XXX panic */
2933 printf("ohci_device_bulk_start: a request\n");
2934 return (USBD_INVAL);
2935 }
2936 #endif
2937
2938 len = xfer->length;
2939 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress;
2940 isread = UE_GET_DIR(endpt) == UE_DIR_IN;
2941 sed = opipe->sed;
2942
2943 DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d "
2944 "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags,
2945 endpt));
2946
2947 opipe->u.bulk.isread = isread;
2948 opipe->u.bulk.length = len;
2949
2950 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
2951 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
2952 /* Update device address */
2953 sed->ed.ed_flags = HTOO32(
2954 (O32TOH(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) |
2955 OHCI_ED_SET_FA(addr));
2956
2957 /* Allocate a chain of new TDs (including a new tail). */
2958 data = opipe->tail.td;
2959 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer,
2960 data, &tail);
2961 /* We want interrupt at the end of the transfer. */
2962 tail->td.td_flags &= HTOO32(~OHCI_TD_INTR_MASK);
2963 tail->td.td_flags |= HTOO32(OHCI_TD_SET_DI(1));
2964 tail->flags |= OHCI_CALL_DONE;
2965 tail = tail->nexttd; /* point at sentinel */
2966 usb_syncmem(&tail->dma, tail->offs + offsetof(ohci_td_t, td_flags),
2967 sizeof(tail->td.td_flags),
2968 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
2969 if (err)
2970 return (err);
2971
2972 tail->xfer = NULL;
2973 xfer->hcpriv = data;
2974
2975 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x "
2976 "td_cbp=0x%08x td_be=0x%08x\n",
2977 (int)O32TOH(sed->ed.ed_flags),
2978 (int)O32TOH(data->td.td_flags),
2979 (int)O32TOH(data->td.td_cbp),
2980 (int)O32TOH(data->td.td_be)));
2981
2982 #ifdef OHCI_DEBUG
2983 if (ohcidebug > 5) {
2984 ohci_dump_ed(sc, sed);
2985 ohci_dump_tds(sc, data);
2986 }
2987 #endif
2988
2989 /* Insert ED in schedule */
2990 s = splusb();
2991 for (tdp = data; tdp != tail; tdp = tdp->nexttd) {
2992 tdp->xfer = xfer;
2993 }
2994 sed->ed.ed_tailp = HTOO32(tail->physaddr);
2995 opipe->tail.td = tail;
2996 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP);
2997 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
2998 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
2999 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
3000 if (xfer->timeout && !sc->sc_bus.use_polling) {
3001 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout),
3002 ohci_timeout, xfer);
3003 }
3004
3005 #if 0
3006 /* This goes wrong if we are too slow. */
3007 if (ohcidebug > 10) {
3008 delay(10000);
3009 DPRINTF(("ohci_device_intr_transfer: status=%x\n",
3010 OREAD4(sc, OHCI_COMMAND_STATUS)));
3011 ohci_dump_ed(sc, sed);
3012 ohci_dump_tds(sc, data);
3013 }
3014 #endif
3015
3016 splx(s);
3017
3018 return (USBD_IN_PROGRESS);
3019 }
3020
3021 Static void
3022 ohci_device_bulk_abort(usbd_xfer_handle xfer)
3023 {
3024 DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer));
3025 ohci_abort_xfer(xfer, USBD_CANCELLED);
3026 }
3027
3028 /*
3029 * Close a device bulk pipe.
3030 */
3031 Static void
3032 ohci_device_bulk_close(usbd_pipe_handle pipe)
3033 {
3034 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3035 ohci_softc_t *sc = pipe->device->bus->hci_private;
3036
3037 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe));
3038 ohci_close_pipe(pipe, sc->sc_bulk_head);
3039 ohci_free_std(sc, opipe->tail.td);
3040 }
3041
3042 /************************/
3043
3044 Static usbd_status
3045 ohci_device_intr_transfer(usbd_xfer_handle xfer)
3046 {
3047 usbd_status err;
3048
3049 /* Insert last in queue. */
3050 err = usb_insert_transfer(xfer);
3051 if (err)
3052 return (err);
3053
3054 /* Pipe isn't running, start first */
3055 return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
3056 }
3057
3058 Static usbd_status
3059 ohci_device_intr_start(usbd_xfer_handle xfer)
3060 {
3061 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3062 usbd_device_handle dev = opipe->pipe.device;
3063 ohci_softc_t *sc = dev->bus->hci_private;
3064 ohci_soft_ed_t *sed = opipe->sed;
3065 ohci_soft_td_t *data, *tail;
3066 int s, len, isread, endpt;
3067
3068 if (sc->sc_dying)
3069 return (USBD_IOERROR);
3070
3071 DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d "
3072 "flags=%d priv=%p\n",
3073 xfer, xfer->length, xfer->flags, xfer->priv));
3074
3075 #ifdef DIAGNOSTIC
3076 if (xfer->rqflags & URQ_REQUEST)
3077 panic("ohci_device_intr_transfer: a request");
3078 #endif
3079
3080 len = xfer->length;
3081 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress;
3082 isread = UE_GET_DIR(endpt) == UE_DIR_IN;
3083
3084 data = opipe->tail.td;
3085 tail = ohci_alloc_std(sc);
3086 if (tail == NULL)
3087 return (USBD_NOMEM);
3088 tail->xfer = NULL;
3089
3090 data->td.td_flags = HTOO32(
3091 isread ? OHCI_TD_IN : OHCI_TD_OUT |
3092 OHCI_TD_NOCC |
3093 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
3094 if (xfer->flags & USBD_SHORT_XFER_OK)
3095 data->td.td_flags |= HTOO32(OHCI_TD_R);
3096 data->td.td_cbp = HTOO32(DMAADDR(&xfer->dmabuf, 0));
3097 data->nexttd = tail;
3098 data->td.td_nexttd = HTOO32(tail->physaddr);
3099 data->td.td_be = HTOO32(O32TOH(data->td.td_cbp) + len - 1);
3100 data->len = len;
3101 data->xfer = xfer;
3102 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN;
3103 usb_syncmem(&data->dma, data->offs, sizeof(data->td),
3104 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3105 xfer->hcpriv = data;
3106
3107 #ifdef OHCI_DEBUG
3108 if (ohcidebug > 5) {
3109 DPRINTF(("ohci_device_intr_transfer:\n"));
3110 ohci_dump_ed(sc, sed);
3111 ohci_dump_tds(sc, data);
3112 }
3113 #endif
3114
3115 /* Insert ED in schedule */
3116 s = splusb();
3117 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
3118 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
3119 sed->ed.ed_tailp = HTOO32(tail->physaddr);
3120 opipe->tail.td = tail;
3121 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP);
3122 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
3123 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3124
3125 #if 0
3126 /*
3127 * This goes horribly wrong, printing thousands of descriptors,
3128 * because false references are followed due to the fact that the
3129 * TD is gone.
3130 */
3131 if (ohcidebug > 5) {
3132 usb_delay_ms(&sc->sc_bus, 5);
3133 DPRINTF(("ohci_device_intr_transfer: status=%x\n",
3134 OREAD4(sc, OHCI_COMMAND_STATUS)));
3135 ohci_dump_ed(sc, sed);
3136 ohci_dump_tds(sc, data);
3137 }
3138 #endif
3139 splx(s);
3140
3141 return (USBD_IN_PROGRESS);
3142 }
3143
3144 /* Abort a device control request. */
3145 Static void
3146 ohci_device_intr_abort(usbd_xfer_handle xfer)
3147 {
3148 if (xfer->pipe->intrxfer == xfer) {
3149 DPRINTF(("ohci_device_intr_abort: remove\n"));
3150 xfer->pipe->intrxfer = NULL;
3151 }
3152 ohci_abort_xfer(xfer, USBD_CANCELLED);
3153 }
3154
3155 /* Close a device interrupt pipe. */
3156 Static void
3157 ohci_device_intr_close(usbd_pipe_handle pipe)
3158 {
3159 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3160 ohci_softc_t *sc = pipe->device->bus->hci_private;
3161 int nslots = opipe->u.intr.nslots;
3162 int pos = opipe->u.intr.pos;
3163 int j;
3164 ohci_soft_ed_t *p, *sed = opipe->sed;
3165 int s;
3166
3167 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n",
3168 pipe, nslots, pos));
3169 s = splusb();
3170 usb_syncmem(&sed->dma, sed->offs,
3171 sizeof(sed->ed), BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
3172 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
3173 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
3174 sizeof(sed->ed.ed_flags),
3175 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3176 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
3177 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK))
3178 usb_delay_ms(&sc->sc_bus, 2);
3179
3180 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next)
3181 continue;
3182 #ifdef DIAGNOSTIC
3183 if (p == NULL)
3184 panic("ohci_device_intr_close: ED not found");
3185 #endif
3186 p->next = sed->next;
3187 p->ed.ed_nexted = sed->ed.ed_nexted;
3188 usb_syncmem(&p->dma, p->offs + offsetof(ohci_ed_t, ed_nexted),
3189 sizeof(p->ed.ed_nexted),
3190 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3191 splx(s);
3192
3193 for (j = 0; j < nslots; j++)
3194 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS];
3195
3196 ohci_free_std(sc, opipe->tail.td);
3197 ohci_free_sed(sc, opipe->sed);
3198 }
3199
3200 Static usbd_status
3201 ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival)
3202 {
3203 int i, j, s, best;
3204 u_int npoll, slow, shigh, nslots;
3205 u_int bestbw, bw;
3206 ohci_soft_ed_t *hsed, *sed = opipe->sed;
3207
3208 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe));
3209 if (ival == 0) {
3210 printf("ohci_setintr: 0 interval\n");
3211 return (USBD_INVAL);
3212 }
3213
3214 npoll = OHCI_NO_INTRS;
3215 while (npoll > ival)
3216 npoll /= 2;
3217 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll));
3218
3219 /*
3220 * We now know which level in the tree the ED must go into.
3221 * Figure out which slot has most bandwidth left over.
3222 * Slots to examine:
3223 * npoll
3224 * 1 0
3225 * 2 1 2
3226 * 4 3 4 5 6
3227 * 8 7 8 9 10 11 12 13 14
3228 * N (N-1) .. (N-1+N-1)
3229 */
3230 slow = npoll-1;
3231 shigh = slow + npoll;
3232 nslots = OHCI_NO_INTRS / npoll;
3233 for (best = i = slow, bestbw = ~0; i < shigh; i++) {
3234 bw = 0;
3235 for (j = 0; j < nslots; j++)
3236 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS];
3237 if (bw < bestbw) {
3238 best = i;
3239 bestbw = bw;
3240 }
3241 }
3242 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n",
3243 best, slow, shigh, bestbw));
3244
3245 s = splusb();
3246 hsed = sc->sc_eds[best];
3247 sed->next = hsed->next;
3248 usb_syncmem(&hsed->dma, hsed->offs + offsetof(ohci_ed_t, ed_flags),
3249 sizeof(hsed->ed.ed_flags),
3250 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
3251 sed->ed.ed_nexted = hsed->ed.ed_nexted;
3252 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
3253 sizeof(sed->ed.ed_flags),
3254 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3255 hsed->next = sed;
3256 hsed->ed.ed_nexted = HTOO32(sed->physaddr);
3257 usb_syncmem(&hsed->dma, hsed->offs + offsetof(ohci_ed_t, ed_flags),
3258 sizeof(hsed->ed.ed_flags),
3259 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3260 splx(s);
3261
3262 for (j = 0; j < nslots; j++)
3263 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS];
3264 opipe->u.intr.nslots = nslots;
3265 opipe->u.intr.pos = best;
3266
3267 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe));
3268 return (USBD_NORMAL_COMPLETION);
3269 }
3270
3271 /***********************/
3272
3273 usbd_status
3274 ohci_device_isoc_transfer(usbd_xfer_handle xfer)
3275 {
3276 usbd_status err;
3277
3278 DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer));
3279
3280 /* Put it on our queue, */
3281 err = usb_insert_transfer(xfer);
3282
3283 /* bail out on error, */
3284 if (err && err != USBD_IN_PROGRESS)
3285 return (err);
3286
3287 /* XXX should check inuse here */
3288
3289 /* insert into schedule, */
3290 ohci_device_isoc_enter(xfer);
3291
3292 /* and start if the pipe wasn't running */
3293 if (!err)
3294 ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue));
3295
3296 return (err);
3297 }
3298
3299 void
3300 ohci_device_isoc_enter(usbd_xfer_handle xfer)
3301 {
3302 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3303 usbd_device_handle dev = opipe->pipe.device;
3304 ohci_softc_t *sc = dev->bus->hci_private;
3305 ohci_soft_ed_t *sed = opipe->sed;
3306 struct iso *iso = &opipe->u.iso;
3307 ohci_soft_itd_t *sitd, *nsitd;
3308 ohci_physaddr_t buf, offs, noffs, bp0;
3309 int i, ncur, nframes;
3310 int s;
3311
3312 DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p "
3313 "nframes=%d\n",
3314 iso->inuse, iso->next, xfer, xfer->nframes));
3315
3316 if (sc->sc_dying)
3317 return;
3318
3319 if (iso->next == -1) {
3320 /* Not in use yet, schedule it a few frames ahead. */
3321 iso->next = O32TOH(sc->sc_hcca->hcca_frame_number) + 5;
3322 DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n",
3323 iso->next));
3324 }
3325
3326 sitd = opipe->tail.itd;
3327 buf = DMAADDR(&xfer->dmabuf, 0);
3328 bp0 = OHCI_PAGE(buf);
3329 offs = OHCI_PAGE_OFFSET(buf);
3330 nframes = xfer->nframes;
3331 xfer->hcpriv = sitd;
3332 for (i = ncur = 0; i < nframes; i++, ncur++) {
3333 noffs = offs + xfer->frlengths[i];
3334 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */
3335 OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */
3336
3337 /* Allocate next ITD */
3338 nsitd = ohci_alloc_sitd(sc);
3339 if (nsitd == NULL) {
3340 /* XXX what now? */
3341 printf("%s: isoc TD alloc failed\n",
3342 device_xname(sc->sc_dev));
3343 return;
3344 }
3345
3346 /* Fill current ITD */
3347 sitd->itd.itd_flags = HTOO32(
3348 OHCI_ITD_NOCC |
3349 OHCI_ITD_SET_SF(iso->next) |
3350 OHCI_ITD_SET_DI(6) | /* delay intr a little */
3351 OHCI_ITD_SET_FC(ncur));
3352 sitd->itd.itd_bp0 = HTOO32(bp0);
3353 sitd->nextitd = nsitd;
3354 sitd->itd.itd_nextitd = HTOO32(nsitd->physaddr);
3355 sitd->itd.itd_be = HTOO32(bp0 + offs - 1);
3356 sitd->xfer = xfer;
3357 sitd->flags = 0;
3358 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd),
3359 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3360
3361 sitd = nsitd;
3362 iso->next = iso->next + ncur;
3363 bp0 = OHCI_PAGE(buf + offs);
3364 ncur = 0;
3365 }
3366 sitd->itd.itd_offset[ncur] = HTOO16(OHCI_ITD_MK_OFFS(offs));
3367 offs = noffs;
3368 }
3369 nsitd = ohci_alloc_sitd(sc);
3370 if (nsitd == NULL) {
3371 /* XXX what now? */
3372 printf("%s: isoc TD alloc failed\n",
3373 device_xname(sc->sc_dev));
3374 return;
3375 }
3376 /* Fixup last used ITD */
3377 sitd->itd.itd_flags = HTOO32(
3378 OHCI_ITD_NOCC |
3379 OHCI_ITD_SET_SF(iso->next) |
3380 OHCI_ITD_SET_DI(0) |
3381 OHCI_ITD_SET_FC(ncur));
3382 sitd->itd.itd_bp0 = HTOO32(bp0);
3383 sitd->nextitd = nsitd;
3384 sitd->itd.itd_nextitd = HTOO32(nsitd->physaddr);
3385 sitd->itd.itd_be = HTOO32(bp0 + offs - 1);
3386 sitd->xfer = xfer;
3387 sitd->flags = OHCI_CALL_DONE;
3388 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd),
3389 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3390
3391 iso->next = iso->next + ncur;
3392 iso->inuse += nframes;
3393
3394 xfer->actlen = offs; /* XXX pretend we did it all */
3395
3396 xfer->status = USBD_IN_PROGRESS;
3397
3398 #ifdef OHCI_DEBUG
3399 if (ohcidebug > 5) {
3400 DPRINTF(("ohci_device_isoc_enter: frame=%d\n",
3401 O32TOH(sc->sc_hcca->hcca_frame_number)));
3402 ohci_dump_itds(sc, xfer->hcpriv);
3403 ohci_dump_ed(sc, sed);
3404 }
3405 #endif
3406
3407 s = splusb();
3408 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
3409 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
3410 sed->ed.ed_tailp = HTOO32(nsitd->physaddr);
3411 opipe->tail.itd = nsitd;
3412 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP);
3413 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
3414 sizeof(sed->ed.ed_flags),
3415 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3416 splx(s);
3417
3418 #ifdef OHCI_DEBUG
3419 if (ohcidebug > 5) {
3420 delay(150000);
3421 DPRINTF(("ohci_device_isoc_enter: after frame=%d\n",
3422 O32TOH(sc->sc_hcca->hcca_frame_number)));
3423 ohci_dump_itds(sc, xfer->hcpriv);
3424 ohci_dump_ed(sc, sed);
3425 }
3426 #endif
3427 }
3428
3429 usbd_status
3430 ohci_device_isoc_start(usbd_xfer_handle xfer)
3431 {
3432 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3433 ohci_softc_t *sc = opipe->pipe.device->bus->hci_private;
3434
3435 DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer));
3436
3437 if (sc->sc_dying)
3438 return (USBD_IOERROR);
3439
3440 #ifdef DIAGNOSTIC
3441 if (xfer->status != USBD_IN_PROGRESS)
3442 printf("ohci_device_isoc_start: not in progress %p\n", xfer);
3443 #endif
3444
3445 /* XXX anything to do? */
3446
3447 return (USBD_IN_PROGRESS);
3448 }
3449
3450 void
3451 ohci_device_isoc_abort(usbd_xfer_handle xfer)
3452 {
3453 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3454 ohci_softc_t *sc = opipe->pipe.device->bus->hci_private;
3455 ohci_soft_ed_t *sed;
3456 ohci_soft_itd_t *sitd;
3457 int s;
3458
3459 s = splusb();
3460
3461 DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p\n", xfer));
3462
3463 /* Transfer is already done. */
3464 if (xfer->status != USBD_NOT_STARTED &&
3465 xfer->status != USBD_IN_PROGRESS) {
3466 splx(s);
3467 printf("ohci_device_isoc_abort: early return\n");
3468 return;
3469 }
3470
3471 /* Give xfer the requested abort code. */
3472 xfer->status = USBD_CANCELLED;
3473
3474 sed = opipe->sed;
3475 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
3476 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
3477 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */
3478 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
3479 sizeof(sed->ed.ed_flags),
3480 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3481
3482 sitd = xfer->hcpriv;
3483 #ifdef DIAGNOSTIC
3484 if (sitd == NULL) {
3485 splx(s);
3486 printf("ohci_device_isoc_abort: hcpriv==0\n");
3487 return;
3488 }
3489 #endif
3490 for (; sitd->xfer == xfer; sitd = sitd->nextitd) {
3491 #ifdef DIAGNOSTIC
3492 DPRINTFN(1,("abort sets done sitd=%p\n", sitd));
3493 sitd->isdone = 1;
3494 #endif
3495 }
3496
3497 splx(s);
3498
3499 usb_delay_ms(&sc->sc_bus, OHCI_ITD_NOFFSET);
3500
3501 s = splusb();
3502
3503 /* Run callback. */
3504 usb_transfer_complete(xfer);
3505
3506 sed->ed.ed_headp = HTOO32(sitd->physaddr); /* unlink TDs */
3507 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */
3508 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
3509 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3510
3511 splx(s);
3512 }
3513
3514 void
3515 ohci_device_isoc_done(usbd_xfer_handle xfer)
3516 {
3517 DPRINTFN(1,("ohci_device_isoc_done: xfer=%p\n", xfer));
3518 }
3519
3520 usbd_status
3521 ohci_setup_isoc(usbd_pipe_handle pipe)
3522 {
3523 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3524 ohci_softc_t *sc = pipe->device->bus->hci_private;
3525 struct iso *iso = &opipe->u.iso;
3526 int s;
3527
3528 iso->next = -1;
3529 iso->inuse = 0;
3530
3531 s = splusb();
3532 ohci_add_ed(sc, opipe->sed, sc->sc_isoc_head);
3533 splx(s);
3534
3535 return (USBD_NORMAL_COMPLETION);
3536 }
3537
3538 void
3539 ohci_device_isoc_close(usbd_pipe_handle pipe)
3540 {
3541 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3542 ohci_softc_t *sc = pipe->device->bus->hci_private;
3543
3544 DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe));
3545 ohci_close_pipe(pipe, sc->sc_isoc_head);
3546 #ifdef DIAGNOSTIC
3547 opipe->tail.itd->isdone = 1;
3548 #endif
3549 ohci_free_sitd(sc, opipe->tail.itd);
3550 }
NetBSD on the FriendlyARM MINI2440