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[netbsd-mini2440.git] / sys / external / intel-public / acpica / dist / common / dmtbinfo.c
bloba1146895a04a93a8df1414e62b232617b6d71aa4
1 /******************************************************************************
2 *
3 * Module Name: dmtbinfo - Table info for non-AML tables
4 *
5 *****************************************************************************/
6
7 /******************************************************************************
8 *
9 * 1. Copyright Notice
10 *
11 * Some or all of this work - Copyright (c) 1999 - 2009, Intel Corp.
12 * All rights reserved.
13 *
14 * 2. License
15 *
16 * 2.1. This is your license from Intel Corp. under its intellectual property
17 * rights. You may have additional license terms from the party that provided
18 * you this software, covering your right to use that party's intellectual
19 * property rights.
20 *
21 * 2.2. Intel grants, free of charge, to any person ("Licensee") obtaining a
22 * copy of the source code appearing in this file ("Covered Code") an
23 * irrevocable, perpetual, worldwide license under Intel's copyrights in the
24 * base code distributed originally by Intel ("Original Intel Code") to copy,
25 * make derivatives, distribute, use and display any portion of the Covered
26 * Code in any form, with the right to sublicense such rights; and
27 *
28 * 2.3. Intel grants Licensee a non-exclusive and non-transferable patent
29 * license (with the right to sublicense), under only those claims of Intel
30 * patents that are infringed by the Original Intel Code, to make, use, sell,
31 * offer to sell, and import the Covered Code and derivative works thereof
32 * solely to the minimum extent necessary to exercise the above copyright
33 * license, and in no event shall the patent license extend to any additions
34 * to or modifications of the Original Intel Code. No other license or right
35 * is granted directly or by implication, estoppel or otherwise;
36 *
37 * The above copyright and patent license is granted only if the following
38 * conditions are met:
39 *
40 * 3. Conditions
41 *
42 * 3.1. Redistribution of Source with Rights to Further Distribute Source.
43 * Redistribution of source code of any substantial portion of the Covered
44 * Code or modification with rights to further distribute source must include
45 * the above Copyright Notice, the above License, this list of Conditions,
46 * and the following Disclaimer and Export Compliance provision. In addition,
47 * Licensee must cause all Covered Code to which Licensee contributes to
48 * contain a file documenting the changes Licensee made to create that Covered
49 * Code and the date of any change. Licensee must include in that file the
50 * documentation of any changes made by any predecessor Licensee. Licensee
51 * must include a prominent statement that the modification is derived,
52 * directly or indirectly, from Original Intel Code.
53 *
54 * 3.2. Redistribution of Source with no Rights to Further Distribute Source.
55 * Redistribution of source code of any substantial portion of the Covered
56 * Code or modification without rights to further distribute source must
57 * include the following Disclaimer and Export Compliance provision in the
58 * documentation and/or other materials provided with distribution. In
59 * addition, Licensee may not authorize further sublicense of source of any
60 * portion of the Covered Code, and must include terms to the effect that the
61 * license from Licensee to its licensee is limited to the intellectual
62 * property embodied in the software Licensee provides to its licensee, and
63 * not to intellectual property embodied in modifications its licensee may
64 * make.
65 *
66 * 3.3. Redistribution of Executable. Redistribution in executable form of any
67 * substantial portion of the Covered Code or modification must reproduce the
68 * above Copyright Notice, and the following Disclaimer and Export Compliance
69 * provision in the documentation and/or other materials provided with the
70 * distribution.
71 *
72 * 3.4. Intel retains all right, title, and interest in and to the Original
73 * Intel Code.
74 *
75 * 3.5. Neither the name Intel nor any other trademark owned or controlled by
76 * Intel shall be used in advertising or otherwise to promote the sale, use or
77 * other dealings in products derived from or relating to the Covered Code
78 * without prior written authorization from Intel.
79 *
80 * 4. Disclaimer and Export Compliance
81 *
82 * 4.1. INTEL MAKES NO WARRANTY OF ANY KIND REGARDING ANY SOFTWARE PROVIDED
83 * HERE. ANY SOFTWARE ORIGINATING FROM INTEL OR DERIVED FROM INTEL SOFTWARE
84 * IS PROVIDED "AS IS," AND INTEL WILL NOT PROVIDE ANY SUPPORT, ASSISTANCE,
85 * INSTALLATION, TRAINING OR OTHER SERVICES. INTEL WILL NOT PROVIDE ANY
86 * UPDATES, ENHANCEMENTS OR EXTENSIONS. INTEL SPECIFICALLY DISCLAIMS ANY
87 * IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGEMENT AND FITNESS FOR A
88 * PARTICULAR PURPOSE.
89 *
90 * 4.2. IN NO EVENT SHALL INTEL HAVE ANY LIABILITY TO LICENSEE, ITS LICENSEES
91 * OR ANY OTHER THIRD PARTY, FOR ANY LOST PROFITS, LOST DATA, LOSS OF USE OR
92 * COSTS OF PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES, OR FOR ANY INDIRECT,
93 * SPECIAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THIS AGREEMENT, UNDER ANY
94 * CAUSE OF ACTION OR THEORY OF LIABILITY, AND IRRESPECTIVE OF WHETHER INTEL
95 * HAS ADVANCE NOTICE OF THE POSSIBILITY OF SUCH DAMAGES. THESE LIMITATIONS
96 * SHALL APPLY NOTWITHSTANDING THE FAILURE OF THE ESSENTIAL PURPOSE OF ANY
97 * LIMITED REMEDY.
98 *
99 * 4.3. Licensee shall not export, either directly or indirectly, any of this
100 * software or system incorporating such software without first obtaining any
101 * required license or other approval from the U. S. Department of Commerce or
102 * any other agency or department of the United States Government. In the
103 * event Licensee exports any such software from the United States or
104 * re-exports any such software from a foreign destination, Licensee shall
105 * ensure that the distribution and export/re-export of the software is in
106 * compliance with all laws, regulations, orders, or other restrictions of the
107 * U.S. Export Administration Regulations. Licensee agrees that neither it nor
108 * any of its subsidiaries will export/re-export any technical data, process,
109 * software, or service, directly or indirectly, to any country for which the
110 * United States government or any agency thereof requires an export license,
111 * other governmental approval, or letter of assurance, without first obtaining
112 * such license, approval or letter.
113 *
114 *****************************************************************************/
115
116 #include "acpi.h"
117 #include "accommon.h"
118 #include "acdisasm.h"
119
120 /* This module used for application-level code only */
121
122 #define _COMPONENT ACPI_CA_DISASSEMBLER
123 ACPI_MODULE_NAME ("dmtbinfo")
124
125 /*
126 * Macros used to generate offsets to specific table fields
127 */
128 #define ACPI_FACS_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_FACS,f)
129 #define ACPI_GAS_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_GENERIC_ADDRESS,f)
130 #define ACPI_HDR_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_HEADER,f)
131 #define ACPI_RSDP_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_RSDP,f)
132 #define ACPI_BOOT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_BOOT,f)
133 #define ACPI_BERT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_BERT,f)
134 #define ACPI_CPEP_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_CPEP,f)
135 #define ACPI_DBGP_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_DBGP,f)
136 #define ACPI_DMAR_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_DMAR,f)
137 #define ACPI_ECDT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_ECDT,f)
138 #define ACPI_EINJ_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_EINJ,f)
139 #define ACPI_ERST_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_ERST,f)
140 #define ACPI_HEST_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_HEST,f)
141 #define ACPI_HPET_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_HPET,f)
142 #define ACPI_IVRS_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_IVRS,f)
143 #define ACPI_MADT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_MADT,f)
144 #define ACPI_MCFG_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_MCFG,f)
145 #define ACPI_MSCT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_MSCT,f)
146 #define ACPI_SBST_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_SBST,f)
147 #define ACPI_SLIT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_SLIT,f)
148 #define ACPI_SPCR_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_SPCR,f)
149 #define ACPI_SPMI_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_SPMI,f)
150 #define ACPI_SRAT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_SRAT,f)
151 #define ACPI_TCPA_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_TCPA,f)
152 #define ACPI_UEFI_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_UEFI,f)
153 #define ACPI_WAET_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_WAET,f)
154 #define ACPI_WDAT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_WDAT,f)
155 #define ACPI_WDRT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_WDRT,f)
156
157 /* Subtables */
158
159 #define ACPI_ASF0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_ASF_INFO,f)
160 #define ACPI_ASF1_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_ASF_ALERT,f)
161 #define ACPI_ASF1a_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_ASF_ALERT_DATA,f)
162 #define ACPI_ASF2_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_ASF_REMOTE,f)
163 #define ACPI_ASF2a_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_ASF_CONTROL_DATA,f)
164 #define ACPI_ASF3_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_ASF_RMCP,f)
165 #define ACPI_ASF4_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_ASF_ADDRESS,f)
166 #define ACPI_CPEP0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_CPEP_POLLING,f)
167 #define ACPI_DMARS_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_DMAR_DEVICE_SCOPE,f)
168 #define ACPI_DMAR0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_DMAR_HARDWARE_UNIT,f)
169 #define ACPI_DMAR1_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_DMAR_RESERVED_MEMORY,f)
170 #define ACPI_DMAR2_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_DMAR_ATSR,f)
171 #define ACPI_DMAR3_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_DMAR_RHSA,f)
172 #define ACPI_EINJ0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_WHEA_HEADER,f)
173 #define ACPI_HEST0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_HEST_IA_MACHINE_CHECK,f)
174 #define ACPI_HEST1_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_HEST_IA_CORRECTED,f)
175 #define ACPI_HEST2_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_HEST_IA_NMI,f)
176 #define ACPI_HEST6_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_HEST_AER_ROOT,f)
177 #define ACPI_HEST7_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_HEST_AER,f)
178 #define ACPI_HEST8_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_HEST_AER_BRIDGE,f)
179 #define ACPI_HEST9_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_HEST_GENERIC,f)
180 #define ACPI_HESTN_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_HEST_NOTIFY,f)
181 #define ACPI_IVRSH_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_IVRS_HEADER,f)
182 #define ACPI_IVRS0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_IVRS_HARDWARE,f)
183 #define ACPI_IVRS1_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_IVRS_MEMORY,f)
184 #define ACPI_IVRSD_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_IVRS_DE_HEADER,f)
185 #define ACPI_IVRS8A_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_IVRS_DEVICE8A,f)
186 #define ACPI_IVRS8B_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_IVRS_DEVICE8B,f)
187 #define ACPI_IVRS8C_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_IVRS_DEVICE8C,f)
188 #define ACPI_MADT0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_LOCAL_APIC,f)
189 #define ACPI_MADT1_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_IO_APIC,f)
190 #define ACPI_MADT2_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_INTERRUPT_OVERRIDE,f)
191 #define ACPI_MADT3_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_NMI_SOURCE,f)
192 #define ACPI_MADT4_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_LOCAL_APIC_NMI,f)
193 #define ACPI_MADT5_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_LOCAL_APIC_OVERRIDE,f)
194 #define ACPI_MADT6_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_IO_SAPIC,f)
195 #define ACPI_MADT7_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_LOCAL_SAPIC,f)
196 #define ACPI_MADT8_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_INTERRUPT_SOURCE,f)
197 #define ACPI_MADT9_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_LOCAL_X2APIC,f)
198 #define ACPI_MADT10_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_LOCAL_X2APIC_NMI,f)
199 #define ACPI_MADTH_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_SUBTABLE_HEADER,f)
200 #define ACPI_MCFG0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MCFG_ALLOCATION,f)
201 #define ACPI_MSCT0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MSCT_PROXIMITY,f)
202 #define ACPI_SRATH_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_SUBTABLE_HEADER,f)
203 #define ACPI_SRAT0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_SRAT_CPU_AFFINITY,f)
204 #define ACPI_SRAT1_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_SRAT_MEM_AFFINITY,f)
205 #define ACPI_SRAT2_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_SRAT_X2APIC_CPU_AFFINITY,f)
206 #define ACPI_WDAT0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_WDAT_ENTRY,f)
207
208 /*
209 * Simplify access to flag fields by breaking them up into bytes
210 */
211 #define ACPI_FLAG_OFFSET(d,f,o) (UINT8) (ACPI_OFFSET (d,f) + o)
212
213 /* Flags */
214
215 #define ACPI_FADT_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_TABLE_FADT,f,o)
216 #define ACPI_FACS_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_TABLE_FACS,f,o)
217 #define ACPI_HPET_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_TABLE_HPET,f,o)
218 #define ACPI_SRAT0_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_SRAT_CPU_AFFINITY,f,o)
219 #define ACPI_SRAT1_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_SRAT_MEM_AFFINITY,f,o)
220 #define ACPI_SRAT2_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_SRAT_X2APIC_CPU_AFFINITY,f,o)
221 #define ACPI_MADT_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_TABLE_MADT,f,o)
222 #define ACPI_MADT0_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_LOCAL_APIC,f,o)
223 #define ACPI_MADT2_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_INTERRUPT_OVERRIDE,f,o)
224 #define ACPI_MADT3_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_NMI_SOURCE,f,o)
225 #define ACPI_MADT4_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_LOCAL_APIC_NMI,f,o)
226 #define ACPI_MADT7_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_LOCAL_SAPIC,f,o)
227 #define ACPI_MADT8_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_INTERRUPT_SOURCE,f,o)
228 #define ACPI_MADT9_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_LOCAL_X2APIC,f,o)
229 #define ACPI_MADT10_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_LOCAL_X2APIC_NMI,f,o)
230
231
232 /*
233 * ACPI Table Information, used to dump formatted ACPI tables
234 *
235 * Each entry is of the form: <Field Type, Field Offset, Field Name>
236 */
237
238 /*******************************************************************************
239 *
240 * Common ACPI table header
241 *
242 ******************************************************************************/
243
244 ACPI_DMTABLE_INFO AcpiDmTableInfoHeader[] =
245 {
246 {ACPI_DMT_SIG, ACPI_HDR_OFFSET (Signature[0]), "Signature"},
247 {ACPI_DMT_UINT32, ACPI_HDR_OFFSET (Length), "Table Length"},
248 {ACPI_DMT_UINT8, ACPI_HDR_OFFSET (Revision), "Revision"},
249 {ACPI_DMT_CHKSUM, ACPI_HDR_OFFSET (Checksum), "Checksum"},
250 {ACPI_DMT_NAME6, ACPI_HDR_OFFSET (OemId[0]), "Oem ID"},
251 {ACPI_DMT_NAME8, ACPI_HDR_OFFSET (OemTableId[0]), "Oem Table ID"},
252 {ACPI_DMT_UINT32, ACPI_HDR_OFFSET (OemRevision), "Oem Revision"},
253 {ACPI_DMT_NAME4, ACPI_HDR_OFFSET (AslCompilerId[0]), "Asl Compiler ID"},
254 {ACPI_DMT_UINT32, ACPI_HDR_OFFSET (AslCompilerRevision), "Asl Compiler Revision"},
255 {ACPI_DMT_EXIT, 0, NULL}
256 };
257
258
259 /*******************************************************************************
260 *
261 * GAS - Generic Address Structure
262 *
263 ******************************************************************************/
264
265 ACPI_DMTABLE_INFO AcpiDmTableInfoGas[] =
266 {
267 {ACPI_DMT_SPACEID, ACPI_GAS_OFFSET (SpaceId), "Space ID"},
268 {ACPI_DMT_UINT8, ACPI_GAS_OFFSET (BitWidth), "Bit Width"},
269 {ACPI_DMT_UINT8, ACPI_GAS_OFFSET (BitOffset), "Bit Offset"},
270 {ACPI_DMT_UINT8, ACPI_GAS_OFFSET (AccessWidth), "Access Width"},
271 {ACPI_DMT_UINT64, ACPI_GAS_OFFSET (Address), "Address"},
272 {ACPI_DMT_EXIT, 0, NULL}
273 };
274
275
276 /*******************************************************************************
277 *
278 * RSDP - Root System Description Pointer (Signature is "RSD PTR ")
279 *
280 ******************************************************************************/
281
282 ACPI_DMTABLE_INFO AcpiDmTableInfoRsdp1[] =
283 {
284 {ACPI_DMT_NAME8, ACPI_RSDP_OFFSET (Signature[0]), "Signature"},
285 {ACPI_DMT_UINT8, ACPI_RSDP_OFFSET (Checksum), "Checksum"},
286 {ACPI_DMT_NAME6, ACPI_RSDP_OFFSET (OemId[0]), "Oem ID"},
287 {ACPI_DMT_UINT8, ACPI_RSDP_OFFSET (Revision), "Revision"},
288 {ACPI_DMT_UINT32, ACPI_RSDP_OFFSET (RsdtPhysicalAddress), "RSDT Address"},
289 {ACPI_DMT_EXIT, 0, NULL}
290 };
291
292 /* ACPI 2.0+ Extensions */
293
294 ACPI_DMTABLE_INFO AcpiDmTableInfoRsdp2[] =
295 {
296 {ACPI_DMT_UINT32, ACPI_RSDP_OFFSET (Length), "Length"},
297 {ACPI_DMT_UINT64, ACPI_RSDP_OFFSET (XsdtPhysicalAddress), "XSDT Address"},
298 {ACPI_DMT_UINT8, ACPI_RSDP_OFFSET (ExtendedChecksum), "Extended Checksum"},
299 {ACPI_DMT_UINT24, ACPI_RSDP_OFFSET (Reserved[0]), "Reserved"},
300 {ACPI_DMT_EXIT, 0, NULL}
301 };
302
303
304 /*******************************************************************************
305 *
306 * FACS - Firmware ACPI Control Structure
307 *
308 ******************************************************************************/
309
310 ACPI_DMTABLE_INFO AcpiDmTableInfoFacs[] =
311 {
312 {ACPI_DMT_NAME4, ACPI_FACS_OFFSET (Signature[0]), "Signature"},
313 {ACPI_DMT_UINT32, ACPI_FACS_OFFSET (Length), "Length"},
314 {ACPI_DMT_UINT32, ACPI_FACS_OFFSET (HardwareSignature), "Hardware Signature"},
315 {ACPI_DMT_UINT32, ACPI_FACS_OFFSET (FirmwareWakingVector), "32 Firmware Waking Vector"},
316 {ACPI_DMT_UINT32, ACPI_FACS_OFFSET (GlobalLock), "Global Lock"},
317 {ACPI_DMT_UINT32, ACPI_FACS_OFFSET (Flags), "Flags (decoded below)"},
318 {ACPI_DMT_FLAG0, ACPI_FACS_FLAG_OFFSET (Flags,0), "S4BIOS Support Present"},
319 {ACPI_DMT_FLAG1, ACPI_FACS_FLAG_OFFSET (Flags,0), "64-bit Wake Supported (V2)"},
320 {ACPI_DMT_UINT64, ACPI_FACS_OFFSET (XFirmwareWakingVector), "64 Firmware Waking Vector"},
321 {ACPI_DMT_UINT8, ACPI_FACS_OFFSET (Version), "Version"},
322 {ACPI_DMT_UINT24, ACPI_FACS_OFFSET (Reserved[0]), "Reserved"},
323 {ACPI_DMT_UINT32, ACPI_FACS_OFFSET (OspmFlags), "OspmFlags (decoded below)"},
324 {ACPI_DMT_FLAG0, ACPI_FACS_FLAG_OFFSET (OspmFlags,0), "64-bit Wake Env Required (V2)"},
325 {ACPI_DMT_EXIT, 0, NULL}
326 };
327
328
329 /*******************************************************************************
330 *
331 * FADT - Fixed ACPI Description Table (Signature is FACP)
332 *
333 ******************************************************************************/
334
335 /* ACPI 1.0 FADT (Version 1) */
336
337 ACPI_DMTABLE_INFO AcpiDmTableInfoFadt1[] =
338 {
339 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Facs), "FACS Address"},
340 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Dsdt), "DSDT Address"},
341 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Model), "Model"},
342 {ACPI_DMT_FADTPM, ACPI_FADT_OFFSET (PreferredProfile), "PM Profile"},
343 {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (SciInterrupt), "SCI Interrupt"},
344 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (SmiCommand), "SMI Command Port"},
345 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (AcpiEnable), "ACPI Enable Value"},
346 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (AcpiDisable), "ACPI Disable Value"},
347 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (S4BiosRequest), "S4BIOS Command"},
348 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (PstateControl), "P-State Control"},
349 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Pm1aEventBlock), "PM1A Event Block Address"},
350 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Pm1bEventBlock), "PM1B Event Block Address"},
351 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Pm1aControlBlock), "PM1A Control Block Address"},
352 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Pm1bControlBlock), "PM1B Control Block Address"},
353 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Pm2ControlBlock), "PM2 Control Block Address"},
354 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (PmTimerBlock), "PM Timer Block Address"},
355 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Gpe0Block), "GPE0 Block Address"},
356 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Gpe1Block), "GPE1 Block Address"},
357 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Pm1EventLength), "PM1 Event Block Length"},
358 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Pm1ControlLength), "PM1 Control Block Length"},
359 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Pm2ControlLength), "PM2 Control Block Length"},
360 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (PmTimerLength), "PM Timer Block Length"},
361 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Gpe0BlockLength), "GPE0 Block Length"},
362 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Gpe1BlockLength), "GPE1 Block Length"},
363 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Gpe1Base), "GPE1 Base Offset"},
364 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (CstControl), "_CST Support"},
365 {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (C2Latency), "C2 Latency"},
366 {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (C3Latency), "C3 Latency"},
367 {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (FlushSize), "CPU Cache Size"},
368 {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (FlushStride), "Cache Flush Stride"},
369 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (DutyOffset), "Duty Cycle Offset"},
370 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (DutyWidth), "Duty Cycle Width"},
371 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (DayAlarm), "RTC Day Alarm Index"},
372 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (MonthAlarm), "RTC Month Alarm Index"},
373 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Century), "RTC Century Index"},
374 {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (BootFlags), "Boot Flags (decoded below)"},
375
376 /* Boot Architecture Flags byte 0 */
377
378 {ACPI_DMT_FLAG0, ACPI_FADT_FLAG_OFFSET (BootFlags,0), "Legacy Devices Supported (V2)"},
379 {ACPI_DMT_FLAG1, ACPI_FADT_FLAG_OFFSET (BootFlags,0), "8042 Present on ports 60/64 (V2)"},
380 {ACPI_DMT_FLAG2, ACPI_FADT_FLAG_OFFSET (BootFlags,0), "VGA Not Present (V4)"},
381 {ACPI_DMT_FLAG3, ACPI_FADT_FLAG_OFFSET (BootFlags,0), "MSI Not Supported (V4)"},
382 {ACPI_DMT_FLAG4, ACPI_FADT_FLAG_OFFSET (BootFlags,0), "PCIe ASPM Not Supported (V4)"},
383
384 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Reserved), "Reserved"},
385 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Flags), "Flags (decoded below)"},
386
387 /* Flags byte 0 */
388
389 {ACPI_DMT_FLAG0, ACPI_FADT_FLAG_OFFSET (Flags,0), "WBINVD instruction is operational (V1)"},
390 {ACPI_DMT_FLAG1, ACPI_FADT_FLAG_OFFSET (Flags,0), "WBINVD flushes all caches (V1)"},
391 {ACPI_DMT_FLAG2, ACPI_FADT_FLAG_OFFSET (Flags,0), "All CPUs support C1 (V1)"},
392 {ACPI_DMT_FLAG3, ACPI_FADT_FLAG_OFFSET (Flags,0), "C2 works on MP system (V1)"},
393 {ACPI_DMT_FLAG4, ACPI_FADT_FLAG_OFFSET (Flags,0), "Control Method Power Button (V1)"},
394 {ACPI_DMT_FLAG5, ACPI_FADT_FLAG_OFFSET (Flags,0), "Control Method Sleep Button (V1)"},
395 {ACPI_DMT_FLAG6, ACPI_FADT_FLAG_OFFSET (Flags,0), "RTC wake not in fixed reg space (V1)"},
396 {ACPI_DMT_FLAG7, ACPI_FADT_FLAG_OFFSET (Flags,0), "RTC can wake system from S4 (V1)"},
397
398 /* Flags byte 1 */
399
400 {ACPI_DMT_FLAG0, ACPI_FADT_FLAG_OFFSET (Flags,1), "32-bit PM Timer (V1)"},
401 {ACPI_DMT_FLAG1, ACPI_FADT_FLAG_OFFSET (Flags,1), "Docking Supported (V1)"},
402 {ACPI_DMT_FLAG2, ACPI_FADT_FLAG_OFFSET (Flags,1), "Reset Register Supported (V2)"},
403 {ACPI_DMT_FLAG3, ACPI_FADT_FLAG_OFFSET (Flags,1), "Sealed Case (V3)"},
404 {ACPI_DMT_FLAG4, ACPI_FADT_FLAG_OFFSET (Flags,1), "Headless - No Video (V3)"},
405 {ACPI_DMT_FLAG5, ACPI_FADT_FLAG_OFFSET (Flags,1), "Use native instr after SLP_TYPx (V3)"},
406 {ACPI_DMT_FLAG6, ACPI_FADT_FLAG_OFFSET (Flags,1), "PCIEXP_WAK Bits Supported (V4)"},
407 {ACPI_DMT_FLAG7, ACPI_FADT_FLAG_OFFSET (Flags,1), "Use Platform Timer (V4)"},
408
409 /* Flags byte 2 */
410
411 {ACPI_DMT_FLAG0, ACPI_FADT_FLAG_OFFSET (Flags,2), "RTC_STS valid on S4 wake (V4)"},
412 {ACPI_DMT_FLAG1, ACPI_FADT_FLAG_OFFSET (Flags,2), "Remote Power-on capable (V4)"},
413 {ACPI_DMT_FLAG2, ACPI_FADT_FLAG_OFFSET (Flags,2), "Use APIC Cluster Model (V4)"},
414 {ACPI_DMT_FLAG3, ACPI_FADT_FLAG_OFFSET (Flags,2), "Use APIC Physical Destination Mode (V4)"},
415 {ACPI_DMT_EXIT, 0, NULL}
416 };
417
418 /* ACPI 1.0 MS Extensions (FADT version 2) */
419
420 ACPI_DMTABLE_INFO AcpiDmTableInfoFadt2[] =
421 {
422 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (ResetRegister), "Reset Register"},
423 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (ResetValue), "Value to cause reset"},
424 {ACPI_DMT_UINT24, ACPI_FADT_OFFSET (Reserved4[0]), "Reserved"},
425 {ACPI_DMT_EXIT, 0, NULL}
426 };
427
428 /* ACPI 2.0+ Extensions (FADT version 3+) */
429
430 ACPI_DMTABLE_INFO AcpiDmTableInfoFadt3[] =
431 {
432 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (ResetRegister), "Reset Register"},
433 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (ResetValue), "Value to cause reset"},
434 {ACPI_DMT_UINT24, ACPI_FADT_OFFSET (Reserved4[0]), "Reserved"},
435 {ACPI_DMT_UINT64, ACPI_FADT_OFFSET (XFacs), "FACS Address"},
436 {ACPI_DMT_UINT64, ACPI_FADT_OFFSET (XDsdt), "DSDT Address"},
437 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPm1aEventBlock), "PM1A Event Block"},
438 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPm1bEventBlock), "PM1B Event Block"},
439 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPm1aControlBlock), "PM1A Control Block"},
440 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPm1bControlBlock), "PM1B Control Block"},
441 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPm2ControlBlock), "PM2 Control Block"},
442 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPmTimerBlock), "PM Timer Block"},
443 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XGpe0Block), "GPE0 Block"},
444 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XGpe1Block), "GPE1 Block"},
445 {ACPI_DMT_EXIT, 0, NULL}
446 };
447
448
449 /*
450 * Remaining tables are not consumed directly by the ACPICA subsystem
451 */
452
453 /*******************************************************************************
454 *
455 * ASF - Alert Standard Format table (Signature "ASF!")
456 *
457 ******************************************************************************/
458
459 /* Common Subtable header (one per Subtable) */
460
461 ACPI_DMTABLE_INFO AcpiDmTableInfoAsfHdr[] =
462 {
463 {ACPI_DMT_ASF, ACPI_ASF0_OFFSET (Header.Type), "Subtable Type"},
464 {ACPI_DMT_UINT8, ACPI_ASF0_OFFSET (Header.Reserved), "Reserved"},
465 {ACPI_DMT_UINT16, ACPI_ASF0_OFFSET (Header.Length), "Length"},
466 {ACPI_DMT_EXIT, 0, NULL}
467 };
468
469 /* 0: ASF Information */
470
471 ACPI_DMTABLE_INFO AcpiDmTableInfoAsf0[] =
472 {
473 {ACPI_DMT_UINT8, ACPI_ASF0_OFFSET (MinResetValue), "Minimum Reset Value"},
474 {ACPI_DMT_UINT8, ACPI_ASF0_OFFSET (MinPollInterval), "Minimum Polling Interval"},
475 {ACPI_DMT_UINT16, ACPI_ASF0_OFFSET (SystemId), "System ID"},
476 {ACPI_DMT_UINT32, ACPI_ASF0_OFFSET (MfgId), "Manufacturer ID"},
477 {ACPI_DMT_UINT8, ACPI_ASF0_OFFSET (Flags), "Flags"},
478 {ACPI_DMT_UINT24, ACPI_ASF0_OFFSET (Reserved2[0]), "Reserved"},
479 {ACPI_DMT_EXIT, 0, NULL}
480 };
481
482 /* 1: ASF Alerts */
483
484 ACPI_DMTABLE_INFO AcpiDmTableInfoAsf1[] =
485 {
486 {ACPI_DMT_UINT8, ACPI_ASF1_OFFSET (AssertMask), "AssertMask"},
487 {ACPI_DMT_UINT8, ACPI_ASF1_OFFSET (DeassertMask), "DeassertMask"},
488 {ACPI_DMT_UINT8, ACPI_ASF1_OFFSET (Alerts), "Alert Count"},
489 {ACPI_DMT_UINT8, ACPI_ASF1_OFFSET (DataLength), "Alert Data Length"},
490 {ACPI_DMT_EXIT, 0, NULL}
491 };
492
493 /* 1a: ASF Alert data */
494
495 ACPI_DMTABLE_INFO AcpiDmTableInfoAsf1a[] =
496 {
497 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Address), "Address"},
498 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Command), "Command"},
499 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Mask), "Mask"},
500 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Value), "Value"},
501 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (SensorType), "SensorType"},
502 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Type), "Type"},
503 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Offset), "Offset"},
504 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (SourceType), "SourceType"},
505 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Severity), "Severity"},
506 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (SensorNumber), "SensorNumber"},
507 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Entity), "Entity"},
508 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Instance), "Instance"},
509 {ACPI_DMT_EXIT, 0, NULL}
510 };
511
512 /* 2: ASF Remote Control */
513
514 ACPI_DMTABLE_INFO AcpiDmTableInfoAsf2[] =
515 {
516 {ACPI_DMT_UINT8, ACPI_ASF2_OFFSET (Controls), "Control Count"},
517 {ACPI_DMT_UINT8, ACPI_ASF2_OFFSET (DataLength), "Control Data Length"},
518 {ACPI_DMT_UINT16, ACPI_ASF2_OFFSET (Reserved2), "Reserved"},
519 {ACPI_DMT_EXIT, 0, NULL}
520 };
521
522 /* 2a: ASF Control data */
523
524 ACPI_DMTABLE_INFO AcpiDmTableInfoAsf2a[] =
525 {
526 {ACPI_DMT_UINT8, ACPI_ASF2a_OFFSET (Function), "Function"},
527 {ACPI_DMT_UINT8, ACPI_ASF2a_OFFSET (Address), "Address"},
528 {ACPI_DMT_UINT8, ACPI_ASF2a_OFFSET (Command), "Command"},
529 {ACPI_DMT_UINT8, ACPI_ASF2a_OFFSET (Value), "Value"},
530 {ACPI_DMT_EXIT, 0, NULL}
531 };
532
533 /* 3: ASF RMCP Boot Options */
534
535 ACPI_DMTABLE_INFO AcpiDmTableInfoAsf3[] =
536 {
537 {ACPI_DMT_UINT56, ACPI_ASF3_OFFSET (Capabilities[0]), "Capabilites"},
538 {ACPI_DMT_UINT8, ACPI_ASF3_OFFSET (CompletionCode), "Completion Code"},
539 {ACPI_DMT_UINT32, ACPI_ASF3_OFFSET (EnterpriseId), "Enterprise ID"},
540 {ACPI_DMT_UINT8, ACPI_ASF3_OFFSET (Command), "Command"},
541 {ACPI_DMT_UINT16, ACPI_ASF3_OFFSET (Parameter), "Parameter"},
542 {ACPI_DMT_UINT16, ACPI_ASF3_OFFSET (BootOptions), "Boot Options"},
543 {ACPI_DMT_UINT16, ACPI_ASF3_OFFSET (OemParameters), "Oem Parameters"},
544 {ACPI_DMT_EXIT, 0, NULL}
545 };
546
547 /* 4: ASF Address */
548
549 ACPI_DMTABLE_INFO AcpiDmTableInfoAsf4[] =
550 {
551 {ACPI_DMT_UINT8, ACPI_ASF4_OFFSET (EpromAddress), "Eprom Address"},
552 {ACPI_DMT_UINT8, ACPI_ASF4_OFFSET (Devices), "Device Count"},
553 {ACPI_DMT_EXIT, 0, NULL}
554 };
555
556
557 /*******************************************************************************
558 *
559 * BERT - Boot Error Record table
560 *
561 ******************************************************************************/
562
563 ACPI_DMTABLE_INFO AcpiDmTableInfoBert[] =
564 {
565 {ACPI_DMT_UINT32, ACPI_BERT_OFFSET (RegionLength), "Boot Error Region Length"},
566 {ACPI_DMT_UINT64, ACPI_BERT_OFFSET (Address), "Boot Error Region Address"},
567 {ACPI_DMT_EXIT, 0, NULL}
568 };
569
570
571 /*******************************************************************************
572 *
573 * BOOT - Simple Boot Flag Table
574 *
575 ******************************************************************************/
576
577 ACPI_DMTABLE_INFO AcpiDmTableInfoBoot[] =
578 {
579 {ACPI_DMT_UINT8, ACPI_BOOT_OFFSET (CmosIndex), "Boot Register Index"},
580 {ACPI_DMT_UINT24, ACPI_BOOT_OFFSET (Reserved[0]), "Reserved"},
581 {ACPI_DMT_EXIT, 0, NULL}
582 };
583
584
585 /*******************************************************************************
586 *
587 * CPEP - Corrected Platform Error Polling table
588 *
589 ******************************************************************************/
590
591 ACPI_DMTABLE_INFO AcpiDmTableInfoCpep[] =
592 {
593 {ACPI_DMT_UINT64, ACPI_CPEP_OFFSET (Reserved), "Reserved"},
594 {ACPI_DMT_EXIT, 0, NULL}
595 };
596
597 ACPI_DMTABLE_INFO AcpiDmTableInfoCpep0[] =
598 {
599 {ACPI_DMT_UINT8, ACPI_CPEP0_OFFSET (Header.Type), "Subtable Type"},
600 {ACPI_DMT_UINT8, ACPI_CPEP0_OFFSET (Header.Length), "Length"},
601 {ACPI_DMT_UINT8, ACPI_CPEP0_OFFSET (Id), "Processor ID"},
602 {ACPI_DMT_UINT8, ACPI_CPEP0_OFFSET (Eid), "Processor EID"},
603 {ACPI_DMT_UINT32, ACPI_CPEP0_OFFSET (Interval), "Polling Interval"},
604 {ACPI_DMT_EXIT, 0, NULL}
605 };
606
607
608 /*******************************************************************************
609 *
610 * DBGP - Debug Port
611 *
612 ******************************************************************************/
613
614 ACPI_DMTABLE_INFO AcpiDmTableInfoDbgp[] =
615 {
616 {ACPI_DMT_UINT8, ACPI_DBGP_OFFSET (Type), "Interface Type"},
617 {ACPI_DMT_UINT24, ACPI_DBGP_OFFSET (Reserved[0]), "Reserved"},
618 {ACPI_DMT_GAS, ACPI_DBGP_OFFSET (DebugPort), "Debug Port Register"},
619 {ACPI_DMT_EXIT, 0, NULL}
620 };
621
622
623 /*******************************************************************************
624 *
625 * DMAR - DMA Remapping table
626 *
627 ******************************************************************************/
628
629 ACPI_DMTABLE_INFO AcpiDmTableInfoDmar[] =
630 {
631 {ACPI_DMT_UINT8, ACPI_DMAR_OFFSET (Width), "Host Address Width"},
632 {ACPI_DMT_UINT8, ACPI_DMAR_OFFSET (Flags), "Flags"},
633 {ACPI_DMT_EXIT, 0, NULL}
634 };
635
636 /* Common Subtable header (one per Subtable) */
637
638 ACPI_DMTABLE_INFO AcpiDmTableInfoDmarHdr[] =
639 {
640 {ACPI_DMT_DMAR, ACPI_DMAR0_OFFSET (Header.Type), "Subtable Type"},
641 {ACPI_DMT_UINT16, ACPI_DMAR0_OFFSET (Header.Length), "Length"},
642 {ACPI_DMT_EXIT, 0, NULL}
643 };
644
645 /* Common device scope entry */
646
647 ACPI_DMTABLE_INFO AcpiDmTableInfoDmarScope[] =
648 {
649 {ACPI_DMT_UINT8, ACPI_DMARS_OFFSET (EntryType), "Device Scope Entry Type"},
650 {ACPI_DMT_UINT8, ACPI_DMARS_OFFSET (Length), "Entry Length"},
651 {ACPI_DMT_UINT16, ACPI_DMARS_OFFSET (Reserved), "Reserved"},
652 {ACPI_DMT_UINT8, ACPI_DMARS_OFFSET (EnumerationId), "Enumeration ID"},
653 {ACPI_DMT_UINT8, ACPI_DMARS_OFFSET (Bus), "PCI Bus Number"},
654 {ACPI_DMT_EXIT, 0, NULL}
655 };
656
657 /* DMAR Subtables */
658
659 /* 0: Hardware Unit Definition */
660
661 ACPI_DMTABLE_INFO AcpiDmTableInfoDmar0[] =
662 {
663 {ACPI_DMT_UINT8, ACPI_DMAR0_OFFSET (Flags), "Flags"},
664 {ACPI_DMT_UINT8, ACPI_DMAR0_OFFSET (Reserved), "Reserved"},
665 {ACPI_DMT_UINT16, ACPI_DMAR0_OFFSET (Segment), "PCI Segment Number"},
666 {ACPI_DMT_UINT64, ACPI_DMAR0_OFFSET (Address), "Register Base Address"},
667 {ACPI_DMT_EXIT, 0, NULL}
668 };
669
670 /* 1: Reserved Memory Definition */
671
672 ACPI_DMTABLE_INFO AcpiDmTableInfoDmar1[] =
673 {
674 {ACPI_DMT_UINT16, ACPI_DMAR1_OFFSET (Reserved), "Reserved"},
675 {ACPI_DMT_UINT16, ACPI_DMAR1_OFFSET (Segment), "PCI Segment Number"},
676 {ACPI_DMT_UINT64, ACPI_DMAR1_OFFSET (BaseAddress), "Base Address"},
677 {ACPI_DMT_UINT64, ACPI_DMAR1_OFFSET (EndAddress), "End Address (limit)"},
678 {ACPI_DMT_EXIT, 0, NULL}
679 };
680
681 /* 2: Root Port ATS Capability Definition */
682
683 ACPI_DMTABLE_INFO AcpiDmTableInfoDmar2[] =
684 {
685 {ACPI_DMT_UINT8, ACPI_DMAR2_OFFSET (Flags), "Flags"},
686 {ACPI_DMT_UINT8, ACPI_DMAR2_OFFSET (Reserved), "Reserved"},
687 {ACPI_DMT_UINT16, ACPI_DMAR2_OFFSET (Segment), "PCI Segment Number"},
688 {ACPI_DMT_EXIT, 0, NULL}
689 };
690
691 /* 3: Remapping Hardware Static Affinity Structure */
692
693 ACPI_DMTABLE_INFO AcpiDmTableInfoDmar3[] =
694 {
695 {ACPI_DMT_UINT32, ACPI_DMAR3_OFFSET (Reserved), "Reserved"},
696 {ACPI_DMT_UINT64, ACPI_DMAR3_OFFSET (BaseAddress), "Base Address"},
697 {ACPI_DMT_UINT32, ACPI_DMAR3_OFFSET (ProximityDomain), "Proximity Domain"},
698 {ACPI_DMT_EXIT, 0, NULL}
699 };
700
701
702 /*******************************************************************************
703 *
704 * ECDT - Embedded Controller Boot Resources Table
705 *
706 ******************************************************************************/
707
708 ACPI_DMTABLE_INFO AcpiDmTableInfoEcdt[] =
709 {
710 {ACPI_DMT_GAS, ACPI_ECDT_OFFSET (Control), "Command/Status Register"},
711 {ACPI_DMT_GAS, ACPI_ECDT_OFFSET (Data), "Data Register"},
712 {ACPI_DMT_UINT32, ACPI_ECDT_OFFSET (Uid), "UID"},
713 {ACPI_DMT_UINT8, ACPI_ECDT_OFFSET (Gpe), "GPE Number"},
714 {ACPI_DMT_STRING, ACPI_ECDT_OFFSET (Id[0]), "Namepath"},
715 {ACPI_DMT_EXIT, 0, NULL}
716 };
717
718
719 /*******************************************************************************
720 *
721 * EINJ - Error Injection table
722 *
723 ******************************************************************************/
724
725 ACPI_DMTABLE_INFO AcpiDmTableInfoEinj[] =
726 {
727 {ACPI_DMT_UINT32, ACPI_EINJ_OFFSET (HeaderLength), "Injection Header Length"},
728 {ACPI_DMT_UINT8, ACPI_EINJ_OFFSET (Flags), "Flags"},
729 {ACPI_DMT_UINT24, ACPI_EINJ_OFFSET (Reserved[0]), "Reserved"},
730 {ACPI_DMT_UINT32, ACPI_EINJ_OFFSET (Entries), "Injection Entry Count"},
731 {ACPI_DMT_EXIT, 0, NULL}
732 };
733
734 ACPI_DMTABLE_INFO AcpiDmTableInfoEinj0[] =
735 {
736 {ACPI_DMT_UINT8, ACPI_EINJ0_OFFSET (Action), "Action"},
737 {ACPI_DMT_UINT8, ACPI_EINJ0_OFFSET (Instruction), "Instruction"},
738 {ACPI_DMT_UINT8, ACPI_EINJ0_OFFSET (Flags), "Flags"},
739 {ACPI_DMT_UINT8, ACPI_EINJ0_OFFSET (Reserved), "Reserved"},
740 {ACPI_DMT_GAS, ACPI_EINJ0_OFFSET (RegisterRegion), "Register Region"},
741 {ACPI_DMT_UINT64, ACPI_EINJ0_OFFSET (Value), "Value"},
742 {ACPI_DMT_UINT64, ACPI_EINJ0_OFFSET (Mask), "Mask"},
743 {ACPI_DMT_EXIT, 0, NULL}
744 };
745
746
747 /*******************************************************************************
748 *
749 * ERST - Error Record Serialization table
750 *
751 ******************************************************************************/
752
753 ACPI_DMTABLE_INFO AcpiDmTableInfoErst[] =
754 {
755 {ACPI_DMT_UINT32, ACPI_ERST_OFFSET (HeaderLength), "Serialization Header Length"},
756 {ACPI_DMT_UINT32, ACPI_ERST_OFFSET (Reserved), "Reserved"},
757 {ACPI_DMT_UINT32, ACPI_ERST_OFFSET (Entries), "Instruction Entry Count"},
758 {ACPI_DMT_EXIT, 0, NULL}
759 };
760
761
762 /*******************************************************************************
763 *
764 * HEST - Hardware Error Source table
765 *
766 ******************************************************************************/
767
768 ACPI_DMTABLE_INFO AcpiDmTableInfoHest[] =
769 {
770 {ACPI_DMT_UINT32, ACPI_HEST_OFFSET (ErrorSourceCount), "Error Source Count"},
771 {ACPI_DMT_EXIT, 0, NULL}
772 };
773
774 /* Common HEST structures for subtables */
775
776 #define ACPI_DM_HEST_HEADER \
777 {ACPI_DMT_HEST, ACPI_HEST0_OFFSET (Header.Type), "Subtable Type"}, \
778 {ACPI_DMT_UINT16, ACPI_HEST0_OFFSET (Header.SourceId), "Source Id"}
779
780 #define ACPI_DM_HEST_AER \
781 {ACPI_DMT_UINT16, ACPI_HEST6_OFFSET (Aer.Reserved1), "Reserved"}, \
782 {ACPI_DMT_UINT8, ACPI_HEST6_OFFSET (Aer.Flags), "Flags"}, \
783 {ACPI_DMT_UINT8, ACPI_HEST6_OFFSET (Aer.Enabled), "Enabled"}, \
784 {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.RecordsToPreallocate), "Records To Preallocate"}, \
785 {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.MaxSectionsPerRecord), "Max Sections Per Record"}, \
786 {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.Bus), "Bus"}, \
787 {ACPI_DMT_UINT16, ACPI_HEST6_OFFSET (Aer.Device), "Device"}, \
788 {ACPI_DMT_UINT16, ACPI_HEST6_OFFSET (Aer.Function), "Function"}, \
789 {ACPI_DMT_UINT16, ACPI_HEST6_OFFSET (Aer.DeviceControl), "DeviceControl"}, \
790 {ACPI_DMT_UINT16, ACPI_HEST6_OFFSET (Aer.Reserved2), "Reserved"}, \
791 {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.UncorrectableMask), "Uncorrectable Mask"}, \
792 {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.UncorrectableSeverity), "Uncorrectable Severity"}, \
793 {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.CorrectableMask), "Correctable Mask"}, \
794 {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.AdvancedCapabilities), "Advanced Capabilities"}
795
796
797 /* HEST Subtables */
798
799 /* 0: IA32 Machine Check Exception */
800
801 ACPI_DMTABLE_INFO AcpiDmTableInfoHest0[] =
802 {
803 ACPI_DM_HEST_HEADER,
804 {ACPI_DMT_UINT16, ACPI_HEST0_OFFSET (Reserved1), "Reserved"},
805 {ACPI_DMT_UINT8, ACPI_HEST0_OFFSET (Flags), "Flags"},
806 {ACPI_DMT_UINT8, ACPI_HEST0_OFFSET (Enabled), "Enabled"},
807 {ACPI_DMT_UINT32, ACPI_HEST0_OFFSET (RecordsToPreallocate), "Records To Preallocate"},
808 {ACPI_DMT_UINT32, ACPI_HEST0_OFFSET (MaxSectionsPerRecord), "Max Sections Per Record"},
809 {ACPI_DMT_UINT64, ACPI_HEST0_OFFSET (GlobalCapabilityData), "Global Capability Data"},
810 {ACPI_DMT_UINT64, ACPI_HEST0_OFFSET (GlobalControlData), "Global Control Data"},
811 {ACPI_DMT_UINT8, ACPI_HEST0_OFFSET (NumHardwareBanks), "Num Hardware Banks"},
812 {ACPI_DMT_UINT56, ACPI_HEST0_OFFSET (Reserved3[0]), "Reserved"},
813 {ACPI_DMT_EXIT, 0, NULL}
814 };
815
816 /* 1: IA32 Corrected Machine Check */
817
818 ACPI_DMTABLE_INFO AcpiDmTableInfoHest1[] =
819 {
820 ACPI_DM_HEST_HEADER,
821 {ACPI_DMT_UINT16, ACPI_HEST1_OFFSET (Reserved1), "Reserved"},
822 {ACPI_DMT_UINT8, ACPI_HEST1_OFFSET (Flags), "Flags"},
823 {ACPI_DMT_UINT8, ACPI_HEST1_OFFSET (Enabled), "Enabled"},
824 {ACPI_DMT_UINT32, ACPI_HEST1_OFFSET (RecordsToPreallocate), "Records To Preallocate"},
825 {ACPI_DMT_UINT32, ACPI_HEST1_OFFSET (MaxSectionsPerRecord), "Max Sections Per Record"},
826 {ACPI_DMT_HESTNTFY, ACPI_HEST1_OFFSET (Notify), "Notify"},
827 {ACPI_DMT_UINT8, ACPI_HEST1_OFFSET (NumHardwareBanks), "Num Hardware Banks"},
828 {ACPI_DMT_UINT24, ACPI_HEST1_OFFSET (Reserved2[0]), "Reserved"},
829 {ACPI_DMT_EXIT, 0, NULL}
830 };
831
832 /* 2: IA32 Non-Maskable Interrupt */
833
834 ACPI_DMTABLE_INFO AcpiDmTableInfoHest2[] =
835 {
836 ACPI_DM_HEST_HEADER,
837 {ACPI_DMT_UINT32, ACPI_HEST2_OFFSET (Reserved), "Reserved"},
838 {ACPI_DMT_UINT32, ACPI_HEST2_OFFSET (RecordsToPreallocate), "Records To Preallocate"},
839 {ACPI_DMT_UINT32, ACPI_HEST2_OFFSET (MaxSectionsPerRecord), "Max Sections Per Record"},
840 {ACPI_DMT_UINT32, ACPI_HEST2_OFFSET (MaxRawDataLength), "Max Raw Data Length"},
841 {ACPI_DMT_EXIT, 0, NULL}
842 };
843
844
845 /* 6: PCI Express Root Port AER */
846
847 ACPI_DMTABLE_INFO AcpiDmTableInfoHest6[] =
848 {
849 ACPI_DM_HEST_HEADER,
850 ACPI_DM_HEST_AER,
851 {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (RootErrorCommand), "Root Error Command"},
852 {ACPI_DMT_EXIT, 0, NULL}
853 };
854
855 /* 7: PCI Express AER (AER Endpoint) */
856
857 ACPI_DMTABLE_INFO AcpiDmTableInfoHest7[] =
858 {
859 ACPI_DM_HEST_HEADER,
860 ACPI_DM_HEST_AER,
861 {ACPI_DMT_EXIT, 0, NULL}
862 };
863
864 /* 8: PCI Express/PCI-X Bridge AER */
865
866 ACPI_DMTABLE_INFO AcpiDmTableInfoHest8[] =
867 {
868 ACPI_DM_HEST_HEADER,
869 ACPI_DM_HEST_AER,
870 {ACPI_DMT_UINT32, ACPI_HEST8_OFFSET (UncorrectableMask2), "2nd Uncorrectable Mask"},
871 {ACPI_DMT_UINT32, ACPI_HEST8_OFFSET (UncorrectableSeverity2), "2nd Uncorrectable Severity"},
872 {ACPI_DMT_UINT32, ACPI_HEST8_OFFSET (AdvancedCapabilities2), "2nd Advanced Capabilities"},
873 {ACPI_DMT_EXIT, 0, NULL}
874 };
875
876 /* 9: Generic Hardware Error Source */
877
878 ACPI_DMTABLE_INFO AcpiDmTableInfoHest9[] =
879 {
880 ACPI_DM_HEST_HEADER,
881 {ACPI_DMT_UINT16, ACPI_HEST9_OFFSET (RelatedSourceId), "Related Source Id"},
882 {ACPI_DMT_UINT8, ACPI_HEST9_OFFSET (Reserved), "Reserved"},
883 {ACPI_DMT_UINT8, ACPI_HEST9_OFFSET (Enabled), "Enabled"},
884 {ACPI_DMT_UINT32, ACPI_HEST9_OFFSET (RecordsToPreallocate), "Records To Preallocate"},
885 {ACPI_DMT_UINT32, ACPI_HEST9_OFFSET (MaxSectionsPerRecord), "Max Sections Per Record"},
886 {ACPI_DMT_UINT32, ACPI_HEST9_OFFSET (MaxRawDataLength), "Max Raw Data Length"},
887 {ACPI_DMT_GAS, ACPI_HEST9_OFFSET (ErrorStatusAddress), "Error Status Address"},
888 {ACPI_DMT_HESTNTFY, ACPI_HEST9_OFFSET (Notify), "Notify"},
889 {ACPI_DMT_UINT32, ACPI_HEST9_OFFSET (ErrorBlockLength), "Error Status Block Length"},
890 {ACPI_DMT_EXIT, 0, NULL}
891 };
892
893 ACPI_DMTABLE_INFO AcpiDmTableInfoHestNotify[] =
894 {
895 {ACPI_DMT_HESTNTYP, ACPI_HESTN_OFFSET (Type), "Notify Type"},
896 {ACPI_DMT_UINT8, ACPI_HESTN_OFFSET (Length), "Notify Length"},
897 {ACPI_DMT_UINT16, ACPI_HESTN_OFFSET (ConfigWriteEnable), "Configuration Write Enable"},
898 {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (PollInterval), "PollInterval"},
899 {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (Vector), "Vector"},
900 {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (PollingThresholdValue), "Polling Threshold Value"},
901 {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (PollingThresholdWindow), "Polling Threshold Window"},
902 {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (ErrorThresholdValue), "Error Threshold Value"},
903 {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (ErrorThresholdWindow), "Error Threshold Window"},
904 {ACPI_DMT_EXIT, 0, NULL}
905 };
906
907
908 /*******************************************************************************
909 *
910 * HPET - High Precision Event Timer table
911 *
912 ******************************************************************************/
913
914 ACPI_DMTABLE_INFO AcpiDmTableInfoHpet[] =
915 {
916 {ACPI_DMT_UINT32, ACPI_HPET_OFFSET (Id), "Hardware Block ID"},
917 {ACPI_DMT_GAS, ACPI_HPET_OFFSET (Address), "Timer Block Register"},
918 {ACPI_DMT_UINT8, ACPI_HPET_OFFSET (Sequence), "Sequence Number"},
919 {ACPI_DMT_UINT16, ACPI_HPET_OFFSET (MinimumTick), "Minimum Clock Ticks"},
920 {ACPI_DMT_UINT8, ACPI_HPET_OFFSET (Flags), "Flags (decoded below)"},
921 {ACPI_DMT_FLAG0, ACPI_HPET_FLAG_OFFSET (Flags,0), "4K Page Protect"},
922 {ACPI_DMT_FLAG1, ACPI_HPET_FLAG_OFFSET (Flags,0), "64K Page Protect"},
923 {ACPI_DMT_EXIT, 0, NULL}
924 };
925
926
927 /*******************************************************************************
928 *
929 * IVRS - I/O Virtualization Reporting Structure
930 *
931 ******************************************************************************/
932
933 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs[] =
934 {
935 {ACPI_DMT_UINT32, ACPI_IVRS_OFFSET (Info), "Virtualization Info"},
936 {ACPI_DMT_UINT64, ACPI_IVRS_OFFSET (Reserved), "Reserved"},
937 {ACPI_DMT_EXIT, 0, NULL}
938 };
939
940 /* Common Subtable header (one per Subtable) */
941
942 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrsHdr[] =
943 {
944 {ACPI_DMT_IVRS, ACPI_IVRSH_OFFSET (Type), "Subtable Type"},
945 {ACPI_DMT_UINT8, ACPI_IVRSH_OFFSET (Flags), "Flags"},
946 {ACPI_DMT_UINT16, ACPI_IVRSH_OFFSET (Length), "Length"},
947 {ACPI_DMT_UINT16, ACPI_IVRSH_OFFSET (DeviceId), "DeviceId"},
948 {ACPI_DMT_EXIT, 0, NULL}
949 };
950
951 /* IVRS subtables */
952
953 /* 0x10: I/O Virtualization Hardware Definition (IVHD) Block */
954
955 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs0[] =
956 {
957 {ACPI_DMT_UINT16, ACPI_IVRS0_OFFSET (CapabilityOffset), "Capability Offset"},
958 {ACPI_DMT_UINT64, ACPI_IVRS0_OFFSET (BaseAddress), "Base Address"},
959 {ACPI_DMT_UINT16, ACPI_IVRS0_OFFSET (PciSegmentGroup), "PCI Segment Group"},
960 {ACPI_DMT_UINT16, ACPI_IVRS0_OFFSET (Info), "Virtualization Info"},
961 {ACPI_DMT_UINT32, ACPI_IVRS0_OFFSET (Reserved), "Reserved"},
962 {ACPI_DMT_EXIT, 0, NULL}
963 };
964
965 /* 0x20, 0x21, 0x22: I/O Virtualization Memory Definition (IVMD) Block */
966
967 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs1[] =
968 {
969 {ACPI_DMT_UINT16, ACPI_IVRS1_OFFSET (AuxData), "Auxiliary Data"},
970 {ACPI_DMT_UINT64, ACPI_IVRS1_OFFSET (Reserved), "Reserved"},
971 {ACPI_DMT_UINT64, ACPI_IVRS1_OFFSET (StartAddress), "Start Address"},
972 {ACPI_DMT_UINT64, ACPI_IVRS1_OFFSET (MemoryLength), "Memory Length"},
973 {ACPI_DMT_EXIT, 0, NULL}
974 };
975
976 /* Device entry header for IVHD block */
977
978 #define ACPI_DMT_IVRS_DE_HEADER \
979 {ACPI_DMT_UINT8, ACPI_IVRSD_OFFSET (Type), "Entry Type"}, \
980 {ACPI_DMT_UINT16, ACPI_IVRSD_OFFSET (Id), "Device ID"}, \
981 {ACPI_DMT_UINT8, ACPI_IVRSD_OFFSET (DataSetting), "Data Setting"}
982
983 /* 4-byte device entry */
984
985 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs4[] =
986 {
987 ACPI_DMT_IVRS_DE_HEADER,
988 {ACPI_DMT_EXIT, 0, NULL}
989 };
990
991 /* 8-byte device entry */
992
993 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs8a[] =
994 {
995 ACPI_DMT_IVRS_DE_HEADER,
996 {ACPI_DMT_UINT8, ACPI_IVRS8A_OFFSET (Reserved1), "Reserved"},
997 {ACPI_DMT_UINT16, ACPI_IVRS8A_OFFSET (UsedId), "Source Used Device ID"},
998 {ACPI_DMT_UINT8, ACPI_IVRS8A_OFFSET (Reserved2), "Reserved"},
999 {ACPI_DMT_EXIT, 0, NULL}
1000 };
1001
1002 /* 8-byte device entry */
1003
1004 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs8b[] =
1005 {
1006 ACPI_DMT_IVRS_DE_HEADER,
1007 {ACPI_DMT_UINT32, ACPI_IVRS8B_OFFSET (ExtendedData), "Extended Data"},
1008 {ACPI_DMT_EXIT, 0, NULL}
1009 };
1010
1011 /* 8-byte device entry */
1012
1013 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs8c[] =
1014 {
1015 ACPI_DMT_IVRS_DE_HEADER,
1016 {ACPI_DMT_UINT8, ACPI_IVRS8C_OFFSET (Handle), "Handle"},
1017 {ACPI_DMT_UINT16, ACPI_IVRS8C_OFFSET (UsedId), "Source Used Device ID"},
1018 {ACPI_DMT_UINT8, ACPI_IVRS8C_OFFSET (Variety), "Variety"},
1019 {ACPI_DMT_EXIT, 0, NULL}
1020 };
1021
1022
1023 /*******************************************************************************
1024 *
1025 * MADT - Multiple APIC Description Table and subtables
1026 *
1027 ******************************************************************************/
1028
1029 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt[] =
1030 {
1031 {ACPI_DMT_UINT32, ACPI_MADT_OFFSET (Address), "Local Apic Address"},
1032 {ACPI_DMT_UINT32, ACPI_MADT_OFFSET (Flags), "Flags (decoded below)"},
1033 {ACPI_DMT_FLAG0, ACPI_MADT_FLAG_OFFSET (Flags,0), "PC-AT Compatibility"},
1034 {ACPI_DMT_EXIT, 0, NULL}
1035 };
1036
1037 /* Common Subtable header (one per Subtable) */
1038
1039 ACPI_DMTABLE_INFO AcpiDmTableInfoMadtHdr[] =
1040 {
1041 {ACPI_DMT_MADT, ACPI_MADTH_OFFSET (Type), "Subtable Type"},
1042 {ACPI_DMT_UINT8, ACPI_MADTH_OFFSET (Length), "Length"},
1043 {ACPI_DMT_EXIT, 0, NULL}
1044 };
1045
1046 /* MADT Subtables */
1047
1048 /* 0: processor APIC */
1049
1050 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt0[] =
1051 {
1052 {ACPI_DMT_UINT8, ACPI_MADT0_OFFSET (ProcessorId), "Processor ID"},
1053 {ACPI_DMT_UINT8, ACPI_MADT0_OFFSET (Id), "Local Apic ID"},
1054 {ACPI_DMT_UINT32, ACPI_MADT0_OFFSET (LapicFlags), "Flags (decoded below)"},
1055 {ACPI_DMT_FLAG0, ACPI_MADT0_FLAG_OFFSET (LapicFlags,0), "Processor Enabled"},
1056 {ACPI_DMT_EXIT, 0, NULL}
1057 };
1058
1059 /* 1: IO APIC */
1060
1061 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt1[] =
1062 {
1063 {ACPI_DMT_UINT8, ACPI_MADT1_OFFSET (Id), "I/O Apic ID"},
1064 {ACPI_DMT_UINT8, ACPI_MADT1_OFFSET (Reserved), "Reserved"},
1065 {ACPI_DMT_UINT32, ACPI_MADT1_OFFSET (Address), "Address"},
1066 {ACPI_DMT_UINT32, ACPI_MADT1_OFFSET (GlobalIrqBase), "Interrupt"},
1067 {ACPI_DMT_EXIT, 0, NULL}
1068 };
1069
1070 /* 2: Interrupt Override */
1071
1072 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt2[] =
1073 {
1074 {ACPI_DMT_UINT8, ACPI_MADT2_OFFSET (Bus), "Bus"},
1075 {ACPI_DMT_UINT8, ACPI_MADT2_OFFSET (SourceIrq), "Source"},
1076 {ACPI_DMT_UINT32, ACPI_MADT2_OFFSET (GlobalIrq), "Interrupt"},
1077 {ACPI_DMT_UINT16, ACPI_MADT2_OFFSET (IntiFlags), "Flags (decoded below)"},
1078 {ACPI_DMT_FLAGS0, ACPI_MADT2_FLAG_OFFSET (IntiFlags,0), "Polarity"},
1079 {ACPI_DMT_FLAGS2, ACPI_MADT2_FLAG_OFFSET (IntiFlags,0), "Trigger Mode"},
1080 {ACPI_DMT_EXIT, 0, NULL}
1081 };
1082
1083 /* 3: NMI Sources */
1084
1085 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt3[] =
1086 {
1087 {ACPI_DMT_UINT16, ACPI_MADT3_OFFSET (IntiFlags), "Flags (decoded below)"},
1088 {ACPI_DMT_FLAGS0, ACPI_MADT3_FLAG_OFFSET (IntiFlags,0), "Polarity"},
1089 {ACPI_DMT_FLAGS2, ACPI_MADT3_FLAG_OFFSET (IntiFlags,0), "Trigger Mode"},
1090 {ACPI_DMT_UINT32, ACPI_MADT3_OFFSET (GlobalIrq), "Interrupt"},
1091 {ACPI_DMT_EXIT, 0, NULL}
1092 };
1093
1094 /* 4: Local APIC NMI */
1095
1096 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt4[] =
1097 {
1098 {ACPI_DMT_UINT8, ACPI_MADT4_OFFSET (ProcessorId), "Processor ID"},
1099 {ACPI_DMT_UINT16, ACPI_MADT4_OFFSET (IntiFlags), "Flags (decoded below)"},
1100 {ACPI_DMT_FLAGS0, ACPI_MADT4_FLAG_OFFSET (IntiFlags,0), "Polarity"},
1101 {ACPI_DMT_FLAGS2, ACPI_MADT4_FLAG_OFFSET (IntiFlags,0), "Trigger Mode"},
1102 {ACPI_DMT_UINT8, ACPI_MADT4_OFFSET (Lint), "Interrupt Input LINT"},
1103 {ACPI_DMT_EXIT, 0, NULL}
1104 };
1105
1106 /* 5: Address Override */
1107
1108 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt5[] =
1109 {
1110 {ACPI_DMT_UINT16, ACPI_MADT5_OFFSET (Reserved), "Reserved"},
1111 {ACPI_DMT_UINT64, ACPI_MADT5_OFFSET (Address), "APIC Address"},
1112 {ACPI_DMT_EXIT, 0, NULL}
1113 };
1114
1115 /* 6: I/O Sapic */
1116
1117 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt6[] =
1118 {
1119 {ACPI_DMT_UINT8, ACPI_MADT6_OFFSET (Id), "I/O Sapic ID"},
1120 {ACPI_DMT_UINT8, ACPI_MADT6_OFFSET (Reserved), "Reserved"},
1121 {ACPI_DMT_UINT32, ACPI_MADT6_OFFSET (GlobalIrqBase), "Interrupt Base"},
1122 {ACPI_DMT_UINT64, ACPI_MADT6_OFFSET (Address), "Address"},
1123 {ACPI_DMT_EXIT, 0, NULL}
1124 };
1125
1126 /* 7: Local Sapic */
1127
1128 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt7[] =
1129 {
1130 {ACPI_DMT_UINT8, ACPI_MADT7_OFFSET (ProcessorId), "Processor ID"},
1131 {ACPI_DMT_UINT8, ACPI_MADT7_OFFSET (Id), "Local Sapic ID"},
1132 {ACPI_DMT_UINT8, ACPI_MADT7_OFFSET (Eid), "Local Sapic EID"},
1133 {ACPI_DMT_UINT24, ACPI_MADT7_OFFSET (Reserved[0]), "Reserved"},
1134 {ACPI_DMT_UINT32, ACPI_MADT7_OFFSET (LapicFlags), "Flags (decoded below)"},
1135 {ACPI_DMT_FLAG0, ACPI_MADT7_FLAG_OFFSET (LapicFlags,0), "Processor Enabled"},
1136 {ACPI_DMT_UINT32, ACPI_MADT7_OFFSET (Uid), "Processor UID"},
1137 {ACPI_DMT_STRING, ACPI_MADT7_OFFSET (UidString[0]), "Processor UID String"},
1138 {ACPI_DMT_EXIT, 0, NULL}
1139 };
1140
1141 /* 8: Platform Interrupt Source */
1142
1143 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt8[] =
1144 {
1145 {ACPI_DMT_UINT16, ACPI_MADT8_OFFSET (IntiFlags), "Flags (decoded below)"},
1146 {ACPI_DMT_FLAGS0, ACPI_MADT8_FLAG_OFFSET (IntiFlags,0), "Polarity"},
1147 {ACPI_DMT_FLAGS2, ACPI_MADT8_FLAG_OFFSET (IntiFlags,0), "Trigger Mode"},
1148 {ACPI_DMT_UINT8, ACPI_MADT8_OFFSET (Type), "InterruptType"},
1149 {ACPI_DMT_UINT8, ACPI_MADT8_OFFSET (Id), "Processor ID"},
1150 {ACPI_DMT_UINT8, ACPI_MADT8_OFFSET (Eid), "Processor EID"},
1151 {ACPI_DMT_UINT8, ACPI_MADT8_OFFSET (IoSapicVector), "I/O Sapic Vector"},
1152 {ACPI_DMT_UINT32, ACPI_MADT8_OFFSET (GlobalIrq), "Interrupt"},
1153 {ACPI_DMT_UINT32, ACPI_MADT8_OFFSET (Flags), "Flags (decoded below)"},
1154 {ACPI_DMT_FLAG0, ACPI_MADT8_OFFSET (Flags), "CPEI Override"},
1155 {ACPI_DMT_EXIT, 0, NULL}
1156 };
1157
1158 /* 9: Processor Local X2_APIC (ACPI 4.0) */
1159
1160 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt9[] =
1161 {
1162 {ACPI_DMT_UINT16, ACPI_MADT9_OFFSET (Reserved), "Reserved"},
1163 {ACPI_DMT_UINT32, ACPI_MADT9_OFFSET (LocalApicId), "Processor x2Apic ID"},
1164 {ACPI_DMT_UINT32, ACPI_MADT9_OFFSET (LapicFlags), "Flags (decoded below)"},
1165 {ACPI_DMT_FLAG0, ACPI_MADT9_FLAG_OFFSET (LapicFlags,0), "Processor Enabled"},
1166 {ACPI_DMT_UINT32, ACPI_MADT9_OFFSET (Uid), "Processor UID"},
1167 {ACPI_DMT_EXIT, 0, NULL}
1168 };
1169
1170 /* 10: Local X2_APIC NMI (ACPI 4.0) */
1171
1172 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt10[] =
1173 {
1174 {ACPI_DMT_UINT16, ACPI_MADT10_OFFSET (IntiFlags), "Flags (decoded below)"},
1175 {ACPI_DMT_FLAGS0, ACPI_MADT10_FLAG_OFFSET (IntiFlags,0), "Polarity"},
1176 {ACPI_DMT_FLAGS2, ACPI_MADT10_FLAG_OFFSET (IntiFlags,0), "Trigger Mode"},
1177 {ACPI_DMT_UINT32, ACPI_MADT10_OFFSET (Uid), "Processor UID"},
1178 {ACPI_DMT_UINT8, ACPI_MADT10_OFFSET (Lint), "Interrupt Input LINT"},
1179 {ACPI_DMT_UINT24, ACPI_MADT10_OFFSET (Reserved[0]), "Reserved"},
1180 {ACPI_DMT_EXIT, 0, NULL}
1181 };
1182
1183
1184 /*******************************************************************************
1185 *
1186 * MCFG - PCI Memory Mapped Configuration table and Subtable
1187 *
1188 ******************************************************************************/
1189
1190 ACPI_DMTABLE_INFO AcpiDmTableInfoMcfg[] =
1191 {
1192 {ACPI_DMT_UINT64, ACPI_MCFG_OFFSET (Reserved[0]), "Reserved"},
1193 {ACPI_DMT_EXIT, 0, NULL}
1194 };
1195
1196 ACPI_DMTABLE_INFO AcpiDmTableInfoMcfg0[] =
1197 {
1198 {ACPI_DMT_UINT64, ACPI_MCFG0_OFFSET (Address), "Base Address"},
1199 {ACPI_DMT_UINT16, ACPI_MCFG0_OFFSET (PciSegment), "Segment Group Number"},
1200 {ACPI_DMT_UINT8, ACPI_MCFG0_OFFSET (StartBusNumber), "Start Bus Number"},
1201 {ACPI_DMT_UINT8, ACPI_MCFG0_OFFSET (EndBusNumber), "End Bus Number"},
1202 {ACPI_DMT_UINT32, ACPI_MCFG0_OFFSET (Reserved), "Reserved"},
1203 {ACPI_DMT_EXIT, 0, NULL}
1204 };
1205
1206
1207 /*******************************************************************************
1208 *
1209 * MSCT - Maximum System Characteristics Table (ACPI 4.0)
1210 *
1211 ******************************************************************************/
1212
1213 ACPI_DMTABLE_INFO AcpiDmTableInfoMsct[] =
1214 {
1215 {ACPI_DMT_UINT32, ACPI_MSCT_OFFSET (ProximityOffset), "Proximity Offset"},
1216 {ACPI_DMT_UINT32, ACPI_MSCT_OFFSET (MaxProximityDomains), "Max Proximity Domains"},
1217 {ACPI_DMT_UINT32, ACPI_MSCT_OFFSET (MaxClockDomains), "Max Clock Domains"},
1218 {ACPI_DMT_UINT64, ACPI_MSCT_OFFSET (MaxAddress), "Max Physical Address"},
1219 {ACPI_DMT_EXIT, 0, NULL}
1220 };
1221
1222 /* Subtable - Maximum Proximity Domain Information. Version 1 */
1223
1224 ACPI_DMTABLE_INFO AcpiDmTableInfoMsct0[] =
1225 {
1226 {ACPI_DMT_UINT8, ACPI_MSCT0_OFFSET (Revision), "Revision"},
1227 {ACPI_DMT_UINT8, ACPI_MSCT0_OFFSET (Length), "Length"},
1228 {ACPI_DMT_UINT32, ACPI_MSCT0_OFFSET (RangeStart), "Domain Range Start"},
1229 {ACPI_DMT_UINT32, ACPI_MSCT0_OFFSET (RangeEnd), "Domain Range End"},
1230 {ACPI_DMT_UINT32, ACPI_MSCT0_OFFSET (ProcessorCapacity), "Processor Capacity"},
1231 {ACPI_DMT_UINT64, ACPI_MSCT0_OFFSET (MemoryCapacity), "Memory Capacity"},
1232 {ACPI_DMT_EXIT, 0, NULL}
1233 };
1234
1235
1236 /*******************************************************************************
1237 *
1238 * SBST - Smart Battery Specification Table
1239 *
1240 ******************************************************************************/
1241
1242 ACPI_DMTABLE_INFO AcpiDmTableInfoSbst[] =
1243 {
1244 {ACPI_DMT_UINT32, ACPI_SBST_OFFSET (WarningLevel), "Warning Level"},
1245 {ACPI_DMT_UINT32, ACPI_SBST_OFFSET (LowLevel), "Low Level"},
1246 {ACPI_DMT_UINT32, ACPI_SBST_OFFSET (CriticalLevel), "Critical Level"},
1247 {ACPI_DMT_EXIT, 0, NULL}
1248 };
1249
1250
1251 /*******************************************************************************
1252 *
1253 * SLIC - Software Licensing Description Table. NOT FULLY IMPLEMENTED
1254 *
1255 ******************************************************************************/
1256
1257 ACPI_DMTABLE_INFO AcpiDmTableInfoSlic[] =
1258 {
1259 {ACPI_DMT_EXIT, 0, NULL}
1260 };
1261
1262
1263 /*******************************************************************************
1264 *
1265 * SLIT - System Locality Information Table
1266 *
1267 ******************************************************************************/
1268
1269 ACPI_DMTABLE_INFO AcpiDmTableInfoSlit[] =
1270 {
1271 {ACPI_DMT_UINT64, ACPI_SLIT_OFFSET (LocalityCount), "Localities"},
1272 {ACPI_DMT_EXIT, 0, NULL}
1273 };
1274
1275
1276 /*******************************************************************************
1277 *
1278 * SPCR - Serial Port Console Redirection table
1279 *
1280 ******************************************************************************/
1281
1282 ACPI_DMTABLE_INFO AcpiDmTableInfoSpcr[] =
1283 {
1284 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (InterfaceType), "Interface Type"},
1285 {ACPI_DMT_UINT24, ACPI_SPCR_OFFSET (Reserved[0]), "Reserved"},
1286 {ACPI_DMT_GAS, ACPI_SPCR_OFFSET (SerialPort), "Serial Port Register"},
1287 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (InterruptType), "Interrupt Type"},
1288 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (PcInterrupt), "PCAT-compatible IRQ"},
1289 {ACPI_DMT_UINT32, ACPI_SPCR_OFFSET (Interrupt), "Interrupt"},
1290 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (BaudRate), "Baud Rate"},
1291 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (Parity), "Parity"},
1292 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (StopBits), "Stop Bits"},
1293 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (FlowControl), "Flow Control"},
1294 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (TerminalType), "Terminal Type"},
1295 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (Reserved2), "Reserved"},
1296 {ACPI_DMT_UINT16, ACPI_SPCR_OFFSET (PciDeviceId), "PCI Device ID"},
1297 {ACPI_DMT_UINT16, ACPI_SPCR_OFFSET (PciVendorId), "PCI Vendor ID"},
1298 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (PciBus), "PCI Bus"},
1299 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (PciDevice), "PCI Device"},
1300 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (PciFunction), "PCI Function"},
1301 {ACPI_DMT_UINT32, ACPI_SPCR_OFFSET (PciFlags), "PCI Flags"},
1302 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (PciSegment), "PCI Segment"},
1303 {ACPI_DMT_UINT32, ACPI_SPCR_OFFSET (Reserved2), "Reserved"},
1304 {ACPI_DMT_EXIT, 0, NULL}
1305 };
1306
1307
1308 /*******************************************************************************
1309 *
1310 * SPMI - Server Platform Management Interface table
1311 *
1312 ******************************************************************************/
1313
1314 ACPI_DMTABLE_INFO AcpiDmTableInfoSpmi[] =
1315 {
1316 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (InterfaceType), "Interface Type"},
1317 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (Reserved), "Reserved"},
1318 {ACPI_DMT_UINT16, ACPI_SPMI_OFFSET (SpecRevision), "IPMI Spec Version"},
1319 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (InterruptType), "Interrupt Type"},
1320 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (GpeNumber), "GPE Number"},
1321 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (Reserved1), "Reserved"},
1322 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (PciDeviceFlag), "PCI Device Flag"},
1323 {ACPI_DMT_UINT32, ACPI_SPMI_OFFSET (Interrupt), "Interrupt"},
1324 {ACPI_DMT_GAS, ACPI_SPMI_OFFSET (IpmiRegister), "IPMI Register"},
1325 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (PciSegment), "PCI Segment"},
1326 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (PciBus), "PCI Bus"},
1327 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (PciDevice), "PCI Device"},
1328 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (PciFunction), "PCI Function"},
1329 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (Reserved2), "Reserved"},
1330 {ACPI_DMT_EXIT, 0, NULL}
1331 };
1332
1333
1334 /*******************************************************************************
1335 *
1336 * SRAT - System Resource Affinity Table and Subtables
1337 *
1338 ******************************************************************************/
1339
1340 ACPI_DMTABLE_INFO AcpiDmTableInfoSrat[] =
1341 {
1342 {ACPI_DMT_UINT32, ACPI_SRAT_OFFSET (TableRevision), "Table Revision"},
1343 {ACPI_DMT_UINT64, ACPI_SRAT_OFFSET (Reserved), "Reserved"},
1344 {ACPI_DMT_EXIT, 0, NULL}
1345 };
1346
1347 /* Common Subtable header (one per Subtable) */
1348
1349 ACPI_DMTABLE_INFO AcpiDmTableInfoSratHdr[] =
1350 {
1351 {ACPI_DMT_SRAT, ACPI_SRATH_OFFSET (Type), "Subtable Type"},
1352 {ACPI_DMT_UINT8, ACPI_SRATH_OFFSET (Length), "Length"},
1353 {ACPI_DMT_EXIT, 0, NULL}
1354 };
1355
1356 /* SRAT Subtables */
1357
1358 /* 0: Processor Local APIC/SAPIC Affinity */
1359
1360 ACPI_DMTABLE_INFO AcpiDmTableInfoSrat0[] =
1361 {
1362 {ACPI_DMT_UINT8, ACPI_SRAT0_OFFSET (ProximityDomainLo), "Proximity Domain Low(8)"},
1363 {ACPI_DMT_UINT8, ACPI_SRAT0_OFFSET (ApicId), "Apic ID"},
1364 {ACPI_DMT_UINT32, ACPI_SRAT0_OFFSET (Flags), "Flags (decoded below)"},
1365 {ACPI_DMT_FLAG0, ACPI_SRAT0_FLAG_OFFSET (Flags,0), "Enabled"},
1366 {ACPI_DMT_UINT8, ACPI_SRAT0_OFFSET (LocalSapicEid), "Local Sapic EID"},
1367 {ACPI_DMT_UINT24, ACPI_SRAT0_OFFSET (ProximityDomainHi[0]), "Proximity Domain High(24)"},
1368 {ACPI_DMT_UINT32, ACPI_SRAT0_OFFSET (ClockDomain), "Clock Domain"},
1369 {ACPI_DMT_EXIT, 0, NULL}
1370 };
1371
1372 /* 1: Memory Affinity */
1373
1374 ACPI_DMTABLE_INFO AcpiDmTableInfoSrat1[] =
1375 {
1376 {ACPI_DMT_UINT32, ACPI_SRAT1_OFFSET (ProximityDomain), "Proximity Domain"},
1377 {ACPI_DMT_UINT16, ACPI_SRAT1_OFFSET (Reserved), "Reserved"},
1378 {ACPI_DMT_UINT64, ACPI_SRAT1_OFFSET (BaseAddress), "Base Address"},
1379 {ACPI_DMT_UINT64, ACPI_SRAT1_OFFSET (Length), "Address Length"},
1380 {ACPI_DMT_UINT32, ACPI_SRAT1_OFFSET (Reserved1), "Reserved"},
1381 {ACPI_DMT_UINT32, ACPI_SRAT1_OFFSET (Flags), "Flags (decoded below)"},
1382 {ACPI_DMT_FLAG0, ACPI_SRAT1_FLAG_OFFSET (Flags,0), "Enabled"},
1383 {ACPI_DMT_FLAG1, ACPI_SRAT1_FLAG_OFFSET (Flags,0), "Hot Pluggable"},
1384 {ACPI_DMT_FLAG2, ACPI_SRAT1_FLAG_OFFSET (Flags,0), "Non-Volatile"},
1385 {ACPI_DMT_UINT64, ACPI_SRAT1_OFFSET (Reserved2), "Reserved"},
1386 {ACPI_DMT_EXIT, 0, NULL}
1387 };
1388
1389 /* 2: Processor Local X2_APIC Affinity (ACPI 4.0) */
1390
1391 ACPI_DMTABLE_INFO AcpiDmTableInfoSrat2[] =
1392 {
1393 {ACPI_DMT_UINT16, ACPI_SRAT2_OFFSET (Reserved), "Reserved"},
1394 {ACPI_DMT_UINT32, ACPI_SRAT2_OFFSET (ProximityDomain), "Proximity Domain"},
1395 {ACPI_DMT_UINT32, ACPI_SRAT2_OFFSET (ApicId), "Apic ID"},
1396 {ACPI_DMT_UINT32, ACPI_SRAT2_OFFSET (Flags), "Flags (decoded below)"},
1397 {ACPI_DMT_FLAG0, ACPI_SRAT2_FLAG_OFFSET (Flags,0), "Enabled"},
1398 {ACPI_DMT_UINT32, ACPI_SRAT2_OFFSET (ClockDomain), "Clock Domain"},
1399 {ACPI_DMT_UINT32, ACPI_SRAT2_OFFSET (Reserved2), "Reserved"},
1400 {ACPI_DMT_EXIT, 0, NULL}
1401 };
1402
1403
1404 /*******************************************************************************
1405 *
1406 * TCPA - Trusted Computing Platform Alliance table
1407 *
1408 ******************************************************************************/
1409
1410 ACPI_DMTABLE_INFO AcpiDmTableInfoTcpa[] =
1411 {
1412 {ACPI_DMT_UINT16, ACPI_TCPA_OFFSET (Reserved), "Reserved"},
1413 {ACPI_DMT_UINT32, ACPI_TCPA_OFFSET (MaxLogLength), "Max Event Log Length"},
1414 {ACPI_DMT_UINT64, ACPI_TCPA_OFFSET (LogAddress), "Event Log Address"},
1415 {ACPI_DMT_EXIT, 0, NULL}
1416 };
1417
1418
1419 /*******************************************************************************
1420 *
1421 * UEFI - UEFI Boot optimization Table
1422 *
1423 ******************************************************************************/
1424
1425 ACPI_DMTABLE_INFO AcpiDmTableInfoUefi[] =
1426 {
1427 {ACPI_DMT_BUF16, ACPI_UEFI_OFFSET (Identifier[0]), "UUID Identifier"},
1428 {ACPI_DMT_UINT16, ACPI_UEFI_OFFSET (DataOffset), "Data Offset"},
1429 {ACPI_DMT_EXIT, 0, NULL}
1430 };
1431
1432
1433 /*******************************************************************************
1434 *
1435 * WAET - Windows ACPI Emulated devices Table
1436 *
1437 ******************************************************************************/
1438
1439 ACPI_DMTABLE_INFO AcpiDmTableInfoWaet[] =
1440 {
1441 {ACPI_DMT_UINT32, ACPI_WAET_OFFSET (Flags), "Flags (decoded below)"},
1442 {ACPI_DMT_FLAG0, ACPI_WAET_OFFSET (Flags), "RTC needs no INT ack"},
1443 {ACPI_DMT_FLAG1, ACPI_WAET_OFFSET (Flags), "PM timer, one read only"},
1444 {ACPI_DMT_EXIT, 0, NULL}
1445 };
1446
1447
1448 /*******************************************************************************
1449 *
1450 * WDAT - Watchdog Action Table
1451 *
1452 ******************************************************************************/
1453
1454 ACPI_DMTABLE_INFO AcpiDmTableInfoWdat[] =
1455 {
1456 {ACPI_DMT_UINT32, ACPI_WDAT_OFFSET (HeaderLength), "Header Length"},
1457 {ACPI_DMT_UINT8, ACPI_WDAT_OFFSET (PciSegment), "PCI Segment"},
1458 {ACPI_DMT_UINT8, ACPI_WDAT_OFFSET (PciBus), "PCI Bus"},
1459 {ACPI_DMT_UINT8, ACPI_WDAT_OFFSET (PciDevice), "PCI Device"},
1460 {ACPI_DMT_UINT8, ACPI_WDAT_OFFSET (PciFunction), "PCI Function"},
1461 {ACPI_DMT_UINT24, ACPI_WDAT_OFFSET (Reserved[0]), "Reserved"},
1462 {ACPI_DMT_UINT32, ACPI_WDAT_OFFSET (TimerPeriod), "Timer Period"},
1463 {ACPI_DMT_UINT32, ACPI_WDAT_OFFSET (MaxCount), "Max Count"},
1464 {ACPI_DMT_UINT32, ACPI_WDAT_OFFSET (MinCount), "Min Count"},
1465 {ACPI_DMT_UINT8, ACPI_WDAT_OFFSET (Flags), "Flags (decoded below)"},
1466 {ACPI_DMT_FLAG0, ACPI_WDAT_OFFSET (Flags), "Enabled"},
1467 {ACPI_DMT_FLAG7, ACPI_WDAT_OFFSET (Flags), "Stopped When Asleep"},
1468 {ACPI_DMT_UINT24, ACPI_WDAT_OFFSET (Reserved2[0]), "Reserved"},
1469 {ACPI_DMT_UINT32, ACPI_WDAT_OFFSET (Entries), "Watchdog Entry Count"},
1470 {ACPI_DMT_EXIT, 0, NULL}
1471 };
1472
1473 /* WDAT Subtables - Watchdog Instruction Entries */
1474
1475 ACPI_DMTABLE_INFO AcpiDmTableInfoWdat0[] =
1476 {
1477 {ACPI_DMT_UINT8, ACPI_WDAT0_OFFSET (Action), "Watchdog Action"},
1478 {ACPI_DMT_UINT8, ACPI_WDAT0_OFFSET (Instruction), "Instruction"},
1479 {ACPI_DMT_UINT16, ACPI_WDAT0_OFFSET (Reserved), "Reserved"},
1480 {ACPI_DMT_GAS, ACPI_WDAT0_OFFSET (RegisterRegion), "Register Region"},
1481 {ACPI_DMT_UINT32, ACPI_WDAT0_OFFSET (Value), "Value"},
1482 {ACPI_DMT_UINT32, ACPI_WDAT0_OFFSET (Mask), "Register Mask"},
1483 {ACPI_DMT_EXIT, 0, NULL}
1484 };
1485
1486
1487 /*******************************************************************************
1488 *
1489 * WDRT - Watchdog Resource Table
1490 *
1491 ******************************************************************************/
1492
1493 ACPI_DMTABLE_INFO AcpiDmTableInfoWdrt[] =
1494 {
1495 {ACPI_DMT_GAS, ACPI_WDRT_OFFSET (ControlRegister), "Control Register"},
1496 {ACPI_DMT_GAS, ACPI_WDRT_OFFSET (CountRegister), "Count Register"},
1497 {ACPI_DMT_UINT16, ACPI_WDRT_OFFSET (PciDeviceId), "PCI Device ID"},
1498 {ACPI_DMT_UINT16, ACPI_WDRT_OFFSET (PciVendorId), "PCI Vendor ID"},
1499 {ACPI_DMT_UINT8, ACPI_WDRT_OFFSET (PciBus), "PCI Bus"},
1500 {ACPI_DMT_UINT8, ACPI_WDRT_OFFSET (PciDevice), "PCI Device"},
1501 {ACPI_DMT_UINT8, ACPI_WDRT_OFFSET (PciFunction), "PCI Function"},
1502 {ACPI_DMT_UINT8, ACPI_WDRT_OFFSET (PciSegment), "PCI Segment"},
1503 {ACPI_DMT_UINT16, ACPI_WDRT_OFFSET (MaxCount), "Max Count"},
1504 {ACPI_DMT_UINT8, ACPI_WDRT_OFFSET (Units), "Counter Units"},
1505 {ACPI_DMT_EXIT, 0, NULL}
1506 };
1507
NetBSD on the FriendlyARM MINI2440