?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
Expand PMF_FN_* macros.
[netbsd-mini2440.git] / dist / ntp / kernel / sys / tt560_api.h
blob2ceef4af3a10f3dbe58237f73d162231578ee0c8
1 /* $NetBSD$ */
2
3 /***********************************************************************
4 *
5 * Module: ttime_api.h
6 *
7 * Author: SIS 1998
8 * LM NE&SS 2001
9 *
10 * Description
11 *
12 * This header file contains data necessary for the API to the
13 * True Time board. This contains all of the structure definitions
14 * for the individual registers.
15 *
16 ***********************************************************************/
17 #ifndef TTIME_API_H
18 #define TTIME_API_H
19
20 #ifdef CPP
21 extern "C" {
22 #endif
23
24 #include <time.h>
25
26 typedef struct
27 {
28 unsigned int micro_sec;
29 unsigned int milli_sec;
30 struct tm gps_tm;
31 } gps_time_t;
32
33 typedef struct
34 {
35 unsigned char reserved_1;
36 unsigned unit_ms : 4;
37 unsigned filler_0 : 4;
38 unsigned hun_ms : 4;
39 unsigned tens_ms : 4;
40 unsigned tens_sec : 4;
41 unsigned unit_sec : 4;
42
43 unsigned tens_min : 4;
44 unsigned unit_min : 4;
45 unsigned tens_hour : 4;
46 unsigned unit_hour : 4;
47 unsigned tens_day : 4;
48 unsigned unit_day : 4;
49 unsigned filler_1 : 4;
50 unsigned hun_day : 4;
51
52 unsigned tens_year : 4;
53 unsigned unit_year : 4;
54 unsigned thou_year : 4;
55 unsigned hun_year : 4;
56 unsigned char reserved_2[2];
57 } preset_time_reg_t;
58
59 typedef struct
60 {
61 unsigned n_d0 : 2;
62 unsigned antenna_short_stat : 1; /* 0 = fault */
63 unsigned antenna_open_stat : 1; /* 0 = fault */
64 unsigned n_d1 : 1;
65 unsigned rate_gen_pulse_stat : 1;
66 unsigned time_cmp_pulse_stat : 1;
67 unsigned ext_event_stat : 1;
68
69 } hw_stat_reg_t;
70
71 typedef struct
72 {
73 unsigned tens_us : 4;
74 unsigned unit_us : 4;
75 unsigned unit_ms : 4;
76 unsigned hun_us : 4;
77 unsigned char hw_stat; /* hw_stat_reg_t hw_stat; */
78 unsigned char reserved_3;
79
80 unsigned hun_ms : 4;
81 unsigned tens_ms : 4;
82 unsigned tens_sec : 4;
83 unsigned unit_sec : 4;
84 unsigned tens_min : 4;
85 unsigned unit_min : 4;
86 unsigned tens_hour : 4;
87 unsigned unit_hour : 4;
88
89 unsigned tens_day : 4;
90 unsigned unit_day : 4;
91 unsigned status : 4;
92 unsigned hun_day : 4;
93 unsigned tens_year : 4;
94 unsigned unit_year : 4;
95 unsigned thou_year : 4;
96 unsigned hun_year : 4;
97 } time_freeze_reg_t;
98
99 typedef struct
100 {
101 unsigned char off_low;
102 unsigned char off_high;
103 unsigned char reserved_4[2];
104 } sync_gen_off_reg_t;
105
106 typedef struct
107 {
108 unsigned tens_min : 4;
109 unsigned unit_min : 4;
110 unsigned tens_hour : 4;
111 unsigned unit_hour : 4;
112 unsigned char sign_ascii; /* '+' or '-' */
113 unsigned char reserved_5;
114 } local_off_t;
115
116 /*
117 * This structure can be used for both the position freeze
118 * and position preset registers.
119 */
120 typedef struct
121 {
122 unsigned lat_tens_degee : 4;
123 unsigned lat_unit_degee : 4;
124 unsigned filler_0 : 4;
125 unsigned lat_hun_degree : 4;
126 unsigned lat_tens_min : 4;
127 unsigned lat_unit_min : 4;
128 unsigned char lat_north_south; /* 'N' or 'S' */
129
130 unsigned filler_1 : 4;
131 unsigned lat_tenth_sec : 4;
132 unsigned lat_tens_sec : 4;
133 unsigned lat_unit_sec : 4;
134 unsigned long_tens_degree : 4;
135 unsigned long_unit_degree : 4;
136 unsigned filler_2 : 4;
137 unsigned long_hun_degree : 4;
138
139 unsigned long_tens_min : 4;
140 unsigned long_unit_min : 4;
141 unsigned char long_east_west; /* 'E' or 'W' */
142 unsigned filler_3 : 4;
143 unsigned long_tenth_sec : 4;
144 unsigned long_tens_sec : 4;
145 unsigned long_unit_sec : 4;
146
147 unsigned elv_tens_km : 4;
148 unsigned elv_unit_km : 4;
149 unsigned char elv_sign; /* '+' or '-' */
150 unsigned elv_unit_m : 4;
151 unsigned elv_tenth_m : 4;
152 unsigned elv_hun_m : 4;
153 unsigned elv_tens_m : 4;
154 } pos_reg_t;
155
156 typedef struct
157 {
158 unsigned char prn1_tens_units;
159 unsigned char prn1_reserved;
160 unsigned char lvl1_tenths_hundredths;
161 unsigned char lvl1_tens_units;
162
163 unsigned char prn2_tens_units;
164 unsigned char prn2_reserved;
165 unsigned char lvl2_tenths_hundredths;
166 unsigned char lvl2_tens_units;
167
168 unsigned char prn3_tens_units;
169 unsigned char prn3_reserved;
170 unsigned char lvl3_tenths_hundredths;
171 unsigned char lvl3_tens_units;
172
173 unsigned char prn4_tens_units;
174 unsigned char prn4_reserved;
175 unsigned char lvl4_tenths_hundredths;
176 unsigned char lvl4_tens_units;
177
178 unsigned char prn5_tens_units;
179 unsigned char prn5_reserved;
180 unsigned char lvl5_tenths_hundredths;
181 unsigned char lvl5_tens_units;
182
183 unsigned char prn6_tens_units;
184 unsigned char prn6_reserved;
185 unsigned char lvl6_tenths_hundredths;
186 unsigned char lvl6_tens_units;
187
188 unsigned char flag;
189 unsigned char reserved[3];
190 } sig_levels_t;
191
192 typedef struct
193 {
194 unsigned tens_us : 4;
195 unsigned unit_us : 4;
196 unsigned unit_ms : 4;
197 unsigned hun_us : 4;
198 unsigned hun_ms : 4;
199 unsigned tens_ms : 4;
200 unsigned tens_sec : 4;
201 unsigned unit_sec : 4;
202
203 unsigned tens_min : 4;
204 unsigned unit_min : 4;
205 unsigned tens_hour : 4;
206 unsigned unit_hour : 4;
207 unsigned tens_day : 4;
208 unsigned unit_day : 4;
209 unsigned stat : 4;
210 unsigned hun_day : 4;
211
212 unsigned tens_year : 4;
213 unsigned unit_year : 4;
214 unsigned thou_year : 4;
215 unsigned hun_year : 4;
216 unsigned char reserved_5[2];
217 } ext_time_event_reg_t;
218
219 typedef struct
220 {
221 unsigned tens_us : 4;
222 unsigned unit_us : 4;
223 unsigned unit_ms : 4;
224 unsigned hun_us : 4;
225 unsigned hun_ms : 4;
226 unsigned tens_ms : 4;
227 unsigned tens_sec : 4;
228 unsigned unit_sec : 4;
229
230 unsigned tens_min : 4;
231 unsigned unit_min : 4;
232 unsigned tens_hour : 4;
233 unsigned unit_hour : 4;
234 unsigned tens_day : 4;
235 unsigned unit_day : 4;
236 unsigned mask : 4;
237 unsigned hun_day : 4;
238 } time_cmp_reg_t;
239
240 typedef struct
241 {
242 unsigned char err_stat;
243 unsigned char no_def;
244 unsigned char oscillator_stat[2];
245 } diag_reg_t;
246
247 typedef struct
248 {
249 unsigned res :2;
250 unsigned rate_int_mask :1;
251 unsigned cmp_int_mask :1;
252 unsigned ext_int_mask :1;
253 unsigned rate_stat_clr :1;
254 unsigned cmp_stat_clr :1;
255 unsigned ext_stat_clr :1;
256 unsigned char reserved[3];
257 } hw_ctl_reg_t;
258
259 typedef struct
260 {
261 unsigned preset_pos_rdy :1;
262 unsigned sel_pps_ref :1;
263 unsigned sel_gps_ref :1;
264 unsigned sel_time_code :1;
265 unsigned gen_stp_run :1;
266 unsigned preset_time_rdy :1;
267 unsigned dst :1;
268 unsigned mode_sel :1;
269
270 unsigned ctl_am_dc :1;
271 unsigned reserved :3;
272 unsigned input_code :4;
273
274 unsigned char rate_reserved;
275
276 unsigned rate_flag :4;
277 unsigned rate_reserved1 :4;
278 } conf_reg_t;
279
280 typedef struct
281 {
282 unsigned char mem_reserved[0xf8];
283
284 hw_ctl_reg_t hw_ctl_reg;
285
286 time_freeze_reg_t time_freeze_reg;
287
288 pos_reg_t pos_freeze_reg;
289
290 conf_reg_t conf_reg;
291
292 diag_reg_t diag_reg;
293
294 local_off_t local_offset;
295
296 sync_gen_off_reg_t sync_gen_offset;
297
298 unsigned char reserved[4];
299
300 unsigned char config_reg2_ctl;
301
302 unsigned char reserved2[11];
303
304 time_cmp_reg_t time_compare_reg;
305
306 unsigned char reserved3[24];
307
308 preset_time_reg_t preset_time_reg;
309
310 pos_reg_t preset_pos_reg;
311
312 ext_time_event_reg_t extern_time_event_reg;
313
314 unsigned char reserved4[24];
315
316 sig_levels_t signal_levels_reg;
317
318 unsigned char reserved5[12];
319 } tt_mem_space_t;
320
321 #define TTIME_MEMORY_SIZE 0x200
322
323 /*
324 * Defines for register offsets
325 */
326 #define HW_CTL_REG 0x0f8
327 #define TIME_FREEZE_REG 0x0fc
328 #define HW_STAT_REG 0x0fe
329 #define POS_FREEZE_REG 0x108
330 #define CONFIG_REG_1 0x118
331 #define DIAG_REG 0x11c
332 #define LOCAL_OFF_REG 0x120
333 #define SYNC_GEN_OFF_REG 0x124
334 #define CONFIG_REG_2 0x12c
335 #define TIME_CMP_REG 0x138
336 #define PRESET_TIME_REG 0x158
337 #define PRESET_POS_REG 0x164
338 #define EXT_EVENT_REG 0x174
339 #define SIG_LVL_PRN1 0x198
340 #define SIG_LVL_PRN2 0x19c
341 #define SIG_LVL_PRN3 0x1a0
342 #define SIG_LVL_PRN4 0x1a4
343 #define SIG_LVL_PRN5 0x1a8
344 #define SIG_LVL_PRN6 0x1ac
345 #define SIG_LVL_FLAG 0x1b0
346
347 /*
348 * Defines for accessing the hardware status register.
349 */
350 #define HW_STAT_ANTENNA_SHORT 0 /* access the antenna short bit */
351 #define HW_STAT_ANTENNA_OPEN 1 /* access the antenna open bit */
352 #define HW_STAT_RATE_GEN_PULSE_STAT 2 /* access the rate gen pulse bit */
353 #define HW_STAT_TIME_CMP_PULSE_STAT 3 /* access the time cmp bit */
354 #define HW_STAT_EXT_EVENT_STAT 4 /* access the external event bit */
355
356 /*
357 * Defines for accessing the hardware control register
358 */
359
360 #define HW_CTL_RATE_INT_MASK 0 /* access rate generator int mask */
361 #define HW_CTL_CMP_INT_MASK 1 /* access compare interrupt mask */
362 #define HW_CTL_EXT_INT_MASK 2 /* access external event interrupt mask */
363 #define HW_CTL_RATE_GEN_INT_CLEAR 3 /* access rate gen. interrupt clear field */
364 #define HW_CTL_TIME_CMP_INT_CLEAR 4 /* access time cmp interrupt clear field */
365 #define HW_CTL_EXT_EVENT_INT_CLEAR 5 /* access external event int clear field */
366
367 /*
368 * Defines for configuration register bit fields.
369 */
370 #define PRESET_POS_RDY_BIT 0 /* access the preset pos. rdy. bit */
371 #define SEL_1_PPS_REF_BIT 1 /* access the select 1 pps reference bit */
372 #define SEL_GPS_REF_BIT 2 /* access the select gps reference bit */
373 #define SEL_TIME_CODE_REF_BIT 3 /* access the select time code reference bit */
374 #define GEN_STOP_BIT 4 /* access the generator start/stop bit */
375 #define PRESET_TIME_RDY_BIT 5 /* access the preset time ready bit */
376 #define DST_BIT 6 /* access the DST bit */
377 #define MODE_SEL_BIT 7 /* access the mode select bit */
378 #define AM_DC_BIT 8 /* access the code bits AM/DC bit */
379 #define IN_CODE_SEL_BIT 9 /* access the input code select bit */
380 #define FLAG_BIT 10 /* access the flag bit */
381
382 /*
383 * The following defines are used to set modes in the
384 * configuration register.
385 */
386
387 #define CONF_SET_AM 0 /* Set code to AM */
388 #define CONF_SET_DC 1 /* Set code to DC */
389 #define CONF_SET_IRIG_B 0 /* Set code IRIG B */
390 #define CONF_SET_IRIG_A 1 /* Set code IRIG A */
391
392 #define CONF_FLAG_DISABLE 0 /* Disable pulse */
393 #define CONF_FLAG_10K_PPS 1 /* Set rate to 10k PPS */
394 #define CONF_FLAG_1K_PPS 2 /* Set rate to 1k PPS */
395 #define CONF_FLAG_100_PPS 3 /* Set rate to 100 PPS */
396 #define CONF_FLAG_10_PPS 4 /* Set rate to 10 PPS */
397 #define CONF_FLAG_1_PPS 5 /* Set rate to 1 PPS */
398
399 /*
400 * Defines for read commands
401 */
402
403 #define TT_RD_FREEZE_REG 0x01
404 #define TT_RD_HW_CTL_REG 0x02
405 #define TT_RD_CNFG_REG 0x03
406 #define TT_RD_DIAG_REG 0x04
407 #define TT_RD_LCL_OFFSET 0x05
408 #define TT_RD_SYNC_GEN_OFF 0x06
409 #define TT_RD_CNFG_REG_2 0x07
410 #define TT_RD_TIME_CMP_REG 0x08
411 #define TT_RD_PRESET_REG 0x09
412 #define TT_RD_EXT_EVNT_REG 0x0a
413 #define TT_RD_SIG_LVL_REG 0x0b
414
415 /*
416 * Defines for write commands
417 */
418 #define TT_WRT_FREEZE_REG 0x0c
419 #define TT_WRT_HW_CTL_REG 0x0d
420 #define TT_WRT_CNFG_REG 0x0e
421 #define TT_WRT_DIAG_REG 0x0f
422 #define TT_WRT_LCL_OFFSET 0x10
423 #define TT_WRT_SYNC_GEN_OFF 0x11
424 #define TT_WRT_CNFG_REG_2 0x12
425 #define TT_WRT_TIME_CMP_REG 0x13
426 #define TT_WRT_PRESET_REG 0x14
427 #define TT_WRT_EXT_EVNT_REG 0x15
428 #define TT_WRT_SIG_LVL_REG 0x16
429
430 /*
431 * Define the length of the buffers to move (in 32 bit words).
432 */
433
434 #define HW_CTL_REG_LEN 1
435 #define CNFG_REG_1_LEN 1
436 #define DIAG_REG_LEN 1
437 #define LCL_OFFSET_LEN 1
438 #define SYNC_GEN_OFF_LEN 1
439 #define CNFG_REG_2_LEN 1
440
441 #define TIME_CMP_REG_LEN 2
442 #define PRESET_TIME_REG_LEN 3
443 #define PRESET_POS_REG_LEN 4
444 #define PRESET_REG_LEN (PRESET_TIME_REG_LEN+PRESET_POS_REG_LEN)
445 #define TIME_FREEZE_REG_LEN 3
446 #define POSN_FREEZE_REG_LEN 4
447 #define FREEZE_REG_LEN (TIME_FREEZE_REG_LEN+POSN_FREEZE_REG_LEN)
448 #define EXT_EVNT_REG_LEN 3
449 #define SIG_LVL_REG_LEN 7
450 #define GPS_TIME_LEN 7
451
452 /*
453 * Define BCD - INT - BCD macros.
454 */
455
456 #define BCDTOI(a) ( ( ( ( (a) & 0xf0 ) >> 4 ) * 10 ) + ( (a) & 0x0f ) )
457 #define ITOBCD(a) ( ( ( ( (a) ) / 10) << 4 ) + ( ( (a) ) % 10) )
458 #define LTOBCD(a) ( ( ( ( (uint64_t)(a) ) / 10) << 4 ) + ( ( (uint64_t)(a) ) % 10) )
459
460 extern int init_560 ( );
461 extern void close_560 ( );
462 extern int write_hw_ctl_reg (hw_ctl_reg_t *);
463 extern int write_hw_ctl_reg_bitfield (int, int );
464 extern int read_conf_reg (conf_reg_t *);
465 extern int read_conf_reg_bitfield (int );
466 extern int write_conf_reg (conf_reg_t *);
467 extern int write_conf_reg_bitfield (int, unsigned char );
468 extern int read_hw_stat_reg_bitfield (int );
469 extern int read_local_offset_reg (local_off_t *);
470 extern int write_local_offset_reg (local_off_t *);
471 extern int read_sync_offset_reg (sync_gen_off_reg_t *);
472 extern int write_sync_offset_reg (sync_gen_off_reg_t *);
473 extern int read_time_cmp_reg (time_cmp_reg_t *);
474 extern int write_time_cmp_reg (time_cmp_reg_t *);
475 extern int read_preset_time_reg (preset_time_reg_t *);
476 extern int write_preset_time_reg (preset_time_reg_t *);
477 extern int reset_time ( );
478 extern int set_new_time (preset_time_reg_t *);
479 extern int read_preset_position_reg (pos_reg_t *);
480 extern int write_preset_position_reg (pos_reg_t *);
481 extern int read_external_event_reg (ext_time_event_reg_t *);
482 extern int read_signal_level_reg (sig_levels_t *);
483 extern int freeze_time ( );
484 extern int snapshot_time (time_freeze_reg_t *);
485 extern int read_position_freeze_reg (pos_reg_t *);
486 extern int read_diag_reg (diag_reg_t *);
487
488 #ifdef CPP
489 }
490 #endif
491 #endif
NetBSD on the FriendlyARM MINI2440