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Expand PMF_FN_* macros.
[netbsd-mini2440.git] / dist / ntp / ntpd / refclock_oncore.c
blob2b9214a48323965b71112115ee7dd05cfc95a324
1 /* $NetBSD: refclock_oncore.c,v 1.10 2007/01/06 19:45:23 kardel Exp $ */
2
3 /*
4 * ----------------------------------------------------------------------------
5 * "THE BEER-WARE LICENSE" (Revision 42):
6 * <phk@FreeBSD.ORG> wrote this file. As long as you retain this notice you
7 * can do whatever you want with this stuff. If we meet some day, and you think
8 * this stuff is worth it, you can buy me a beer in return. Poul-Henning Kamp
9 * ----------------------------------------------------------------------------
10 *
11 * refclock_oncore.c
12 *
13 * Driver for some of the various the Motorola Oncore GPS receivers.
14 * should work with Basic, PVT6, VP, UT, UT+, GT, GT+, SL, M12, M12+T
15 * The receivers with TRAIM (VP, UT, UT+, M12+T), will be more accurate
16 * than the others.
17 * The receivers without position hold (GT, GT+) will be less accurate.
18 *
19 * Tested with:
20 *
21 * (UT) (VP)
22 * COPYRIGHT 1991-1997 MOTOROLA INC. COPYRIGHT 1991-1996 MOTOROLA INC.
23 * SFTW P/N # 98-P36848P SFTW P/N # 98-P36830P
24 * SOFTWARE VER # 2 SOFTWARE VER # 8
25 * SOFTWARE REV # 2 SOFTWARE REV # 8
26 * SOFTWARE DATE APR 24 1998 SOFTWARE DATE 06 Aug 1996
27 * MODEL # R1121N1114 MODEL # B4121P1155
28 * HWDR P/N # 1 HDWR P/N # _
29 * SERIAL # R0010A SERIAL # SSG0226478
30 * MANUFACTUR DATE 6H07 MANUFACTUR DATE 7E02
31 * OPTIONS LIST IB
32 *
33 * (Basic) (M12)
34 * COPYRIGHT 1991-1994 MOTOROLA INC. COPYRIGHT 1991-2000 MOTOROLA INC.
35 * SFTW P/N # 98-P39949M SFTW P/N # 61-G10002A
36 * SOFTWARE VER # 5 SOFTWARE VER # 1
37 * SOFTWARE REV # 0 SOFTWARE REV # 3
38 * SOFTWARE DATE 20 JAN 1994 SOFTWARE DATE Mar 13 2000
39 * MODEL # A11121P116 MODEL # P143T12NR1
40 * HDWR P/N # _ HWDR P/N # 1
41 * SERIAL # SSG0049809 SERIAL # P003UD
42 * MANUFACTUR DATE 417AMA199 MANUFACTUR DATE 0C27
43 * OPTIONS LIST AB
44 *
45 * (M12+T) (M12+T later version)
46 * COPYRIGHT 1991-2002 MOTOROLA INC. COPYRIGHT 1991-2003 MOTOROLA INC.
47 * SFTW P/N # 61-G10268A SFTW P/N # 61-G10268A
48 * SOFTWARE VER # 2 SOFTWARE VER # 2
49 * SOFTWARE REV # 0 SOFTWARE REV # 1
50 * SOFTWARE DATE AUG 14 2002 SOFTWARE DATE APR 16 2003
51 * MODEL # P283T12T11 MODEL # P273T12T12
52 * HWDR P/N # 2 HWDR P/N # 2
53 * SERIAL # P04DC2 SERIAL # P05Z7Z
54 * MANUFACTUR DATE 2J17 MANUFACTUR DATE 3G15
55 *
56 * --------------------------------------------------------------------------
57 * Reg Clemens (Feb 2006)
58 * Fix some gcc4 compiler complaints
59 * Fix possible segfault in oncore_init_shmem
60 * change all (possible) fprintf(stderr, to record_clock_stats
61 * Apply patch from Russell J. Yount <rjy@cmu.edu> Fixed (new) MT12+T UTC not correct
62 * immediately after new Almanac Read.
63 * Apply patch for new PPS implementation by Rodolfo Giometti <giometti@linux.it>
64 * now code can use old Ulrich Windl <Ulrich.Windl@rz.uni-regensburg.de> or
65 * the new one. Compiles depending on timepps.h seen.
66 * --------------------------------------------------------------------------
67 * Luis Batanero Guerrero <luisba@rao.es> (Dec 2005) Patch for leap seconds
68 * (the oncore driver was setting the wrong ntpd variable)
69 * --------------------------------------------------------------------------
70 * Reg.Clemens (Mar 2004)
71 * Support for interfaces other than PPSAPI removed, for Solaris, SunOS,
72 * SCO, you now need to use one of the timepps.h files in the root dir.
73 * this driver will 'grab' it for you if you dont have one in /usr/include
74 * --------------------------------------------------------------------------
75 * This code uses the two devices
76 * /dev/oncore.serial.n
77 * /dev/oncore.pps.n
78 * which may be linked to the same device.
79 * and can read initialization data from the file
80 * /etc/ntp.oncoreN, /etc/ntp.oncore.N, or /etc/ntp.oncore, where
81 * n or N are the unit number, viz 127.127.30.N.
82 * --------------------------------------------------------------------------
83 * Reg.Clemens <reg@dwf.com> Sep98.
84 * Original code written for FreeBSD.
85 * With these mods it works on FreeBSD, SunOS, Solaris and Linux
86 * (SunOS 4.1.3 + ppsclock)
87 * (Solaris7 + MU4)
88 * (RedHat 5.1 2.0.35 + PPSKit, 2.1.126 + or later).
89 *
90 * Lat,Long,Ht, cable-delay, offset, and the ReceiverID (along with the
91 * state machine state) are printed to CLOCKSTATS if that file is enabled
92 * in /etc/ntp.conf.
93 *
94 * --------------------------------------------------------------------------
95 *
96 * According to the ONCORE manual (TRM0003, Rev 3.2, June 1998, page 3.13)
97 * doing an average of 10000 valid 2D and 3D fixes is what the automatic
98 * site survey mode does. Looking at the output from the receiver
99 * it seems like it is only using 3D fixes.
100 * When we do it ourselves, take 10000 3D fixes.
101 */
102
103 #define POS_HOLD_AVERAGE 10000 /* nb, 10000s ~= 2h45m */
104
105 /*
106 * ONCORE_SHMEM_STATUS will create a mmap(2)'ed file named according to a
107 * "STATUS" line in the oncore config file, which contains the most recent
108 * copy of all types of messages we recognize. This file can be mmap(2)'ed
109 * by monitoring and statistics programs.
110 *
111 * See separate HTML documentation for this option.
112 */
113
114 #ifdef HAVE_CONFIG_H
115 #include <config.h>
116 #endif
117
118 #if defined(REFCLOCK) && defined(CLOCK_ONCORE)
119
120 #include "ntpd.h"
121 #include "ntp_io.h"
122 #include "ntp_unixtime.h"
123 #include "ntp_refclock.h"
124 #include "ntp_stdlib.h"
125
126 #include <stdio.h>
127 #include <ctype.h>
128 #include <sys/stat.h>
129 #ifdef ONCORE_SHMEM_STATUS
130 # ifdef HAVE_SYS_MMAN_H
131 # include <sys/mman.h>
132 # ifndef MAP_FAILED
133 # define MAP_FAILED ((u_char *) -1)
134 # endif /* MAP_FAILED */
135 # endif /* HAVE_SYS_MMAN_H */
136 #endif /* ONCORE_SHMEM_STATUS */
137
138 #ifdef HAVE_PPSAPI
139 # include "ppsapi_timepps.h"
140 #endif
141
142 #ifdef HAVE_SYS_SIO_H
143 # include <sys/sio.h>
144 #endif
145
146 enum receive_state {
147 ONCORE_NO_IDEA,
148 ONCORE_CHECK_ID,
149 ONCORE_CHECK_CHAN,
150 ONCORE_HAVE_CHAN,
151 ONCORE_RESET_SENT,
152 ONCORE_TEST_SENT,
153 ONCORE_INIT,
154 ONCORE_ALMANAC,
155 ONCORE_RUN
156 };
157
158 enum site_survey_state {
159 ONCORE_SS_UNKNOWN,
160 ONCORE_SS_TESTING,
161 ONCORE_SS_HW,
162 ONCORE_SS_SW,
163 ONCORE_SS_DONE
164 };
165
166 enum antenna_state {
167 ONCORE_ANTENNA_UNKNOWN = -1,
168 ONCORE_ANTENNA_OK = 0,
169 ONCORE_ANTENNA_OC = 1,
170 ONCORE_ANTENNA_UC = 2,
171 ONCORE_ANTENNA_NV = 3
172 };
173
174 /* Model Name, derived from the @@Cj message.
175 * Used to initialize some variables.
176 */
177
178 enum oncore_model {
179 ONCORE_BASIC,
180 ONCORE_PVT6,
181 ONCORE_VP,
182 ONCORE_UT,
183 ONCORE_UTPLUS,
184 ONCORE_GT,
185 ONCORE_GTPLUS,
186 ONCORE_SL,
187 ONCORE_M12,
188 ONCORE_UNKNOWN
189 };
190
191 /* the bits that describe these properties are in the same place
192 * on the VP/UT, but have moved on the M12. As such we extract
193 * them, and use them from this struct.
194 *
195 */
196
197 struct RSM {
198 u_char posn0D;
199 u_char posn2D;
200 u_char posn3D;
201 u_char bad_almanac;
202 u_char bad_fix;
203 };
204
205 /* It is possible to test the VP/UT each cycle (@@Ea or equivalent) to
206 * see what mode it is in. The bits on the M12 are multiplexed with
207 * other messages, so we have to 'keep' the last known mode here.
208 */
209
210 enum posn_mode {
211 MODE_UNKNOWN,
212 MODE_0D,
213 MODE_2D,
214 MODE_3D
215 };
216
217 struct instance {
218 int unit; /* 127.127.30.unit */
219 struct refclockproc *pp;
220 struct peer *peer;
221
222 int ttyfd; /* TTY file descriptor */
223 int ppsfd; /* PPS file descriptor */
224 int shmemfd; /* Status shm descriptor */
225 pps_handle_t pps_h;
226 pps_params_t pps_p;
227 enum receive_state o_state; /* Receive state */
228 enum posn_mode mode; /* 0D, 2D, 3D */
229 enum site_survey_state site_survey; /* Site Survey state */
230 enum antenna_state ant_state; /* antenna state */
231
232 int Bj_day;
233
234 u_long delay; /* ns */
235 long offset; /* ns */
236
237 u_char *shmem;
238 char *shmem_fname;
239 u_int shmem_Cb;
240 u_int shmem_Ba;
241 u_int shmem_Ea;
242 u_int shmem_Ha;
243 u_char shmem_reset;
244 u_char shmem_Posn;
245 u_char shmem_bad_Ea;
246 u_char almanac_from_shmem;
247
248 double ss_lat;
249 double ss_long;
250 double ss_ht;
251 double dH;
252 int ss_count;
253 u_char posn_set;
254
255 enum oncore_model model;
256 u_int version;
257 u_int revision;
258
259 u_char chan; /* 6 for PVT6 or BASIC, 8 for UT/VP, 12 for m12, 0 if unknown */
260 s_char traim; /* do we have traim? yes UT/VP, M12+T, no BASIC, GT, M12, -1 unknown, 0 no, +1 yes */
261 /* the following 7 are all timing counters */
262 u_char traim_delay; /* seconds counter, waiting for reply */
263 u_char count; /* cycles thru Ea before starting */
264 u_char count1; /* cycles thru Ea after SS_TESTING, waiting for SS_HW */
265 u_char count2; /* cycles thru Ea after count, to check for @@Ea */
266 u_char count3; /* cycles thru Ea checking for # channels */
267 u_char count4; /* cycles thru leap after Gj to issue Bj */
268 u_char count5; /* cycles thru get_timestamp waiting for valid UTC correction */
269 u_char count5_set; /* only set count5 once */
270 u_char pollcnt;
271 u_char timeout; /* count to retry Cj after Fa self-test */
272
273 struct RSM rsm; /* bits extracted from Receiver Status Msg in @@Ea */
274 u_char printed;
275 u_char polled;
276 u_long ev_serial;
277 int Rcvptr;
278 u_char Rcvbuf[500];
279 u_char BEHa[160]; /* Ba, Ea or Ha */
280 u_char BEHn[80]; /* Bn , En , or Hn */
281 u_char Cj[300];
282 u_char Ag; /* Satellite mask angle */
283 u_char saw_At;
284 u_char saw_Ay;
285 u_char saw_Az;
286 s_char saw_Gj;
287 u_char have_dH;
288 u_char init_type;
289 s_char saw_tooth;
290 s_char chan_in; /* chan number from INPUT, will always use it */
291 u_char chan_id; /* chan number determined from part number */
292 u_char chan_ck; /* chan number determined by sending commands to hardware */
293 s_char traim_in; /* TRAIM from INPUT, will always use ON/OFF specified */
294 s_char traim_id; /* TRAIM determined from part number */
295 u_char traim_ck; /* TRAIM determined by sending commands to hardware */
296 u_char once; /* one pass code at top of BaEaHa */
297 s_char assert;
298 u_char hardpps;
299 };
300
301 #define rcvbuf instance->Rcvbuf
302 #define rcvptr instance->Rcvptr
303
304 static int oncore_start P((int, struct peer *));
305 static void oncore_poll P((int, struct peer *));
306 static void oncore_shutdown P((int, struct peer *));
307 static void oncore_consume P((struct instance *));
308 static void oncore_read_config P((struct instance *));
309 static void oncore_receive P((struct recvbuf *));
310 static int oncore_ppsapi P((struct instance *));
311 static void oncore_get_timestamp P((struct instance *, long, long));
312 static void oncore_init_shmem P((struct instance *));
313
314 static void oncore_antenna_report P((struct instance *, enum antenna_state));
315 static void oncore_chan_test P((struct instance *));
316 static void oncore_check_almanac P((struct instance *));
317 static void oncore_check_antenna P((struct instance *));
318 static void oncore_check_leap_sec P((struct instance *));
319 static int oncore_checksum_ok P((u_char *, int));
320 static void oncore_compute_dH P((struct instance *));
321 static void oncore_load_almanac P((struct instance *));
322 static void oncore_print_Cb P((struct instance *, u_char *));
323 /* static void oncore_print_array P((u_char *, int)); */
324 static void oncore_print_posn P((struct instance *));
325 static void oncore_sendmsg P((int, u_char *, size_t));
326 static void oncore_set_posn P((struct instance *));
327 static void oncore_set_traim P((struct instance *));
328 static void oncore_shmem_get_3D P((struct instance *));
329 static void oncore_ss P((struct instance *));
330 static int oncore_wait_almanac P((struct instance *));
331
332 static void oncore_msg_any P((struct instance *, u_char *, size_t, int));
333 static void oncore_msg_Adef P((struct instance *, u_char *, size_t));
334 static void oncore_msg_Ag P((struct instance *, u_char *, size_t));
335 static void oncore_msg_As P((struct instance *, u_char *, size_t));
336 static void oncore_msg_At P((struct instance *, u_char *, size_t));
337 static void oncore_msg_Ay P((struct instance *, u_char *, size_t));
338 static void oncore_msg_Az P((struct instance *, u_char *, size_t));
339 static void oncore_msg_BaEaHa P((struct instance *, u_char *, size_t));
340 static void oncore_msg_Bd P((struct instance *, u_char *, size_t));
341 static void oncore_msg_Bj P((struct instance *, u_char *, size_t));
342 static void oncore_msg_BnEnHn P((struct instance *, u_char *, size_t));
343 static void oncore_msg_CaFaIa P((struct instance *, u_char *, size_t));
344 static void oncore_msg_Cb P((struct instance *, u_char *, size_t));
345 static void oncore_msg_Cf P((struct instance *, u_char *, size_t));
346 static void oncore_msg_Cj P((struct instance *, u_char *, size_t));
347 static void oncore_msg_Cj_id P((struct instance *, u_char *, size_t));
348 static void oncore_msg_Cj_init P((struct instance *, u_char *, size_t));
349 static void oncore_msg_Ga P((struct instance *, u_char *, size_t));
350 static void oncore_msg_Gb P((struct instance *, u_char *, size_t));
351 static void oncore_msg_Gj P((struct instance *, u_char *, size_t));
352 static void oncore_msg_Sz P((struct instance *, u_char *, size_t));
353
354 struct refclock refclock_oncore = {
355 oncore_start, /* start up driver */
356 oncore_shutdown, /* shut down driver */
357 oncore_poll, /* transmit poll message */
358 noentry, /* not used */
359 noentry, /* not used */
360 noentry, /* not used */
361 NOFLAGS /* not used */
362 };
363
364 /*
365 * Understanding the next bit here is not easy unless you have a manual
366 * for the the various Oncore Models.
367 */
368
369 static struct msg_desc {
370 const char flag[3];
371 const int len;
372 void (*handler) P((struct instance *, u_char *, size_t));
373 const char *fmt;
374 int shmem;
375 } oncore_messages[] = {
376 /* Ea and En first since they're most common */
377 { "Ea", 76, oncore_msg_BaEaHa, "mdyyhmsffffaaaaoooohhhhmmmmvvhhddtntimsdimsdimsdimsdimsdimsdimsdimsdsC" },
378 { "Ba", 68, oncore_msg_BaEaHa, "mdyyhmsffffaaaaoooohhhhmmmmvvhhddtntimsdimsdimsdimsdimsdimsdsC" },
379 { "Ha", 154, oncore_msg_BaEaHa, "mdyyhmsffffaaaaoooohhhhmmmmaaaaoooohhhhmmmmVVvvhhddntimsiddimsiddimsiddimsiddimsiddimsiddimsiddimsiddimsiddimsiddimsiddimsiddssrrccooooTTushmvvvvvvC" },
380 { "Bn", 59, oncore_msg_BnEnHn, "otaapxxxxxxxxxxpysreensffffsffffsffffsffffsffffsffffC" },
381 { "En", 69, oncore_msg_BnEnHn, "otaapxxxxxxxxxxpysreensffffsffffsffffsffffsffffsffffsffffsffffC" },
382 { "Hn", 78, oncore_msg_BnEnHn, "" },
383 { "Ab", 10, 0, "" },
384 { "Ac", 11, 0, "" },
385 { "Ad", 11, oncore_msg_Adef, "" },
386 { "Ae", 11, oncore_msg_Adef, "" },
387 { "Af", 15, oncore_msg_Adef, "" },
388 { "Ag", 8, oncore_msg_Ag, "" }, /* Satellite mask angle */
389 { "As", 20, oncore_msg_As, "" },
390 { "At", 8, oncore_msg_At, "" },
391 { "Au", 12, 0, "" },
392 { "Av", 8, 0, "" },
393 { "Aw", 8, 0, "" },
394 { "Ay", 11, oncore_msg_Ay, "" },
395 { "Az", 11, oncore_msg_Az, "" },
396 { "AB", 8, 0, "" },
397 { "Bb", 92, 0, "" },
398 { "Bd", 23, oncore_msg_Bd, "" },
399 { "Bj", 8, oncore_msg_Bj, "" },
400 { "Ca", 9, oncore_msg_CaFaIa, "" },
401 { "Cb", 33, oncore_msg_Cb, "" },
402 { "Cf", 7, oncore_msg_Cf, "" },
403 { "Cg", 8, 0, "" },
404 { "Ch", 9, 0, "" },
405 { "Cj", 294, oncore_msg_Cj, "" },
406 { "Ek", 71, 0, "" },
407 { "Fa", 9, oncore_msg_CaFaIa, "" },
408 { "Ga", 20, oncore_msg_Ga, "" },
409 { "Gb", 17, oncore_msg_Gb, "" },
410 { "Gc", 8, 0, "" },
411 { "Gd", 8, 0, "" },
412 { "Ge", 8, 0, "" },
413 { "Gj", 21, oncore_msg_Gj, "" },
414 { "Ia", 10, oncore_msg_CaFaIa, "" },
415 { "Sz", 8, oncore_msg_Sz, "" },
416 { {0}, 7, 0, "" }
417 };
418
419
420 static u_char oncore_cmd_Aa[] = { 'A', 'a', 0, 0, 0 }; /* 6/8 Time of Day */
421 static u_char oncore_cmd_Ab[] = { 'A', 'b', 0, 0, 0 }; /* 6/8 GMT Correction */
422 static u_char oncore_cmd_AB[] = { 'A', 'B', 4 }; /* VP Application Type: Static */
423 static u_char oncore_cmd_Ac[] = { 'A', 'c', 0, 0, 0, 0 }; /* 6/8 Date */
424 static u_char oncore_cmd_Ad[] = { 'A', 'd', 0,0,0,0 }; /* 6/8 Latitude */
425 static u_char oncore_cmd_Ae[] = { 'A', 'e', 0,0,0,0 }; /* 6/8 Longitude */
426 static u_char oncore_cmd_Af[] = { 'A', 'f', 0,0,0,0, 0 }; /* 6/8 Height */
427 static u_char oncore_cmd_Ag[] = { 'A', 'g', 0 }; /* 6/8/12 Satellite Mask Angle */
428 static u_char oncore_cmd_Agx[] = { 'A', 'g', 0xff }; /* 6/8/12 Satellite Mask Angle: read */
429 static u_char oncore_cmd_As[] = { 'A', 's', 0,0,0,0, 0,0,0,0, 0,0,0,0, 0 }; /* 6/8/12 Posn Hold Parameters */
430 static u_char oncore_cmd_Asx[] = { 'A', 's', 0x7f,0xff,0xff,0xff, /* 6/8/12 Posn Hold Readback */
431 0x7f,0xff,0xff,0xff, /* on UT+ this doesnt work with 0xff */
432 0x7f,0xff,0xff,0xff, 0xff }; /* but does work with 0x7f (sigh). */
433 static u_char oncore_cmd_At0[] = { 'A', 't', 0 }; /* 6/8 Posn Hold: off */
434 static u_char oncore_cmd_At1[] = { 'A', 't', 1 }; /* 6/8 Posn Hold: on */
435 static u_char oncore_cmd_At2[] = { 'A', 't', 2 }; /* 6/8 Posn Hold: Start Site Survey */
436 static u_char oncore_cmd_Atx[] = { 'A', 't', 0xff }; /* 6/8 Posn Hold: Read Back */
437 static u_char oncore_cmd_Au[] = { 'A', 'u', 0,0,0,0, 0 }; /* GT/M12 Altitude Hold Ht. */
438 static u_char oncore_cmd_Av0[] = { 'A', 'v', 0 }; /* VP/GT Altitude Hold: off */
439 static u_char oncore_cmd_Av1[] = { 'A', 'v', 1 }; /* VP/GT Altitude Hold: on */
440 static u_char oncore_cmd_Aw[] = { 'A', 'w', 1 }; /* 6/8/12 UTC/GPS time selection */
441 static u_char oncore_cmd_Ay[] = { 'A', 'y', 0, 0, 0, 0 }; /* Timing 1PPS time offset: set */
442 static u_char oncore_cmd_Ayx[] = { 'A', 'y', 0xff, 0xff, 0xff, 0xff }; /* Timing 1PPS time offset: Read */
443 static u_char oncore_cmd_Az[] = { 'A', 'z', 0, 0, 0, 0 }; /* 6/8UT/12 1PPS Cable Delay: set */
444 static u_char oncore_cmd_Azx[] = { 'A', 'z', 0xff, 0xff, 0xff, 0xff }; /* 6/8UT/12 1PPS Cable Delay: Read */
445 static u_char oncore_cmd_Ba0[] = { 'B', 'a', 0 }; /* 6 Position/Data/Status: off */
446 static u_char oncore_cmd_Ba[] = { 'B', 'a', 1 }; /* 6 Position/Data/Status: on */
447 static u_char oncore_cmd_Bb[] = { 'B', 'b', 1 }; /* 6/8/12 Visible Satellites */
448 static u_char oncore_cmd_Bd[] = { 'B', 'd', 1 }; /* 6/8/12? Almanac Status Msg. */
449 static u_char oncore_cmd_Be[] = { 'B', 'e', 1 }; /* 6/8/12 Request Almanac Data */
450 static u_char oncore_cmd_Bj[] = { 'B', 'j', 0 }; /* 6/8 Leap Second Pending */
451 static u_char oncore_cmd_Bn0[] = { 'B', 'n', 0, 1, 0,10, 2, 0,0,0, 0,0,0,0,0,0,0 }; /* 6 TRAIM setup/status: msg off, traim on */
452 static u_char oncore_cmd_Bn[] = { 'B', 'n', 1, 1, 0,10, 2, 0,0,0, 0,0,0,0,0,0,0 }; /* 6 TRAIM setup/status: msg on, traim on */
453 static u_char oncore_cmd_Bnx[] = { 'B', 'n', 0, 0, 0,10, 2, 0,0,0, 0,0,0,0,0,0,0 }; /* 6 TRAIM setup/status: msg off, traim off */
454 static u_char oncore_cmd_Ca[] = { 'C', 'a' }; /* 6 Self Test */
455 static u_char oncore_cmd_Cf[] = { 'C', 'f' }; /* 6/8/12 Set to Defaults */
456 static u_char oncore_cmd_Cg[] = { 'C', 'g', 1 }; /* VP Posn Fix/Idle Mode */
457 static u_char oncore_cmd_Cj[] = { 'C', 'j' }; /* 6/8/12 Receiver ID */
458 static u_char oncore_cmd_Ea0[] = { 'E', 'a', 0 }; /* 8 Position/Data/Status: off */
459 static u_char oncore_cmd_Ea[] = { 'E', 'a', 1 }; /* 8 Position/Data/Status: on */
460 static u_char oncore_cmd_Ek[] = { 'E', 'k', 0 }; /* just turn off */ /* 8 Posn/Status/Data - extension */
461 static u_char oncore_cmd_En0[] = { 'E', 'n', 0, 1, 0,10, 2, 0,0,0, 0,0,0,0,0,0,0 }; /* 8/GT TRAIM setup/status: msg off, traim on */
462 static u_char oncore_cmd_En[] = { 'E', 'n', 1, 1, 0,10, 2, 0,0,0, 0,0,0,0,0,0,0 }; /* 8/GT TRAIM setup/status: msg on, traim on */
463 static u_char oncore_cmd_Enx[] = { 'E', 'n', 0, 0, 0,10, 2, 0,0,0, 0,0,0,0,0,0,0 }; /* 8/GT TRAIM setup/status: msg off, traim off */
464 static u_char oncore_cmd_Fa[] = { 'F', 'a' }; /* 8 Self Test */
465 static u_char oncore_cmd_Ga[] = { 'G', 'a', 0,0,0,0, 0,0,0,0, 0,0,0,0, 0 }; /* 12 Position Set */
466 static u_char oncore_cmd_Gax[] = { 'G', 'a', 0xff, 0xff, 0xff, 0xff, /* 12 Position Set: Read */
467 0xff, 0xff, 0xff, 0xff, /* */
468 0xff, 0xff, 0xff, 0xff, 0xff }; /* */
469 static u_char oncore_cmd_Gb[] = { 'G', 'b', 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }; /* 12 set Date/Time */
470 static u_char oncore_cmd_Gc[] = { 'G', 'c', 1 }; /* 12 PPS Control: On Cont */
471 static u_char oncore_cmd_Gd0[] = { 'G', 'd', 0 }; /* 12 Position Control: 3D (no hold) */
472 static u_char oncore_cmd_Gd1[] = { 'G', 'd', 1 }; /* 12 Position Control: 0D (3D hold) */
473 static u_char oncore_cmd_Gd2[] = { 'G', 'd', 2 }; /* 12 Position Control: 2D (Alt Hold) */
474 static u_char oncore_cmd_Gd3[] = { 'G', 'd', 3 }; /* 12 Position Coltrol: Start Site Survey */
475 static u_char oncore_cmd_Ge0[] = { 'G', 'e', 0 }; /* M12+T TRAIM: off */
476 static u_char oncore_cmd_Ge[] = { 'G', 'e', 1 }; /* M12+T TRAIM: on */
477 static u_char oncore_cmd_Gj[] = { 'G', 'j' }; /* 8?/12 Leap Second Pending */
478 static u_char oncore_cmd_Ha0[] = { 'H', 'a', 0 }; /* 12 Position/Data/Status: off */
479 static u_char oncore_cmd_Ha[] = { 'H', 'a', 1 }; /* 12 Position/Data/Status: on */
480 static u_char oncore_cmd_Hn0[] = { 'H', 'n', 0 }; /* 12 TRAIM Status: off */
481 static u_char oncore_cmd_Hn[] = { 'H', 'n', 1 }; /* 12 TRAIM Status: on */
482 static u_char oncore_cmd_Ia[] = { 'I', 'a' }; /* 12 Self Test */
483
484 /* it appears that as of 1997/1998, the UT had As,At, but not Au,Av
485 * the GT had Au,Av, but not As,At
486 * This was as of v2.0 of both firmware sets. possibly 1.3 for UT.
487 * Bj in UT at v1.3
488 * dont see Bd in UT/GT thru 1999
489 * Gj in UT as of 3.0, 1999 , Bj as of 1.3
490 */
491
492 static char *Month[] = {"Jan", "Feb", "Mar", "Apr", "May", "Jun", "Jly",
493 "Aug", "Sep", "Oct", "Nov", "Dec" };
494
495 #define DEVICE1 "/dev/oncore.serial.%d" /* name of serial device */
496 #define DEVICE2 "/dev/oncore.pps.%d" /* name of pps device */
497
498 #define SPEED B9600 /* Oncore Binary speed (9600 bps) */
499
500 /*
501 * Assemble and disassemble 32bit signed quantities from a buffer.
502 *
503 */
504
505 /* to buffer, int w, u_char *buf */
506 #define w32_buf(buf,w) { u_int i_tmp; \
507 i_tmp = (w<0) ? (~(-w)+1) : (w); \
508 (buf)[0] = (i_tmp >> 24) & 0xff; \
509 (buf)[1] = (i_tmp >> 16) & 0xff; \
510 (buf)[2] = (i_tmp >> 8) & 0xff; \
511 (buf)[3] = (i_tmp ) & 0xff; \
512 }
513
514 #define w32(buf) (((buf)[0]&0xff) << 24 | \
515 ((buf)[1]&0xff) << 16 | \
516 ((buf)[2]&0xff) << 8 | \
517 ((buf)[3]&0xff) )
518
519 /* from buffer, char *buf, result to an int */
520 #define buf_w32(buf) (((buf)[0]&0200) ? (-(~w32(buf)+1)) : w32(buf))
521
522
523 /*
524 * oncore_start - initialize data for processing
525 */
526
527 static int
528 oncore_start(
529 int unit,
530 struct peer *peer
531 )
532 {
533 #define STRING_LEN 32
534 register struct instance *instance;
535 struct refclockproc *pp;
536 int fd1, fd2, num;
537 char device1[STRING_LEN], device2[STRING_LEN], Msg[160];
538 const char *cp;
539 struct stat stat1, stat2;
540
541 /* create instance structure for this unit */
542
543 if (!(instance = (struct instance *) malloc(sizeof *instance))) {
544 perror("malloc");
545 return (0);
546 }
547 memset((char *) instance, 0, sizeof *instance);
548
549 /* initialize miscellaneous variables */
550
551 pp = peer->procptr;
552 pp->unitptr = (caddr_t) instance;
553 instance->pp = pp;
554 instance->unit = unit;
555 instance->peer = peer;
556 instance->assert = 1;
557 instance->once = 1;
558
559 instance->Bj_day = -1;
560 instance->traim = -1;
561 instance->traim_in = -1;
562 instance->chan_in = -1;
563 instance->model = ONCORE_UNKNOWN;
564 instance->mode = MODE_UNKNOWN;
565 instance->site_survey = ONCORE_SS_UNKNOWN;
566 instance->Ag = 0xff; /* Satellite mask angle, unset by user */
567 instance->ant_state = ONCORE_ANTENNA_UNKNOWN;
568
569 peer->precision = -26;
570 peer->minpoll = 4;
571 peer->maxpoll = 4;
572 pp->clockdesc = "Motorola Oncore GPS Receiver";
573 memcpy((char *)&pp->refid, "GPS\0", (size_t) 4);
574
575 cp = "ONCORE DRIVER -- CONFIGURING";
576 record_clock_stats(&(instance->peer->srcadr), cp);
577
578 instance->o_state = ONCORE_NO_IDEA;
579 cp = "state = ONCORE_NO_IDEA";
580 record_clock_stats(&(instance->peer->srcadr), cp);
581
582 /* Now open files.
583 * This is a bit complicated, a we dont want to open the same file twice
584 * (its a problem on some OS), and device2 may not exist for the new PPS
585 */
586
587 (void)sprintf(device1, DEVICE1, unit);
588 (void)sprintf(device2, DEVICE2, unit);
589
590 /* OPEN DEVICES */
591 /* opening different devices for fd1 and fd2 presents no problems */
592 /* opening the SAME device twice, seems to be OS dependent.
593 (a) on Linux (no streams) no problem
594 (b) on SunOS (and possibly Solaris, untested), (streams)
595 never see the line discipline.
596 Since things ALWAYS work if we only open the device once, we check
597 to see if the two devices are in fact the same, then proceed to
598 do one open or two.
599 */
600
601 if (stat(device1, &stat1)) {
602 sprintf(Msg, "Can't stat fd1 (%s)\n", device1);
603 record_clock_stats(&(instance->peer->srcadr), Msg);
604 exit(1);
605 }
606
607 if (stat(device2, &stat2)) {
608 sprintf(Msg, "Can't stat fd2 (%s)\n", device2);
609 record_clock_stats(&(instance->peer->srcadr), Msg);
610 exit(1);
611 }
612
613 if (!(fd1 = refclock_open(device1, SPEED, LDISC_RAW))) {
614 sprintf(Msg, "Can't open fd1 (%s)\n", device1);
615 record_clock_stats(&(instance->peer->srcadr), Msg);
616 exit(1);
617 }
618
619 if ((stat1.st_dev == stat2.st_dev) && (stat1.st_ino == stat2.st_ino)) /* same device here */
620 fd2 = fd1;
621 else { /* different devices here */
622 if ((fd2=open(device2, O_RDWR)) < 0) {
623 sprintf(Msg, "Can't open fd2 (%s)\n", device2);
624 record_clock_stats(&(instance->peer->srcadr), Msg);
625 exit(1);
626 }
627 }
628 num = fd2;
629
630 /* open ppsapi soure */
631
632 if (time_pps_create(num, &instance->pps_h) < 0) {
633 record_clock_stats(&(instance->peer->srcadr), "PPSAPI not found in kernel");
634 return(0);
635 }
636
637 /* continue initialization */
638
639 instance->ttyfd = fd1;
640 instance->ppsfd = fd2;
641
642 /* go read any input data in /etc/ntp.oncoreX or /etc/ntp/oncore.X */
643
644 oncore_read_config(instance);
645
646 if (!oncore_ppsapi(instance))
647 return(0);
648
649 pp->io.clock_recv = oncore_receive;
650 pp->io.srcclock = (caddr_t)peer;
651 pp->io.datalen = 0;
652 pp->io.fd = fd1;
653 if (!io_addclock(&pp->io)) {
654 record_clock_stats(&(instance->peer->srcadr), "ONCORE: io_addclock");
655 (void) close(fd1);
656 free(instance);
657 return (0);
658 }
659
660 #ifdef ONCORE_SHMEM_STATUS
661 /*
662 * Before starting ONCORE, lets setup SHMEM
663 * This will include merging an old SHMEM into the new one if
664 * an old one is found.
665 */
666
667 oncore_init_shmem(instance);
668 #endif
669
670 /*
671 * This will return the Model of the Oncore receiver.
672 * and start the Initialization loop in oncore_msg_Cj.
673 */
674
675 instance->o_state = ONCORE_CHECK_ID;
676 cp = "state = ONCORE_CHECK_ID";
677 record_clock_stats(&(instance->peer->srcadr), cp);
678
679 instance->timeout = 4;
680 oncore_sendmsg(instance->ttyfd, oncore_cmd_Cg, sizeof(oncore_cmd_Cg)); /* Set Posn Fix mode (not Idle (VP)) */
681 oncore_sendmsg(instance->ttyfd, oncore_cmd_Cj, sizeof(oncore_cmd_Cj));
682
683 instance->pollcnt = 2;
684 return (1);
685 }
686
687
688 /*
689 * oncore_shutdown - shut down the clock
690 */
691
692 static void
693 oncore_shutdown(
694 int unit,
695 struct peer *peer
696 )
697 {
698 register struct instance *instance;
699 struct refclockproc *pp;
700
701 pp = peer->procptr;
702 instance = (struct instance *) pp->unitptr;
703
704 io_closeclock(&pp->io);
705
706 time_pps_destroy (instance->pps_h);
707
708 close(instance->ttyfd);
709
710 if ((instance->ppsfd != -1) && (instance->ppsfd != instance->ttyfd))
711 close(instance->ppsfd);
712
713 if (instance->shmemfd)
714 close(instance->shmemfd);
715
716 free(instance);
717 }
718
719
720
721 /*
722 * oncore_poll - called by the transmit procedure
723 */
724
725 static void
726 oncore_poll(
727 int unit,
728 struct peer *peer
729 )
730 {
731 struct instance *instance;
732
733 instance = (struct instance *) peer->procptr->unitptr;
734 if (instance->timeout) {
735 char *cp;
736
737 instance->timeout--;
738 if (instance->timeout == 0) {
739 cp = "Oncore: No response from @@Cj, shutting down driver";
740 record_clock_stats(&(instance->peer->srcadr), cp);
741 oncore_shutdown(unit, peer);
742 } else {
743 oncore_sendmsg(instance->ttyfd, oncore_cmd_Cj, sizeof(oncore_cmd_Cj));
744 cp = "Oncore: Resend @@Cj";
745 record_clock_stats(&(instance->peer->srcadr), cp);
746 }
747 return;
748 }
749
750 if (!instance->pollcnt)
751 refclock_report(peer, CEVNT_TIMEOUT);
752 else
753 instance->pollcnt--;
754 peer->procptr->polls++;
755 instance->polled = 1;
756 }
757
758
759
760 /*
761 * Initialize PPSAPI
762 */
763
764 static int
765 oncore_ppsapi(
766 struct instance *instance
767 )
768 {
769 int cap, mode, mode1;
770 char *cp, Msg[160];
771
772 if (time_pps_getcap(instance->pps_h, &cap) < 0) {
773 msyslog(LOG_ERR, "time_pps_getcap failed: %m");
774 return (0);
775 }
776
777 if (time_pps_getparams(instance->pps_h, &instance->pps_p) < 0) {
778 msyslog(LOG_ERR, "time_pps_getparams failed: %m");
779 return (0);
780 }
781
782 /* nb. only turn things on, if someone else has turned something
783 * on before we get here, leave it alone!
784 */
785
786 if (instance->assert) {
787 cp = "Assert.";
788 mode = PPS_CAPTUREASSERT;
789 mode1 = PPS_OFFSETASSERT;
790 } else {
791 cp = "Clear.";
792 mode = PPS_CAPTURECLEAR;
793 mode1 = PPS_OFFSETCLEAR;
794 }
795 sprintf(Msg, "Initializing timeing to %s.", cp);
796 record_clock_stats(&(instance->peer->srcadr), Msg);
797
798 if (!(mode & cap)) {
799 sprintf(Msg, "Can't set timeing to %s, exiting...", cp);
800 record_clock_stats(&(instance->peer->srcadr), Msg);
801 return(0);
802 }
803
804 if (!(mode1 & cap)) {
805 sprintf(Msg, "Can't set PPS_%sCLEAR, this will increase jitter.", cp);
806 record_clock_stats(&(instance->peer->srcadr), Msg);
807 mode1 = 0;
808 }
809
810 /* only set what is legal */
811
812 instance->pps_p.mode = (mode | mode1 | PPS_TSFMT_TSPEC) & cap;
813
814 if (time_pps_setparams(instance->pps_h, &instance->pps_p) < 0) {
815 record_clock_stats(&(instance->peer->srcadr), "ONCORE: time_pps_setparams fails");
816 exit(1);
817 }
818
819 /* If HARDPPS is on, we tell kernel */
820
821 if (instance->hardpps) {
822 int i;
823
824 record_clock_stats(&(instance->peer->srcadr), "HARDPPS Set.");
825
826 if (instance->assert)
827 i = PPS_CAPTUREASSERT;
828 else
829 i = PPS_CAPTURECLEAR;
830
831 /* we know that 'i' is legal from above */
832
833 if (time_pps_kcbind(instance->pps_h, PPS_KC_HARDPPS, i,
834 PPS_TSFMT_TSPEC) < 0) {
835 msyslog(LOG_ERR, "time_pps_kcbind failed: %m");
836 record_clock_stats(&(instance->peer->srcadr), "HARDPPS failed, abort...");
837 return (0);
838 }
839 pps_enable = 1;
840 }
841 return(1);
842 }
843
844
845
846 #ifdef ONCORE_SHMEM_STATUS
847 static void
848 oncore_init_shmem(
849 struct instance *instance
850 )
851 {
852 int i, l, n, fd, shmem_old_size, n1;
853 char Msg[160];
854 u_char *cp, *cp1, *buf, *shmem_old;
855 struct msg_desc *mp;
856 struct stat sbuf;
857 size_t shmem_length;
858
859 /*
860 * The first thing we do is see if there is an instance->shmem_fname file (still)
861 * out there from a previous run. If so, we copy it in and use it to initialize
862 * shmem (so we won't lose our almanac if we need it).
863 */
864
865 shmem_old = 0;
866 shmem_old_size = 0;
867 if ((fd = open(instance->shmem_fname, O_RDONLY)) < 0)
868 record_clock_stats(&(instance->peer->srcadr), "ONCORE: Can't open SHMEM file");
869 else {
870 fstat(fd, &sbuf);
871 shmem_old_size = sbuf.st_size;
872 if (shmem_old_size != 0) {
873 shmem_old = (u_char *) malloc((unsigned) sbuf.st_size);
874 if (shmem_old == NULL)
875 record_clock_stats(&(instance->peer->srcadr), "ONCORE: Can't malloc buffer for shmem_old");
876 else
877 read(fd, shmem_old, shmem_old_size);
878 }
879 close(fd);
880 }
881
882 /* OK, we now create the NEW SHMEM. */
883
884 if ((instance->shmemfd = open(instance->shmem_fname, O_RDWR|O_CREAT|O_TRUNC, 0644)) < 0) {
885 record_clock_stats(&(instance->peer->srcadr), "ONCORE: Can't open shmem");
886 if (shmem_old)
887 free(shmem_old);
888
889 return;
890 }
891
892 /* see how big it needs to be */
893
894 n = 1;
895 for (mp=oncore_messages; mp->flag[0]; mp++) {
896 mp->shmem = n;
897 /* Allocate space for multiplexed almanac, and 0D/2D/3D @@Ea records */
898 if (!strcmp(mp->flag, "Cb")) {
899 instance->shmem_Cb = n;
900 n += (mp->len + 3) * 34;
901 }
902 if (!strcmp(mp->flag, "Ba")) {
903 instance->shmem_Ba = n;
904 n += (mp->len + 3) * 3;
905 }
906 if (!strcmp(mp->flag, "Ea")) {
907 instance->shmem_Ea = n;
908 n += (mp->len + 3) * 3;
909 }
910 if (!strcmp(mp->flag, "Ha")) {
911 instance->shmem_Ha = n;
912 n += (mp->len + 3) * 3;
913 }
914 n += (mp->len + 3);
915 }
916 shmem_length = n + 2;
917
918 buf = malloc(shmem_length);
919 if (buf == NULL) {
920 record_clock_stats(&(instance->peer->srcadr), "ONCORE: Can't malloc buffer for shmem");
921 close(instance->shmemfd);
922 if (shmem_old)
923 free(shmem_old);
924
925 return;
926 }
927
928 memset(buf, 0, shmem_length);
929
930 /* next build the new SHMEM buffer in memory */
931
932 for (mp=oncore_messages; mp->flag[0]; mp++) {
933 l = mp->shmem;
934 buf[l + 0] = mp->len >> 8;
935 buf[l + 1] = mp->len & 0xff;
936 buf[l + 2] = 0;
937 buf[l + 3] = '@';
938 buf[l + 4] = '@';
939 buf[l + 5] = mp->flag[0];
940 buf[l + 6] = mp->flag[1];
941 if (!strcmp(mp->flag, "Cb") || !strcmp(mp->flag, "Ba") || !strcmp(mp->flag, "Ea") || !strcmp(mp->flag, "Ha")) {
942 if (!strcmp(mp->flag, "Cb"))
943 n = 35;
944 else
945 n = 4;
946 for (i=1; i<n; i++) {
947 buf[l + i * (mp->len+3) + 0] = mp->len >> 8;
948 buf[l + i * (mp->len+3) + 1] = mp->len & 0xff;
949 buf[l + i * (mp->len+3) + 2] = 0;
950 buf[l + i * (mp->len+3) + 3] = '@';
951 buf[l + i * (mp->len+3) + 4] = '@';
952 buf[l + i * (mp->len+3) + 5] = mp->flag[0];
953 buf[l + i * (mp->len+3) + 6] = mp->flag[1];
954 }
955 }
956 }
957
958 /* we now walk thru the two buffers (shmem_old and buf, soon to become shmem)
959 * copying the data in shmem_old to buf.
960 * When we are done we write it out and free both buffers.
961 * If the structure sizes dont agree, I will not copy.
962 * This could be due to an addition/deletion or a problem with the disk file.
963 */
964
965 if (shmem_old) {
966 if (shmem_old_size == shmem_length) {
967 for (cp=buf+4, cp1=shmem_old+4; (n = 256*(*(cp-3)) + *(cp-2)); cp+=(n+3), cp1+=(n+3)) {
968 n1 = 256*(*(cp1-3)) + *(cp1-2);
969 if (n == 0 || n1 != n || strncmp((char *) cp, (char *) cp1, 4))
970 break;
971
972 memcpy(cp, cp1, (size_t) n);
973 }
974 }
975 free(shmem_old);
976 }
977
978 i = write(instance->shmemfd, buf, shmem_length);
979 free(buf);
980
981 if (i != shmem_length) {
982 record_clock_stats(&(instance->peer->srcadr), "ONCORE: error writing shmem");
983 close(instance->shmemfd);
984 return;
985 }
986
987 instance->shmem = (u_char *) mmap(0, shmem_length,
988 PROT_READ | PROT_WRITE,
989 #ifdef MAP_HASSEMAPHORE
990 MAP_HASSEMAPHORE |
991 #endif
992 MAP_SHARED, instance->shmemfd, (off_t)0);
993
994 if (instance->shmem == (u_char *)MAP_FAILED) {
995 instance->shmem = 0;
996 close(instance->shmemfd);
997 return;
998 }
999
1000 sprintf(Msg, "SHMEM (size = %ld) is CONFIGURED and available as %s",
1001 (u_long) shmem_length, instance->shmem_fname);
1002 record_clock_stats(&(instance->peer->srcadr), Msg);
1003 }
1004 #endif /* ONCORE_SHMEM_STATUS */
1005
1006
1007
1008 /*
1009 * Read Input file if it exists.
1010 */
1011
1012 static void
1013 oncore_read_config(
1014 struct instance *instance
1015 )
1016 {
1017 /*
1018 * First we try to open the configuration file
1019 * /etc/oncoreN
1020 * where N is the unit number viz 127.127.30.N.
1021 * If we don't find it we try
1022 * /etc/ntp.oncore.N
1023 * and then
1024 * /etc/ntp.oncore
1025 *
1026 * If we don't find any then we don't have the cable delay or PPS offset
1027 * and we choose MODE (4) below.
1028 *
1029 * Five Choices for MODE
1030 * (0) ONCORE is preinitialized, don't do anything to change it.
1031 * nb, DON'T set 0D mode, DON'T set Delay, position...
1032 * (1) NO RESET, Read Position, delays from data file, lock it in, go to 0D mode.
1033 * (2) NO RESET, Read Delays from data file, do SITE SURVEY to get position,
1034 * lock this in, go to 0D mode.
1035 * (3) HARD RESET, Read Position, delays from data file, lock it in, go to 0D mode.
1036 * (4) HARD RESET, Read Delays from data file, do SITE SURVEY to get position,
1037 * lock this in, go to 0D mode.
1038 * NB. If a POSITION is specified in the config file with mode=(2,4) [SITE SURVEY]
1039 * then this position is set as the INITIAL position of the ONCORE.
1040 * This can reduce the time to first fix.
1041 * -------------------------------------------------------------------------------
1042 * Note that an Oncore UT without a battery backup retains NO information if it is
1043 * power cycled, with a Battery Backup it remembers the almanac, etc.
1044 * For an Oncore VP, there is an eeprom that will contain this data, along with the
1045 * option of Battery Backup.
1046 * So a UT without Battery Backup is equivalent to doing a HARD RESET on each
1047 * power cycle, since there is nowhere to store the data.
1048 * -------------------------------------------------------------------------------
1049 *
1050 * If we open one or the other of the files, we read it looking for
1051 * MODE, LAT, LON, (HT, HTGPS, HTMSL), DELAY, OFFSET, ASSERT, CLEAR, HARDPPS,
1052 * STATUS, POSN3D, POSN2D, CHAN, TRAIM
1053 * then initialize using method MODE. For Mode = (1,3) all of (LAT, LON, HT) must
1054 * be present or mode reverts to (2,4).
1055 *
1056 * Read input file.
1057 *
1058 * # is comment to end of line
1059 * = allowed between 1st and 2nd fields.
1060 *
1061 * Expect to see one line with 'MODE' as first field, followed by an integer
1062 * in the range 0-4 (default = 4).
1063 *
1064 * Expect to see two lines with 'LONG', 'LAT' followed by 1-3 fields.
1065 * All numbers are floating point.
1066 * DDD.ddd
1067 * DDD MMM.mmm
1068 * DDD MMM SSS.sss
1069 *
1070 * Expect to see one line with 'HT' as first field,
1071 * followed by 1-2 fields. First is a number, the second is 'FT' or 'M'
1072 * for feet or meters. HT is the height above the GPS ellipsoid.
1073 * If the receiver reports height in both GPS and MSL, then we will report
1074 * the difference GPS-MSL on the clockstats file.
1075 *
1076 * There is an optional line, starting with DELAY, followed
1077 * by 1 or two fields. The first is a number (a time) the second is
1078 * 'MS', 'US' or 'NS' for miliseconds, microseconds or nanoseconds.
1079 * DELAY is cable delay, typically a few tens of ns.
1080 *
1081 * There is an optional line, starting with OFFSET, followed
1082 * by 1 or two fields. The first is a number (a time) the second is
1083 * 'MS', 'US' or 'NS' for miliseconds, microseconds or nanoseconds.
1084 * OFFSET is the offset of the PPS pulse from 0. (only fully implemented
1085 * with the PPSAPI, we need to be able to tell the Kernel about this
1086 * offset if the Kernel PLL is in use, but can only do this presently
1087 * when using the PPSAPI interface. If not using the Kernel PLL,
1088 * then there is no problem.
1089 *
1090 * There is an optional line, with either ASSERT or CLEAR on it, which
1091 * determine which transition of the PPS signal is used for timing by the
1092 * PPSAPI. If neither is present, then ASSERT is assumed.
1093 * ASSERT/CLEAR can also be set with FLAG2 of the ntp.conf input.
1094 * For Flag2, ASSERT=0, and hence is default.
1095 *
1096 * There is an optional line, with HARDPPS on it. Including this line causes
1097 * the PPS signal to control the kernel PLL.
1098 * HARDPPS can also be set with FLAG3 of the ntp.conf input.
1099 * For Flag3, 0 is disabled, and the default.
1100 *
1101 * There are three options that have to do with using the shared memory option.
1102 * First, to enable the option there must be a SHMEM line with a file name.
1103 * The file name is the file associated with the shared memory.
1104 *
1105 * In shared memory, there is one 'record' for each returned variable.
1106 * For the @@Ea data there are three 'records' containing position data.
1107 * There will always be data in the record corresponding to the '0D' @@Ea record,
1108 * and the user has a choice of filling the '3D' record by specifying POSN3D,
1109 * or the '2D' record by specifying POSN2D. In either case the '2D' or '3D'
1110 * record is filled once every 15s.
1111 *
1112 * Two additional variables that can be set are CHAN and TRAIM. These should be
1113 * set correctly by the code examining the @@Cj record, but we bring them out here
1114 * to allow the user to override either the # of channels, or the existence of TRAIM.
1115 * CHAN expects to be followed by in integer: 6, 8, or 12. TRAIM expects to be
1116 * followed by YES or NO.
1117 *
1118 * There is an optional line with MASK on it followed by one integer field in the
1119 * range 0 to 89. This sets the satellite mask angle and will determine the minimum
1120 * elevation angle for satellites to be tracked by the receiver. The default value
1121 * is 10 deg for the VP and 0 deg for all other receivers.
1122 *
1123 * So acceptable input would be
1124 * # these are my coordinates (RWC)
1125 * LON -106 34.610
1126 * LAT 35 08.999
1127 * HT 1589 # could equally well say HT 5215 FT
1128 * DELAY 60 ns
1129 */
1130
1131 FILE *fd;
1132 char *cp, *cc, *ca, line[100], units[2], device[20], Msg[160], **cpp;
1133 char *dirs[] = { "/etc/ntp", "/etc", 0 };
1134 int i, sign, lat_flg, long_flg, ht_flg, mode, mask;
1135 double f1, f2, f3;
1136
1137 fd = NULL; /* just to shutup gcc complaint */
1138 for (cpp=dirs; *cpp; cpp++) {
1139 cp = *cpp;
1140 sprintf(device, "%s/ntp.oncore.%d", cp, instance->unit); /* try "ntp.oncore.0 */
1141 if ((fd=fopen(device, "r")))
1142 break;
1143 sprintf(device, "%s/ntp.oncore%d", cp, instance->unit); /* try "ntp.oncore0" */
1144 if ((fd=fopen(device, "r")))
1145 break;
1146 sprintf(device, "%s/ntp.oncore", cp); /* and finally "ntp.oncore" */
1147 if ((fd=fopen(device, "r")))
1148 break;
1149 }
1150
1151 if (!fd) { /* no inputfile, default to the works ... */
1152 instance->init_type = 4;
1153 return;
1154 }
1155
1156 mode = mask = 0;
1157 lat_flg = long_flg = ht_flg = 0;
1158 while (fgets(line, 100, fd)) {
1159
1160 /* Remove comments */
1161 if ((cp = strchr(line, '#')))
1162 *cp = '\0';
1163
1164 /* Remove trailing space */
1165 for (i = strlen(line);
1166 i > 0 && isascii((int)line[i - 1]) && isspace((int)line[i - 1]);
1167 )
1168 line[--i] = '\0';
1169
1170 /* Remove leading space */
1171 for (cc = line; *cc && isascii((int)*cc) && isspace((int)*cc); cc++)
1172 continue;
1173
1174 /* Stop if nothing left */
1175 if (!*cc)
1176 continue;
1177
1178 /* Uppercase the command and find the arg */
1179 for (ca = cc; *ca; ca++) {
1180 if (isascii((int)*ca)) {
1181 if (islower((int)*ca)) {
1182 *ca = toupper((int)*ca);
1183 } else if (isspace((int)*ca) || (*ca == '='))
1184 break;
1185 }
1186 }
1187
1188 /* Remove space (and possible =) leading the arg */
1189 for (; *ca && isascii((int)*ca) && (isspace((int)*ca) || (*ca == '=')); ca++)
1190 continue;
1191
1192 if (!strncmp(cc, "STATUS", (size_t) 6) || !strncmp(cc, "SHMEM", (size_t) 5)) {
1193 i = strlen(ca);
1194 instance->shmem_fname = (char *) malloc((unsigned) (i+1));
1195 strcpy(instance->shmem_fname, ca);
1196 continue;
1197 }
1198
1199 /* Uppercase argument as well */
1200 for (cp = ca; *cp; cp++)
1201 if (isascii((int)*cp) && islower((int)*cp))
1202 *cp = toupper((int)*cp);
1203
1204 if (!strncmp(cc, "LAT", (size_t) 3)) {
1205 f1 = f2 = f3 = 0;
1206 sscanf(ca, "%lf %lf %lf", &f1, &f2, &f3);
1207 sign = 1;
1208 if (f1 < 0) {
1209 f1 = -f1;
1210 sign = -1;
1211 }
1212 instance->ss_lat = sign*1000*(fabs(f3) + 60*(fabs(f2) + 60*f1)); /*miliseconds*/
1213 lat_flg++;
1214 } else if (!strncmp(cc, "LON", (size_t) 3)) {
1215 f1 = f2 = f3 = 0;
1216 sscanf(ca, "%lf %lf %lf", &f1, &f2, &f3);
1217 sign = 1;
1218 if (f1 < 0) {
1219 f1 = -f1;
1220 sign = -1;
1221 }
1222 instance->ss_long = sign*1000*(fabs(f3) + 60*(fabs(f2) + 60*f1)); /*miliseconds*/
1223 long_flg++;
1224 } else if (!strncmp(cc, "HT", (size_t) 2)) {
1225 f1 = 0;
1226 units[0] = '\0';
1227 sscanf(ca, "%lf %1s", &f1, units);
1228 if (units[0] == 'F')
1229 f1 = 0.3048 * f1;
1230 instance->ss_ht = 100 * f1; /* cm */
1231 ht_flg++;
1232 } else if (!strncmp(cc, "DELAY", (size_t) 5)) {
1233 f1 = 0;
1234 units[0] = '\0';
1235 sscanf(ca, "%lf %1s", &f1, units);
1236 if (units[0] == 'N')
1237 ;
1238 else if (units[0] == 'U')
1239 f1 = 1000 * f1;
1240 else if (units[0] == 'M')
1241 f1 = 1000000 * f1;
1242 else
1243 f1 = 1000000000 * f1;
1244 if (f1 < 0 || f1 > 1.e9)
1245 f1 = 0;
1246 if (f1 < 0 || f1 > 999999) {
1247 sprintf(Msg, "PPS Cable delay of %fns out of Range, ignored", f1);
1248 record_clock_stats(&(instance->peer->srcadr), Msg);
1249 } else
1250 instance->delay = f1; /* delay in ns */
1251 } else if (!strncmp(cc, "OFFSET", (size_t) 6)) {
1252 f1 = 0;
1253 units[0] = '\0';
1254 sscanf(ca, "%lf %1s", &f1, units);
1255 if (units[0] == 'N')
1256 ;
1257 else if (units[0] == 'U')
1258 f1 = 1000 * f1;
1259 else if (units[0] == 'M')
1260 f1 = 1000000 * f1;
1261 else
1262 f1 = 1000000000 * f1;
1263 if (f1 < 0 || f1 > 1.e9)
1264 f1 = 0;
1265 if (f1 < 0 || f1 > 999999999.) {
1266 sprintf(Msg, "PPS Offset of %fns out of Range, ignored", f1);
1267 record_clock_stats(&(instance->peer->srcadr), Msg);
1268 } else
1269 instance->offset = f1; /* offset in ns */
1270 } else if (!strncmp(cc, "MODE", (size_t) 4)) {
1271 sscanf(ca, "%d", &mode);
1272 if (mode < 0 || mode > 4)
1273 mode = 4;
1274 } else if (!strncmp(cc, "ASSERT", (size_t) 6)) {
1275 instance->assert = 1;
1276 } else if (!strncmp(cc, "CLEAR", (size_t) 5)) {
1277 instance->assert = 0;
1278 } else if (!strncmp(cc, "HARDPPS", (size_t) 7)) {
1279 instance->hardpps = 1;
1280 } else if (!strncmp(cc, "POSN2D", (size_t) 6)) {
1281 instance->shmem_Posn = 2;
1282 } else if (!strncmp(cc, "POSN3D", (size_t) 6)) {
1283 instance->shmem_Posn = 3;
1284 } else if (!strncmp(cc, "CHAN", (size_t) 4)) {
1285 sscanf(ca, "%d", &i);
1286 if ((i == 6) || (i == 8) || (i == 12))
1287 instance->chan_in = i;
1288 } else if (!strncmp(cc, "TRAIM", (size_t) 5)) {
1289 instance->traim_in = 1; /* so TRAIM alone is YES */
1290 if (!strcmp(ca, "NO") || !strcmp(ca, "OFF")) /* Yes/No, On/Off */
1291 instance->traim_in = 0;
1292 } else if (!strncmp(cc, "MASK", (size_t) 4)) {
1293 sscanf(ca, "%d", &mask);
1294 if (mask > -1 && mask < 90)
1295 instance->Ag = mask; /* Satellite mask angle */
1296 }
1297 }
1298 fclose(fd);
1299
1300 /*
1301 * OK, have read all of data file, and extracted the good stuff.
1302 * If lat/long/ht specified they ALL must be specified for mode = (1,3).
1303 */
1304
1305 instance->posn_set = 1;
1306 if (!( lat_flg && long_flg && ht_flg )) {
1307 printf("ONCORE: incomplete data on %s\n", device);
1308 instance->posn_set = 0;
1309 if (mode == 1 || mode == 3) {
1310 sprintf(Msg, "Input Mode = %d, but no/incomplete position, mode set to %d", mode, mode+1);
1311 record_clock_stats(&(instance->peer->srcadr), Msg);
1312 mode++;
1313 }
1314 }
1315 instance->init_type = mode;
1316
1317 sprintf(Msg, "Input mode = %d", mode);
1318 record_clock_stats(&(instance->peer->srcadr), Msg);
1319 }
1320
1321
1322
1323 /*
1324 * move data from NTP to buffer (toss the extra in the unlikely case it won't fit)
1325 */
1326
1327 static void
1328 oncore_receive(
1329 struct recvbuf *rbufp
1330 )
1331 {
1332 size_t i;
1333 u_char *p;
1334 struct peer *peer;
1335 struct instance *instance;
1336
1337 peer = (struct peer *)rbufp->recv_srcclock;
1338 instance = (struct instance *) peer->procptr->unitptr;
1339 p = (u_char *) &rbufp->recv_space;
1340
1341 #if 0
1342 if (debug > 4) {
1343 int i;
1344 printf("ONCORE: >>>");
1345 for(i=0; i<rbufp->recv_length; i++)
1346 printf("%02x ", p[i]);
1347 printf("\n");
1348 printf("ONCORE: >>>");
1349 for(i=0; i<rbufp->recv_length; i++)
1350 printf("%03o ", p[i]);
1351 printf("\n");
1352 }
1353 #endif
1354
1355 i = rbufp->recv_length;
1356 if (rcvbuf+rcvptr+i > &rcvbuf[sizeof rcvbuf])
1357 i = sizeof(rcvbuf) - rcvptr; /* and some char will be lost */
1358 memcpy(rcvbuf+rcvptr, p, i);
1359 rcvptr += i;
1360 oncore_consume(instance);
1361 }
1362
1363
1364
1365 /*
1366 * Deal with any complete messages
1367 */
1368
1369 static void
1370 oncore_consume(
1371 struct instance *instance
1372 )
1373 {
1374 int i, m;
1375 unsigned l;
1376
1377 while (rcvptr >= 7) {
1378 if (rcvbuf[0] != '@' || rcvbuf[1] != '@') {
1379 /* We're not in sync, lets try to get there */
1380 for (i=1; i < rcvptr-1; i++)
1381 if (rcvbuf[i] == '@' && rcvbuf[i+1] == '@')
1382 break;
1383 #ifdef DEBUG
1384 if (debug > 4)
1385 printf("ONCORE[%d]: >>> skipping %d chars\n", instance->unit, i);
1386 #endif
1387 if (i != rcvptr)
1388 memcpy(rcvbuf, rcvbuf+i, (size_t)(rcvptr-i));
1389 rcvptr -= i;
1390 continue;
1391 }
1392
1393 /* Ok, we have a header now */
1394 l = sizeof(oncore_messages)/sizeof(oncore_messages[0]) -1;
1395 for(m=0; m<l; m++)
1396 if (!strncmp(oncore_messages[m].flag, (char *)(rcvbuf+2), (size_t) 2))
1397 break;
1398 if (m == l) {
1399 #ifdef DEBUG
1400 if (debug > 4)
1401 printf("ONCORE[%d]: >>> Unknown MSG, skipping 4 (%c%c)\n", instance->unit, rcvbuf[2], rcvbuf[3]);
1402 #endif
1403 memcpy(rcvbuf, rcvbuf+4, (size_t) 4);
1404 rcvptr -= 4;
1405 continue;
1406 }
1407
1408 l = oncore_messages[m].len;
1409 #if 0
1410 if (debug > 3)
1411 printf("ONCORE[%d]: GOT: %c%c %d of %d entry %d\n", instance->unit, rcvbuf[2], rcvbuf[3], rcvptr, l, m);
1412 #endif
1413 /* Got the entire message ? */
1414
1415 if (rcvptr < l)
1416 return;
1417
1418 /* are we at the end of message? should be <Cksum><CR><LF> */
1419
1420 if (rcvbuf[l-2] != '\r' || rcvbuf[l-1] != '\n') {
1421 #ifdef DEBUG
1422 if (debug)
1423 printf("ONCORE[%d]: NO <CR><LF> at end of message\n", instance->unit);
1424 #endif
1425 } else { /* check the CheckSum */
1426 if (oncore_checksum_ok(rcvbuf, l)) {
1427 if (instance->shmem != NULL) {
1428 instance->shmem[oncore_messages[m].shmem + 2]++;
1429 memcpy(instance->shmem + oncore_messages[m].shmem + 3,
1430 rcvbuf, (size_t) l);
1431 }
1432 oncore_msg_any(instance, rcvbuf, (size_t) (l-3), m);
1433 if (oncore_messages[m].handler)
1434 oncore_messages[m].handler(instance, rcvbuf, (size_t) (l-3));
1435 }
1436 #ifdef DEBUG
1437 else if (debug) {
1438 printf("ONCORE[%d]: Checksum mismatch!\n", instance->unit);
1439 printf("ONCORE[%d]: @@%c%c ", instance->unit, rcvbuf[2], rcvbuf[3]);
1440 for (i=4; i<l; i++)
1441 printf("%03o ", rcvbuf[i]);
1442 printf("\n");
1443 }
1444 #endif
1445 }
1446
1447 if (l != rcvptr)
1448 memcpy(rcvbuf, rcvbuf+l, (size_t) (rcvptr-l));
1449 rcvptr -= l;
1450 }
1451 }
1452
1453
1454
1455 static void
1456 oncore_get_timestamp(
1457 struct instance *instance,
1458 long dt1, /* tick offset THIS time step */
1459 long dt2 /* tick offset NEXT time step */
1460 )
1461 {
1462 int Rsm;
1463 u_long j;
1464 l_fp ts, ts_tmp;
1465 double dmy;
1466 #ifdef HAVE_STRUCT_TIMESPEC
1467 struct timespec *tsp = 0;
1468 #else
1469 struct timeval *tsp = 0;
1470 #endif
1471 int current_mode;
1472 u_long i;
1473 pps_params_t current_params;
1474 struct timespec timeout;
1475 pps_info_t pps_i;
1476
1477 #if 1
1478 /* If we are in SiteSurvey mode, then we are in 3D mode, and we fall thru.
1479 * If we have Finished the SiteSurvey, then we fall thru for the 14/15
1480 * times we get here in 0D mode (the 1/15 is in 3D for SHMEM).
1481 * This gives good time, which gets better when the SS is done.
1482 */
1483
1484 if ((instance->site_survey == ONCORE_SS_DONE) && (instance->mode != MODE_0D))
1485 #else
1486 /* old check, only fall thru for SS_DONE and 0D mode, 2h45m wait for ticks */
1487
1488 if ((instance->site_survey != ONCORE_SS_DONE) || (instance->mode != MODE_0D))
1489 #endif
1490 return;
1491
1492 /* Don't do anything without an almanac to define the GPS->UTC delta */
1493
1494 if (instance->rsm.bad_almanac)
1495 return;
1496
1497 /* Once the Almanac is valid, the M12+T does not produce valid UTC
1498 * immediately.
1499 * Wait for UTC offset decode valid, then wait one message more
1500 * so we are not off by 13 seconds after reset.
1501 */
1502
1503 if (instance->count5) {
1504 instance->count5--;
1505 return;
1506 }
1507
1508 j = instance->ev_serial;
1509 timeout.tv_sec = 0;
1510 timeout.tv_nsec = 0;
1511 if (time_pps_fetch(instance->pps_h, PPS_TSFMT_TSPEC, &pps_i,
1512 &timeout) < 0) {
1513 printf("ONCORE: time_pps_fetch failed\n");
1514 return;
1515 }
1516
1517 if (instance->assert) {
1518 tsp = &pps_i.assert_timestamp;
1519
1520 #ifdef DEBUG
1521 if (debug > 2) {
1522 i = (u_long) pps_i.assert_sequence;
1523 # ifdef HAVE_STRUCT_TIMESPEC
1524 printf("ONCORE[%d]: serial/j (%lu, %lu) %ld.%09ld\n",
1525 instance->unit, i, j,
1526 (long)tsp->tv_sec, (long)tsp->tv_nsec);
1527 # else
1528 printf("ONCORE[%d]: serial/j (%lu, %lu) %ld.%06ld\n",
1529 instance->unit, i, j,
1530 (long)tsp->tv_sec, (long)tsp->tv_usec);
1531 # endif
1532 }
1533 #endif
1534
1535 if (pps_i.assert_sequence == j) {
1536 printf("ONCORE: oncore_get_timestamp, error serial pps\n");
1537 return;
1538 }
1539 instance->ev_serial = pps_i.assert_sequence;
1540 } else {
1541 tsp = &pps_i.clear_timestamp;
1542
1543 #ifdef DEBUG
1544 if (debug > 2) {
1545 i = (u_long) pps_i.clear_sequence;
1546 # ifdef HAVE_STRUCT_TIMESPEC
1547 printf("ONCORE[%d]: serial/j (%lu, %lu) %ld.%09ld\n",
1548 instance->unit, i, j, (long)tsp->tv_sec, (long)tsp->tv_nsec);
1549 # else
1550 printf("ONCORE[%d]: serial/j (%lu, %lu) %ld.%06ld\n",
1551 instance->unit, i, j, (long)tsp->tv_sec, (long)tsp->tv_usec);
1552 # endif
1553 }
1554 #endif
1555
1556 if (pps_i.clear_sequence == j) {
1557 printf("ONCORE: oncore_get_timestamp, error serial pps\n");
1558 return;
1559 }
1560 instance->ev_serial = pps_i.clear_sequence;
1561 }
1562
1563 /* convert timespec -> ntp l_fp */
1564
1565 dmy = tsp->tv_nsec;
1566 dmy /= 1e9;
1567 ts.l_uf = dmy * 4294967296.0;
1568 ts.l_ui = tsp->tv_sec;
1569
1570 #if 0
1571 alternate code for previous 4 lines is
1572 dmy = 1.0e-9*tsp->tv_nsec; /* fractional part */
1573 DTOLFP(dmy, &ts);
1574 dmy = tsp->tv_sec; /* integer part */
1575 DTOLFP(dmy, &ts_tmp);
1576 L_ADD(&ts, &ts_tmp);
1577 or more simply
1578 dmy = 1.0e-9*tsp->tv_nsec; /* fractional part */
1579 DTOLFP(dmy, &ts);
1580 ts.l_ui = tsp->tv_sec;
1581 #endif /* 0 */
1582
1583 /* now have timestamp in ts */
1584 /* add in saw_tooth and offset, these will be ZERO if no TRAIM */
1585 /* they will be IGNORED if the PPSAPI cant do PPS_OFFSET/ASSERT/CLEAR */
1586 /* we just try to add them in and dont test for that here */
1587
1588 /* saw_tooth not really necessary if using TIMEVAL */
1589 /* since its only precise to us, but do it anyway. */
1590
1591 /* offset in ns, and is positive (late), we subtract */
1592 /* to put the PPS time transition back where it belongs */
1593
1594 /* must hand the offset for the NEXT sec off to the Kernel to do */
1595 /* the addition, so that the Kernel PLL sees the offset too */
1596
1597 if (instance->assert)
1598 instance->pps_p.assert_offset.tv_nsec = -dt2;
1599 else
1600 instance->pps_p.clear_offset.tv_nsec = -dt2;
1601
1602 /* The following code is necessary, and not just a time_pps_setparams,
1603 * using the saved instance->pps_p, since some other process on the
1604 * machine may have diddled with the mode bits (say adding something
1605 * that it needs). We take what is there and ADD what we need.
1606 * [[ The results from the time_pps_getcap is unlikely to change so
1607 * we could probably just save it, but I choose to do the call ]]
1608 * Unfortunately, there is only ONE set of mode bits in the kernel per
1609 * interface, and not one set for each open handle.
1610 *
1611 * There is still a race condition here where we might mess up someone
1612 * elses mode, but if he is being careful too, he should survive.
1613 */
1614
1615 if (time_pps_getcap(instance->pps_h, &current_mode) < 0) {
1616 msyslog(LOG_ERR, "time_pps_getcap failed: %m");
1617 return;
1618 }
1619
1620 if (time_pps_getparams(instance->pps_h, &current_params) < 0) {
1621 msyslog(LOG_ERR, "time_pps_getparams failed: %m");
1622 return;
1623 }
1624
1625 /* or current and mine */
1626 current_params.mode |= instance->pps_p.mode;
1627 /* but only set whats legal */
1628 current_params.mode &= current_mode;
1629
1630 current_params.assert_offset.tv_sec = 0;
1631 current_params.assert_offset.tv_nsec = -dt2;
1632 current_params.clear_offset.tv_sec = 0;
1633 current_params.clear_offset.tv_nsec = -dt2;
1634
1635 if (time_pps_setparams(instance->pps_h, &current_params))
1636 record_clock_stats(&(instance->peer->srcadr), "ONCORE: Error doing time_pps_setparams");
1637
1638 /* have time from UNIX origin, convert to NTP origin. */
1639
1640 ts.l_ui += JAN_1970;
1641 instance->pp->lastrec = ts;
1642
1643 /* print out information about this timestamp (long line) */
1644
1645 ts_tmp = ts;
1646 ts_tmp.l_ui = 0; /* zero integer part */
1647 LFPTOD(&ts_tmp, dmy); /* convert fractional part to a double */
1648 j = 1.0e9*dmy; /* then to integer ns */
1649
1650 Rsm = 0;
1651 if (instance->chan == 6)
1652 Rsm = instance->BEHa[64];
1653 else if (instance->chan == 8)
1654 Rsm = instance->BEHa[72];
1655 else if (instance->chan == 12)
1656 Rsm = ((instance->BEHa[129]<<8) | instance->BEHa[130]);
1657
1658 if (instance->chan == 6 || instance->chan == 8) {
1659 char f1[5], f2[5], f3[5], f4[5];
1660 if (instance->traim) {
1661 sprintf(f1, "%d", instance->BEHn[21]);
1662 sprintf(f2, "%d", instance->BEHn[22]);
1663 sprintf(f3, "%2d", instance->BEHn[23]*256+instance->BEHn[24]);
1664 sprintf(f4, "%3d", (s_char) instance->BEHn[25]);
1665 } else {
1666 strcpy(f1, "x");
1667 strcpy(f2, "x");
1668 strcpy(f3, "xx");
1669 strcpy(f4, "xxx");
1670 }
1671 sprintf(instance->pp->a_lastcode, /* MAX length 128, currently at 121 */
1672 "%u.%09lu %d %d %2d %2d %2d %2ld rstat %02x dop %4.1f nsat %2d,%d traim %d,%s,%s sigma %s neg-sawtooth %s sat %d%d%d%d%d%d%d%d",
1673 ts.l_ui, j,
1674 instance->pp->year, instance->pp->day,
1675 instance->pp->hour, instance->pp->minute, instance->pp->second,
1676 (long) tsp->tv_sec % 60,
1677 Rsm, 0.1*(256*instance->BEHa[35]+instance->BEHa[36]),
1678 /*rsat dop */
1679 instance->BEHa[38], instance->BEHa[39], instance->traim, f1, f2,
1680 /* nsat visible, nsat tracked, traim,traim,traim */
1681 f3, f4,
1682 /* sigma neg-sawtooth */
1683 /*sat*/ instance->BEHa[41], instance->BEHa[45], instance->BEHa[49], instance->BEHa[53],
1684 instance->BEHa[57], instance->BEHa[61], instance->BEHa[65], instance->BEHa[69]
1685 ); /* will be 0 for 6 chan */
1686 } else if (instance->chan == 12) {
1687 char f1[5], f2[5], f3[5], f4[5];
1688 if (instance->traim) {
1689 sprintf(f1, "%d", instance->BEHn[6]);
1690 sprintf(f2, "%d", instance->BEHn[7]);
1691 sprintf(f3, "%d", instance->BEHn[12]*256+instance->BEHn[13]);
1692 sprintf(f4, "%3d", (s_char) instance->BEHn[14]);
1693 } else {
1694 strcpy(f1, "x");
1695 strcpy(f2, "x");
1696 strcpy(f3, "x");
1697 strcpy(f4, "xxx");
1698 }
1699 sprintf(instance->pp->a_lastcode,
1700 "%u.%09lu %d %d %2d %2d %2d %2ld rstat %02x dop %4.1f nsat %2d,%d traim %d,%s,%s sigma %s neg-sawtooth %s sat %d%d%d%d%d%d%d%d%d%d%d%d",
1701 ts.l_ui, j,
1702 instance->pp->year, instance->pp->day,
1703 instance->pp->hour, instance->pp->minute, instance->pp->second,
1704 (long) tsp->tv_sec % 60,
1705 Rsm, 0.1*(256*instance->BEHa[53]+instance->BEHa[54]),
1706 /*rsat dop */
1707 instance->BEHa[55], instance->BEHa[56], instance->traim, f1, f2,
1708 /* nsat visible, nsat tracked traim,traim,traim */
1709 f3, f4,
1710 /* sigma neg-sawtooth */
1711 /*sat*/ instance->BEHa[58], instance->BEHa[64], instance->BEHa[70], instance->BEHa[76],
1712 instance->BEHa[82], instance->BEHa[88], instance->BEHa[94], instance->BEHa[100],
1713 instance->BEHa[106], instance->BEHa[112], instance->BEHa[118], instance->BEHa[124]
1714 );
1715 }
1716
1717 #ifdef DEBUG
1718 if (debug > 2) {
1719 int n;
1720
1721 n = strlen(instance->pp->a_lastcode);
1722 printf("ONCORE[%d]: len = %d %s\n", instance->unit, n, instance->pp->a_lastcode);
1723 }
1724 #endif
1725
1726 /* and some things I dont understand (magic ntp things) */
1727
1728 if (!refclock_process(instance->pp)) {
1729 refclock_report(instance->peer, CEVNT_BADTIME);
1730 return;
1731 }
1732
1733 record_clock_stats(&(instance->peer->srcadr), instance->pp->a_lastcode);
1734 instance->pollcnt = 2;
1735
1736 if (instance->polled) {
1737 instance->polled = 0;
1738 /* instance->pp->dispersion = instance->pp->skew = 0; */
1739 instance->pp->lastref = instance->pp->lastrec;
1740 refclock_receive(instance->peer);
1741 }
1742 }
1743
1744
1745 /*************** oncore_msg_XX routines start here *******************/
1746
1747
1748 /*
1749 * print Oncore response message.
1750 */
1751
1752 static void
1753 oncore_msg_any(
1754 struct instance *instance,
1755 u_char *buf,
1756 size_t len,
1757 int idx
1758 )
1759 {
1760 int i;
1761 const char *fmt = oncore_messages[idx].fmt;
1762 const char *p;
1763 #ifdef HAVE_GETCLOCK
1764 struct timespec ts;
1765 #endif
1766 struct timeval tv;
1767
1768 #ifdef DEBUG
1769 if (debug > 3) {
1770 # ifdef HAVE_GETCLOCK
1771 (void) getclock(TIMEOFDAY, &ts);
1772 tv.tv_sec = ts.tv_sec;
1773 tv.tv_usec = ts.tv_nsec / 1000;
1774 # else
1775 GETTIMEOFDAY(&tv, 0);
1776 # endif
1777 printf("ONCORE[%d]: %ld.%06ld\n", instance->unit, (long) tv.tv_sec, (long) tv.tv_usec);
1778
1779 if (!*fmt) {
1780 printf(">>@@%c%c ", buf[2], buf[3]);
1781 for(i=2; i < len && i < 2400 ; i++)
1782 printf("%02x", buf[i]);
1783 printf("\n");
1784 return;
1785 } else {
1786 printf("##");
1787 for (p = fmt; *p; p++) {
1788 putchar(*p);
1789 putchar('_');
1790 }
1791 printf("\n%c%c", buf[2], buf[3]);
1792 i = 4;
1793 for (p = fmt; *p; p++) {
1794 printf("%02x", buf[i++]);
1795 }
1796 printf("\n");
1797 }
1798 }
1799 #endif
1800 }
1801
1802
1803
1804 /* Latitude, Longitude, Height */
1805
1806 static void
1807 oncore_msg_Adef(
1808 struct instance *instance,
1809 u_char *buf,
1810 size_t len
1811 )
1812 {
1813 }
1814
1815
1816
1817 /* Mask Angle */
1818
1819 static void
1820 oncore_msg_Ag(
1821 struct instance *instance,
1822 u_char *buf,
1823 size_t len
1824 )
1825 { char Msg[160], *cp;
1826
1827 cp = "set to";
1828 if (instance->o_state == ONCORE_RUN)
1829 cp = "is";
1830
1831 instance->Ag = buf[4];
1832 sprintf(Msg, "Satellite mask angle %s %d degrees", cp, (int) instance->Ag);
1833 record_clock_stats(&(instance->peer->srcadr), Msg);
1834 }
1835
1836
1837
1838 /*
1839 * get Position hold position
1840 */
1841
1842 static void
1843 oncore_msg_As(
1844 struct instance *instance,
1845 u_char *buf,
1846 size_t len
1847 )
1848 {
1849 instance->ss_lat = buf_w32(&buf[4]);
1850 instance->ss_long = buf_w32(&buf[8]);
1851 instance->ss_ht = buf_w32(&buf[12]);
1852
1853 /* Print out Position */
1854 oncore_print_posn(instance);
1855 }
1856
1857
1858
1859 /*
1860 * Try to use Oncore UT+ Auto Survey Feature
1861 * If its not there (VP), set flag to do it ourselves.
1862 */
1863
1864 static void
1865 oncore_msg_At(
1866 struct instance *instance,
1867 u_char *buf,
1868 size_t len
1869 )
1870 {
1871 char *cp;
1872
1873 instance->saw_At = 1;
1874 if (instance->site_survey == ONCORE_SS_TESTING) {
1875 if (buf[4] == 2) {
1876 record_clock_stats(&(instance->peer->srcadr),
1877 "Initiating hardware 3D site survey");
1878
1879 cp = "SSstate = ONCORE_SS_HW";
1880 record_clock_stats(&(instance->peer->srcadr), cp);
1881 instance->site_survey = ONCORE_SS_HW;
1882 }
1883 }
1884 }
1885
1886
1887
1888 /*
1889 * get PPS Offset
1890 * Nb. @@Ay is not supported for early UT (no plus) model
1891 */
1892
1893 static void
1894 oncore_msg_Ay(
1895 struct instance *instance,
1896 u_char *buf,
1897 size_t len
1898 )
1899 {
1900 char Msg[120];
1901
1902 if (instance->saw_Ay)
1903 return;
1904
1905 instance->saw_Ay = 1;
1906
1907 instance->offset = buf_w32(&buf[4]);
1908
1909 sprintf(Msg, "PPS Offset is set to %ld ns", instance->offset);
1910 record_clock_stats(&(instance->peer->srcadr), Msg);
1911 }
1912
1913
1914
1915 /*
1916 * get Cable Delay
1917 */
1918
1919 static void
1920 oncore_msg_Az(
1921 struct instance *instance,
1922 u_char *buf,
1923 size_t len
1924 )
1925 {
1926 char Msg[120];
1927
1928 if (instance->saw_Az)
1929 return;
1930
1931 instance->saw_Az = 1;
1932
1933 instance->delay = buf_w32(&buf[4]);
1934
1935 sprintf(Msg, "Cable delay is set to %ld ns", instance->delay);
1936 record_clock_stats(&(instance->peer->srcadr), Msg);
1937 }
1938
1939
1940
1941 /* Ba, Ea and Ha come here, these contain Position */
1942
1943 static void
1944 oncore_msg_BaEaHa(
1945 struct instance *instance,
1946 u_char *buf,
1947 size_t len
1948 )
1949 {
1950 const char *cp;
1951 char Msg[160];
1952 int mode;
1953
1954 /* OK, we are close to the RUN state now.
1955 * But we have a few more items to initialize first.
1956 *
1957 * At the beginning of this routine there are several 'timers'.
1958 * We enter this routine 1/sec, and since the upper levels of NTP have usurped
1959 * the use of timers, we use the 1/sec entry to do things that
1960 * we would normally do with timers...
1961 */
1962
1963 if (instance->o_state == ONCORE_CHECK_CHAN) { /* here while checking for the # chan */
1964 if (buf[2] == 'B') { /* 6chan */
1965 if (instance->chan_ck < 6) instance->chan_ck = 6;
1966 } else if (buf[2] == 'E') { /* 8chan */
1967 if (instance->chan_ck < 8) instance->chan_ck = 8;
1968 } else if (buf[2] == 'H') { /* 12chan */
1969 if (instance->chan_ck < 12) instance->chan_ck = 12;
1970 }
1971
1972 if (instance->count3++ < 5)
1973 return;
1974
1975 instance->count3 = 0;
1976
1977 if (instance->chan_in != -1) /* set in Input */
1978 instance->chan = instance->chan_in;
1979 else /* set from test */
1980 instance->chan = instance->chan_ck;
1981
1982 sprintf(Msg, "Input says chan = %d", instance->chan_in);
1983 record_clock_stats(&(instance->peer->srcadr), Msg);
1984 sprintf(Msg, "Model # says chan = %d", instance->chan_id);
1985 record_clock_stats(&(instance->peer->srcadr), Msg);
1986 sprintf(Msg, "Testing says chan = %d", instance->chan_ck);
1987 record_clock_stats(&(instance->peer->srcadr), Msg);
1988 sprintf(Msg, "Using chan = %d", instance->chan);
1989 record_clock_stats(&(instance->peer->srcadr), Msg);
1990
1991 instance->o_state = ONCORE_HAVE_CHAN;
1992 cp = "state = ONCORE_HAVE_CHAN";
1993 record_clock_stats(&(instance->peer->srcadr), cp);
1994
1995 instance->timeout = 4;
1996 oncore_sendmsg(instance->ttyfd, oncore_cmd_Cj, sizeof(oncore_cmd_Cj));
1997 return;
1998 }
1999
2000 if (instance->o_state != ONCORE_ALMANAC && instance->o_state != ONCORE_RUN)
2001 return;
2002
2003 /* PAUSE 5sec - make sure results are stable, before using position */
2004
2005 if (instance->count) {
2006 if (instance->count++ < 5)
2007 return;
2008 instance->count = 0;
2009 }
2010
2011 memcpy(instance->BEHa, buf, (size_t) (len+3)); /* Ba, Ea or Ha */
2012
2013 /* check the antenna (did it get unplugged) and almanac (is it ready) for changes. */
2014
2015 oncore_check_almanac(instance);
2016 oncore_check_antenna(instance);
2017
2018 /* If we are in Almanac mode, waiting for Almanac, we can't do anything till we have it */
2019 /* When we have an almanac, we will start the Bn/En/@@Hn messages */
2020
2021 if (instance->o_state == ONCORE_ALMANAC)
2022 if (oncore_wait_almanac(instance))
2023 return;
2024
2025 /* do some things once when we get this far in BaEaHa */
2026
2027 if (instance->once) {
2028 instance->once = 0;
2029 instance->count2 = 1;
2030
2031 /* Have we seen an @@At (position hold) command response */
2032 /* if not, message out */
2033
2034 if (instance->chan != 12 && !instance->saw_At) {
2035 cp = "Not Good, no @@At command (no Position Hold), must be a GT/GT+";
2036 record_clock_stats(&(instance->peer->srcadr), cp);
2037 oncore_sendmsg(instance->ttyfd, oncore_cmd_Av1, sizeof(oncore_cmd_Av1));
2038 }
2039
2040 /* have an Almanac, can start the SiteSurvey
2041 * (actually only need to get past the almanac_load where we diddle with At
2042 * command,- we can't change it after we start the HW_SS below
2043 */
2044
2045 mode = instance->init_type;
2046 switch (mode) {
2047 case 0: /* NO initialization, don't change anything */
2048 case 1: /* Use given Position */
2049 case 3:
2050 instance->site_survey = ONCORE_SS_DONE;
2051 cp = "SSstate = ONCORE_SS_DONE";
2052 record_clock_stats(&(instance->peer->srcadr), cp);
2053 break;
2054
2055 case 2:
2056 case 4: /* Site Survey */
2057 cp = "SSstate = ONCORE_SS_TESTING";
2058 record_clock_stats(&(instance->peer->srcadr), cp);
2059 instance->site_survey = ONCORE_SS_TESTING;
2060 instance->count1 = 1;
2061 if (instance->chan == 12)
2062 oncore_sendmsg(instance->ttyfd, oncore_cmd_Gd3, sizeof(oncore_cmd_Gd3)); /* M12+T */
2063 else
2064 oncore_sendmsg(instance->ttyfd, oncore_cmd_At2, sizeof(oncore_cmd_At2)); /* not GT, arg not VP */
2065 break;
2066 }
2067
2068 /* Read back PPS Offset for Output */
2069 /* Nb. This will fail silently for early UT (no plus) and M12 models */
2070
2071 oncore_sendmsg(instance->ttyfd, oncore_cmd_Ayx, sizeof(oncore_cmd_Ayx));
2072
2073 /* Read back Cable Delay for Output */
2074
2075 oncore_sendmsg(instance->ttyfd, oncore_cmd_Azx, sizeof(oncore_cmd_Azx));
2076
2077 /* Read back Satellite Mask Angle for Output */
2078
2079 oncore_sendmsg(instance->ttyfd, oncore_cmd_Agx, sizeof(oncore_cmd_Agx));
2080 }
2081
2082
2083 /* Unfortunately, the Gd3 command returns '3' for the M12 v1.3 firmware where it is
2084 * out-of-range and it should return 0-2. (v1.3 can't do a HW Site Survey)
2085 * We must do the Gd3, and then wait a cycle or two for things to settle,
2086 * then check Ha[130]&0x10 to see if a SS is in progress.
2087 * We will set SW if HW has not been set after an appropriate delay.
2088 */
2089
2090 if (instance->site_survey == ONCORE_SS_TESTING) {
2091 if (instance->chan == 12) {
2092 if (instance->count1) {
2093 if (instance->count1++ > 5 || instance->BEHa[130]&0x10) {
2094 instance->count1 = 0;
2095 if (instance->BEHa[130]&0x10) {
2096 record_clock_stats(&(instance->peer->srcadr),
2097 "Initiating hardware 3D site survey");
2098
2099 record_clock_stats(&(instance->peer->srcadr), "SSstate = ONCORE_SS_HW");
2100 instance->site_survey = ONCORE_SS_HW;
2101 } else {
2102 record_clock_stats(&(instance->peer->srcadr), "SSstate = ONCORE_SS_SW");
2103 instance->site_survey = ONCORE_SS_SW;
2104 }
2105 }
2106 }
2107 } else {
2108 if (instance->count1) {
2109 if (instance->count1++ > 5) {
2110 instance->count1 = 0;
2111 /*
2112 * For instance->site_survey to still be ONCORE_SS_TESTING, then after a 5sec
2113 * wait after the @@At2/@@Gd3 command we have not changed the state to
2114 * ONCORE_SS_HW. If the Hardware is capable of doing a Site Survey, then
2115 * the variable would have been changed by now.
2116 * There are three possibilities:
2117 * 6/8chan
2118 * (a) We did not get a response to the @@At0 or @@At2 commands,
2119 * and it must be a GT/GT+/SL with no position hold mode.
2120 * We will have to do it ourselves.
2121 * (b) We saw the @@At0, @@At2 commands, but @@At2 failed,
2122 * must be a VP or older UT which doesn't have Site Survey mode.
2123 * We will have to do it ourselves.
2124 * 12chan
2125 * (c) We saw the @@Gd command, and saw H[13]*0x10
2126 * We will have to do it ourselves (done above)
2127 */
2128
2129 sprintf(Msg, "Initiating software 3D site survey (%d samples)",
2130 POS_HOLD_AVERAGE);
2131 record_clock_stats(&(instance->peer->srcadr), Msg);
2132
2133 record_clock_stats(&(instance->peer->srcadr), "SSstate = ONCORE_SS_SW");
2134 instance->site_survey = ONCORE_SS_SW;
2135
2136 instance->ss_lat = instance->ss_long = instance->ss_ht = 0;
2137 if (instance->chan == 12)
2138 oncore_sendmsg(instance->ttyfd, oncore_cmd_Gd0, sizeof(oncore_cmd_Gd0)); /* disable */
2139 else {
2140 oncore_sendmsg(instance->ttyfd, oncore_cmd_At0, sizeof(oncore_cmd_At0)); /* disable */
2141 oncore_sendmsg(instance->ttyfd, oncore_cmd_Av0, sizeof(oncore_cmd_Av0)); /* disable */
2142 }
2143 }
2144 }
2145 }
2146 }
2147
2148 /* check the mode we are in 0/2/3D */
2149
2150 if (instance->chan == 6) {
2151 if (instance->BEHa[64]&0x8)
2152 instance->mode = MODE_0D;
2153 else if (instance->BEHa[64]&0x10)
2154 instance->mode = MODE_2D;
2155 else if (instance->BEHa[64]&0x20)
2156 instance->mode = MODE_3D;
2157 } else if (instance->chan == 8) {
2158 if (instance->BEHa[72]&0x8)
2159 instance->mode = MODE_0D;
2160 else if (instance->BEHa[72]&0x10)
2161 instance->mode = MODE_2D;
2162 else if (instance->BEHa[72]&0x20)
2163 instance->mode = MODE_3D;
2164 } else if (instance->chan == 12) {
2165 int bits;
2166
2167 bits = (instance->BEHa[129]>>5) & 0x7; /* actually Ha */
2168 if (bits == 0x4)
2169 instance->mode = MODE_0D;
2170 else if (bits == 0x6)
2171 instance->mode = MODE_2D;
2172 else if (bits == 0x7)
2173 instance->mode = MODE_3D;
2174 }
2175
2176 /* copy the record to the (extra) location in SHMEM */
2177
2178 if (instance->shmem) {
2179 int i;
2180 u_char *smp; /* pointer to start of shared mem for Ba/Ea/Ha */
2181
2182 switch(instance->chan) {
2183 case 6: smp = &instance->shmem[instance->shmem_Ba]; break;
2184 case 8: smp = &instance->shmem[instance->shmem_Ea]; break;
2185 case 12: smp = &instance->shmem[instance->shmem_Ha]; break;
2186 default: smp = (u_char *) NULL; break;
2187 }
2188
2189 switch (instance->mode) {
2190 case MODE_0D: i = 1; break; /* 0D, Position Hold */
2191 case MODE_2D: i = 2; break; /* 2D, Altitude Hold */
2192 case MODE_3D: i = 3; break; /* 3D fix */
2193 default: i = 0; break;
2194 }
2195
2196 if (i && smp != NULL) {
2197 i *= (len+6);
2198 smp[i + 2]++;
2199 memcpy(&smp[i+3], buf, (size_t) (len+3));
2200 }
2201 }
2202
2203 /*
2204 * check if traim timer active
2205 * if it hasn't been cleared, then @@Bn/@@En/@@Hn did not respond
2206 */
2207
2208 if (instance->traim_delay) {
2209 if (instance->traim_delay++ > 5) {
2210 instance->traim = 0;
2211 instance->traim_delay = 0;
2212 cp = "ONCORE: Did not detect TRAIM response, TRAIM = OFF";
2213 record_clock_stats(&(instance->peer->srcadr), cp);
2214
2215 oncore_set_traim(instance);
2216 } else
2217 return;
2218
2219 }
2220
2221 /* by now should have a @@Ba/@@Ea/@@Ha with good data in it */
2222
2223 if (!instance->have_dH && !instance->traim_delay)
2224 oncore_compute_dH(instance);
2225
2226 /*
2227 * must be ONCORE_RUN if we are here.
2228 * Have # chan and TRAIM by now.
2229 */
2230
2231 instance->pp->year = buf[6]*256+buf[7];
2232 instance->pp->day = ymd2yd(buf[6]*256+buf[7], buf[4], buf[5]);
2233 instance->pp->hour = buf[8];
2234 instance->pp->minute = buf[9];
2235 instance->pp->second = buf[10];
2236
2237 /*
2238 * Are we doing a Hardware or Software Site Survey?
2239 */
2240
2241 if (instance->site_survey == ONCORE_SS_HW || instance->site_survey == ONCORE_SS_SW)
2242 oncore_ss(instance);
2243
2244 /* see if we ever saw a response from the @@Ayx above */
2245
2246 if (instance->count2) {
2247 if (instance->count2++ > 5) { /* this delay to check on @@Ay command */
2248 instance->count2 = 0;
2249
2250 /* Have we seen an Ay (1PPS time offset) command response */
2251 /* if not, and non-zero offset, zero the offset, and send message */
2252
2253 if (!instance->saw_Ay && instance->offset) {
2254 cp = "No @@Ay command, PPS OFFSET ignored";
2255 record_clock_stats(&(instance->peer->srcadr), cp);
2256 instance->offset = 0;
2257 }
2258 }
2259 }
2260
2261 /*
2262 * Check the leap second status once per day.
2263 */
2264
2265 oncore_check_leap_sec(instance);
2266
2267 /*
2268 * if SHMEM active, every 15s, steal one 'tick' to get 2D or 3D posn.
2269 */
2270
2271 if (instance->shmem && !instance->shmem_bad_Ea && instance->shmem_Posn && (instance->site_survey == ONCORE_SS_DONE))
2272 oncore_shmem_get_3D(instance);
2273
2274 if (!instance->traim) /* NO traim, no BnEnHn, go get tick */
2275 oncore_get_timestamp(instance, instance->offset, instance->offset);
2276 }
2277
2278
2279
2280 /* Almanac Status */
2281
2282 static void
2283 oncore_msg_Bd(
2284 struct instance *instance,
2285 u_char *buf,
2286 size_t len
2287 )
2288 {
2289 char Msg[160];
2290
2291 sprintf(Msg, "Bd: Almanac %s, week = %d, t = %d, %d SVs: %x",
2292 ((buf[4]) ? "LOADED" : "(NONE)"), buf[5], buf[6], buf[7], w32(&buf[8]) );
2293 record_clock_stats(&(instance->peer->srcadr), Msg);
2294 }
2295
2296
2297
2298 /* get leap-second warning message */
2299
2300 /*
2301 * @@Bj does NOT behave as documented in current Oncore firmware.
2302 * It turns on the LEAP indicator when the data is set, and does not,
2303 * as documented, wait until the beginning of the month when the
2304 * leap second will occur.
2305 * Since this firmware bug will never be fixed in all the outstanding Oncore receivers
2306 * @@Bj is only called in June/December.
2307 */
2308
2309 static void
2310 oncore_msg_Bj(
2311 struct instance *instance,
2312 u_char *buf,
2313 size_t len
2314 )
2315 {
2316 const char *cp;
2317
2318 switch(buf[4]) {
2319 case 1:
2320 instance->pp->leap = LEAP_ADDSECOND;
2321 cp = "Set pp.leap to LEAP_ADDSECOND";
2322 break;
2323 case 2:
2324 instance->pp->leap = LEAP_DELSECOND;
2325 cp = "Set pp.leap to LEAP_DELSECOND";
2326 break;
2327 case 0:
2328 default:
2329 instance->pp->leap = LEAP_NOWARNING;
2330 cp = "Set pp.leap to LEAP_NOWARNING";
2331 break;
2332 }
2333 record_clock_stats(&(instance->peer->srcadr), cp);
2334 }
2335
2336
2337
2338 static void
2339 oncore_msg_BnEnHn(
2340 struct instance *instance,
2341 u_char *buf,
2342 size_t len
2343 )
2344 {
2345 long dt1, dt2;
2346 char *cp;
2347
2348 if (instance->o_state != ONCORE_RUN)
2349 return;
2350
2351 if (instance->traim_delay) { /* flag that @@Bn/@@En/Hn returned */
2352 instance->traim_ck = 1;
2353 instance->traim_delay = 0;
2354 cp = "ONCORE: Detected TRAIM, TRAIM = ON";
2355 record_clock_stats(&(instance->peer->srcadr), cp);
2356
2357 oncore_set_traim(instance);
2358 }
2359
2360 memcpy(instance->BEHn, buf, (size_t) len); /* Bn or En or Hn */
2361
2362 if (!instance->traim) /* BnEnHn will be turned off in any case */
2363 return;
2364
2365 /* If Time RAIM doesn't like it, don't trust it */
2366
2367 if (buf[2] == 'H') {
2368 if (instance->BEHn[6]) /* bad TRAIM */
2369 return;
2370
2371 dt1 = instance->saw_tooth + instance->offset; /* dt this time step */
2372 instance->saw_tooth = (s_char) instance->BEHn[14]; /* update for next time Hn[14] */
2373 dt2 = instance->saw_tooth + instance->offset; /* dt next time step */
2374 } else {
2375 if (instance->BEHn[21]) /* bad TRAIM */
2376 return;
2377
2378 dt1 = instance->saw_tooth + instance->offset; /* dt this time step */
2379 instance->saw_tooth = (s_char) instance->BEHn[25]; /* update for next time Bn[25], En[25] */
2380 dt2 = instance->saw_tooth + instance->offset; /* dt next time step */
2381 }
2382
2383 oncore_get_timestamp(instance, dt1, dt2);
2384 }
2385
2386
2387
2388 /* Here for @@Ca, @@Fa and @@Ia messages */
2389
2390 /* These are Self test Commands for 6, 8, and 12 chan receivers.
2391 * There are good reasons NOT to do a @@Ca, @@Fa or @@Ia command with the ONCORE.
2392 * It was found that under some circumstances the following
2393 * command would fail if issued immediately after the return from the
2394 * @@Fa, but a 2sec delay seemed to fix things. Since simply calling
2395 * sleep(2) is wasteful, and may cause trouble for some OS's, repeating
2396 * itimer, we set a flag, and test it at the next POLL. If it hasn't
2397 * been cleared, we reissue the @@Cj that is issued below.
2398 * Note that we do a @@Cj at the beginning, and again here.
2399 * The first is to get the info, the 2nd is just used as a safe command
2400 * after the @@Fa for all Oncores (and it was in this posn in the
2401 * original code).
2402 */
2403
2404 static void
2405 oncore_msg_CaFaIa(
2406 struct instance *instance,
2407 u_char *buf,
2408 size_t len
2409 )
2410 {
2411 char *cp;
2412 int i;
2413
2414 if (instance->o_state == ONCORE_TEST_SENT) {
2415 enum antenna_state antenna;
2416
2417 instance->timeout = 0;
2418
2419 #ifdef DEBUG
2420 if (debug > 2) {
2421 if (buf[2] == 'I')
2422 printf("ONCORE[%d]: >>@@%ca %x %x %x\n", instance->unit, buf[2], buf[4], buf[5], buf[6]);
2423 else
2424 printf("ONCORE[%d]: >>@@%ca %x %x\n", instance->unit, buf[2], buf[4], buf[5]);
2425 }
2426 #endif
2427
2428 antenna = (buf[4] & 0xc0) >> 6;
2429 buf[4] &= ~0xc0;
2430
2431 i = buf[4] || buf[5];
2432 if (buf[2] == 'I') i = i || buf[6];
2433 if (i) {
2434 if (buf[2] == 'I') {
2435 msyslog(LOG_ERR, "ONCORE[%d]: self test failed: result %02x %02x %02x",
2436 instance->unit, buf[4], buf[5], buf[6]);
2437 } else {
2438 msyslog(LOG_ERR, "ONCORE[%d]: self test failed: result %02x %02x",
2439 instance->unit, buf[4], buf[5]);
2440 }
2441 cp = "ONCORE: self test failed, shutting down driver";
2442 record_clock_stats(&instance->peer->srcadr, cp);
2443
2444 refclock_report(instance->peer, CEVNT_FAULT);
2445 oncore_shutdown(instance->unit, instance->peer);
2446 return;
2447 }
2448
2449 /* report the current antenna state */
2450
2451 oncore_antenna_report(instance, antenna);
2452
2453 instance->o_state = ONCORE_INIT;
2454 cp = "state = ONCORE_INIT";
2455 record_clock_stats(&(instance->peer->srcadr), cp);
2456
2457 instance->timeout = 4;
2458 oncore_sendmsg(instance->ttyfd, oncore_cmd_Cj, sizeof(oncore_cmd_Cj));
2459 }
2460 }
2461
2462
2463
2464 /*
2465 * Demultiplex the almanac into shmem
2466 */
2467
2468 static void
2469 oncore_msg_Cb(
2470 struct instance *instance,
2471 u_char *buf,
2472 size_t len
2473 )
2474 {
2475 int i;
2476
2477 if (instance->shmem == NULL)
2478 return;
2479
2480 if (buf[4] == 5 && buf[5] > 0 && buf[5] < 26)
2481 i = buf[5];
2482 else if (buf[4] == 4 && buf[5] <= 5)
2483 i = buf[5] + 24;
2484 else if (buf[4] == 4 && buf[5] <= 10)
2485 i = buf[5] + 23;
2486 else if (buf[4] == 4 && buf[5] == 25)
2487 i = 34;
2488 else {
2489 char *cp;
2490
2491 cp = "Cb: Response is NO ALMANAC";
2492 record_clock_stats(&(instance->peer->srcadr), cp);
2493 return;
2494 }
2495
2496 i *= 36;
2497 instance->shmem[instance->shmem_Cb + i + 2]++;
2498 memcpy(instance->shmem + instance->shmem_Cb + i + 3, buf, (size_t) (len + 3));
2499
2500 #if 1
2501 {
2502 char Msg[160];
2503 sprintf(Msg, "See Cb [%d,%d]", buf[4], buf[5]);
2504 record_clock_stats(&(instance->peer->srcadr), Msg);
2505 }
2506 #endif
2507 }
2508
2509
2510
2511 /*
2512 * Set to Factory Defaults (Reasonable for UT w/ no Battery Backup
2513 * not so for VP (eeprom) or any unit with a battery
2514 */
2515
2516 static void
2517 oncore_msg_Cf(
2518 struct instance *instance,
2519 u_char *buf,
2520 size_t len
2521 )
2522 {
2523 const char *cp;
2524
2525 if (instance->o_state == ONCORE_RESET_SENT) {
2526 oncore_sendmsg(instance->ttyfd, oncore_cmd_Cg, sizeof(oncore_cmd_Cg)); /* Return to Posn Fix mode */
2527 /* Reset set VP to IDLE */
2528 instance->o_state = ONCORE_TEST_SENT;
2529 cp = "state = ONCORE_TEST_SENT";
2530 record_clock_stats(&(instance->peer->srcadr), cp);
2531
2532 oncore_sendmsg(instance->ttyfd, oncore_cmd_Cj, sizeof(oncore_cmd_Cj));
2533 }
2534 }
2535
2536
2537
2538 /*
2539 * This is the Grand Central Station for the Preliminary Initialization.
2540 * Once done here we move on to oncore_msg_BaEaHa for final Initialization and Running.
2541 *
2542 * We do an @@Cj whenever we need a safe command for all Oncores.
2543 * The @@Cj gets us back here where we can switch to the next phase of setup.
2544 *
2545 * o Once at the very beginning (in start) to get the Model number.
2546 * This info is printed, but no longer used.
2547 * o Again after we have determined the number of Channels in the receiver.
2548 * o And once later after we have done a reset and test, (which may hang),
2549 * as we are about to initialize the Oncore and start it running.
2550 * o We have one routine below for each case.
2551 */
2552
2553 static void
2554 oncore_msg_Cj(
2555 struct instance *instance,
2556 u_char *buf,
2557 size_t len
2558 )
2559 {
2560 int mode;
2561 char *cp;
2562
2563 memcpy(instance->Cj, buf, len);
2564
2565 instance->timeout = 0;
2566 if (instance->o_state == ONCORE_CHECK_ID) {
2567 oncore_msg_Cj_id(instance, buf, len);
2568 oncore_chan_test(instance);
2569 } else if (instance->o_state == ONCORE_HAVE_CHAN) {
2570 mode = instance->init_type;
2571 if (mode == 3 || mode == 4) { /* Cf will return here to check for TEST */
2572 instance->o_state = ONCORE_RESET_SENT;
2573 cp = "state = ONCORE_RESET_SENT";
2574 record_clock_stats(&(instance->peer->srcadr), cp);
2575 oncore_sendmsg(instance->ttyfd, oncore_cmd_Cf, sizeof(oncore_cmd_Cf));
2576 } else {
2577 instance->o_state = ONCORE_TEST_SENT;
2578 cp = "state = ONCORE_TEST_SENT";
2579 record_clock_stats(&(instance->peer->srcadr), cp);
2580 }
2581 }
2582
2583 if (instance->o_state == ONCORE_TEST_SENT) {
2584 if (instance->chan == 6)
2585 oncore_sendmsg(instance->ttyfd, oncore_cmd_Ca, sizeof(oncore_cmd_Ca));
2586 else if (instance->chan == 8)
2587 oncore_sendmsg(instance->ttyfd, oncore_cmd_Fa, sizeof(oncore_cmd_Fa));
2588 else if (instance->chan == 12)
2589 oncore_sendmsg(instance->ttyfd, oncore_cmd_Ia, sizeof(oncore_cmd_Ia));
2590 } else if (instance->o_state == ONCORE_INIT)
2591 oncore_msg_Cj_init(instance, buf, len);
2592 }
2593
2594
2595
2596 /* The information on determining a Oncore 'Model', viz VP, UT, etc, from
2597 * the Model Number comes from "Richard M. Hambly" <rick@cnssys.com>
2598 * and from Motorola. Until recently Rick was the only source of
2599 * this information as Motorola didn't give the information out.
2600 *
2601 * Determine the Type from the Model #, this determines #chan and if TRAIM is
2602 * available.
2603 *
2604 * The Information from this routine is NO LONGER USED.
2605 * The RESULTS are PRINTED, BUT NOT USED, and the routine COULD BE DELETED
2606 */
2607
2608 static void
2609 oncore_msg_Cj_id(
2610 struct instance *instance,
2611 u_char *buf,
2612 size_t len
2613 )
2614 {
2615 char *cp, *cp1, *cp2, Model[21], Msg[160];
2616
2617 /* Write Receiver ID message to clockstats file */
2618
2619 instance->Cj[294] = '\0';
2620 for (cp=(char *)instance->Cj; cp< (char *) &instance->Cj[294]; ) {
2621 cp1 = strchr(cp, '\r');
2622 if (!cp1)
2623 cp1 = (char *)&instance->Cj[294];
2624 *cp1 = '\0';
2625 record_clock_stats(&(instance->peer->srcadr), cp);
2626 *cp1 = '\r';
2627 cp = cp1+2;
2628 }
2629
2630 /* next, the Firmware Version and Revision numbers */
2631
2632 instance->version = atoi((char *) &instance->Cj[83]);
2633 instance->revision = atoi((char *) &instance->Cj[111]);
2634
2635 /* from model number decide which Oncore this is,
2636 and then the number of channels */
2637
2638 for (cp= (char *) &instance->Cj[160]; *cp == ' '; cp++) /* start right after 'Model #' */
2639 ;
2640 cp1 = cp;
2641 cp2 = Model;
2642 for (; !isspace((int)*cp) && cp-cp1 < 20; cp++, cp2++)
2643 *cp2 = *cp;
2644 *cp2 = '\0';
2645
2646 cp = 0;
2647 if (!strncmp(Model, "PVT6", (size_t) 4)) {
2648 cp = "PVT6";
2649 instance->model = ONCORE_PVT6;
2650 } else if (Model[0] == 'A') {
2651 cp = "Basic";
2652 instance->model = ONCORE_BASIC;
2653 } else if (Model[0] == 'B' || !strncmp(Model, "T8", (size_t) 2)) {
2654 cp = "VP";
2655 instance->model = ONCORE_VP;
2656 } else if (Model[0] == 'P') {
2657 cp = "M12";
2658 instance->model = ONCORE_M12;
2659 } else if (Model[0] == 'R' || Model[0] == 'D' || Model[0] == 'S') {
2660 if (Model[5] == 'N') {
2661 cp = "GT";
2662 instance->model = ONCORE_GT;
2663 } else if ((Model[1] == '3' || Model[1] == '4') && Model[5] == 'G') {
2664 cp = "GT+";
2665 instance->model = ONCORE_GTPLUS;
2666 } else if ((Model[1] == '5' && Model[5] == 'U') || (Model[1] == '1' && Model[5] == 'A')) {
2667 cp = "UT";
2668 instance->model = ONCORE_UT;
2669 } else if (Model[1] == '5' && Model[5] == 'G') {
2670 cp = "UT+";
2671 instance->model = ONCORE_UTPLUS;
2672 } else if (Model[1] == '6' && Model[5] == 'G') {
2673 cp = "SL";
2674 instance->model = ONCORE_SL;
2675 } else {
2676 cp = "Unknown";
2677 instance->model = ONCORE_UNKNOWN;
2678 }
2679 } else {
2680 cp = "Unknown";
2681 instance->model = ONCORE_UNKNOWN;
2682 }
2683
2684 /* use MODEL to set CHAN and TRAIM and possibly zero SHMEM */
2685
2686 sprintf(Msg, "This looks like an Oncore %s with version %d.%d firmware.", cp, instance->version, instance->revision);
2687 record_clock_stats(&(instance->peer->srcadr), Msg);
2688
2689 instance->chan_id = 8; /* default */
2690 if (instance->model == ONCORE_BASIC || instance->model == ONCORE_PVT6)
2691 instance->chan_id = 6;
2692 else if (instance->model == ONCORE_VP || instance->model == ONCORE_UT || instance->model == ONCORE_UTPLUS)
2693 instance->chan_id = 8;
2694 else if (instance->model == ONCORE_M12)
2695 instance->chan_id = 12;
2696
2697 instance->traim_id = 0; /* default */
2698 if (instance->model == ONCORE_BASIC || instance->model == ONCORE_PVT6)
2699 instance->traim_id = 0;
2700 else if (instance->model == ONCORE_VP || instance->model == ONCORE_UT || instance->model == ONCORE_UTPLUS)
2701 instance->traim_id = 1;
2702 else if (instance->model == ONCORE_M12)
2703 instance->traim_id = -1;
2704
2705 sprintf(Msg, "Channels = %d, TRAIM = %s", instance->chan_id,
2706 ((instance->traim_id < 0) ? "UNKNOWN" : ((instance->traim_id > 0) ? "ON" : "OFF")));
2707 record_clock_stats(&(instance->peer->srcadr), Msg);
2708 }
2709
2710
2711
2712 /* OK, know type of Oncore, have possibly reset it, and have tested it.
2713 * We know the number of channels.
2714 * We will determine whether we have TRAIM before we actually start.
2715 * Now initialize.
2716 */
2717
2718 static void
2719 oncore_msg_Cj_init(
2720 struct instance *instance,
2721 u_char *buf,
2722 size_t len
2723 )
2724 {
2725 char *cp, Msg[160];
2726 u_char Cmd[20];
2727 int mode;
2728
2729
2730 /* The M12 with 1.3 or 2.0 Firmware, loses track of all Satellites and has to
2731 * start again if we go from 0D -> 3D, then loses them again when we
2732 * go from 3D -> 0D. We do this to get a @@Ea message for SHMEM.
2733 * For NOW we will turn this aspect of filling SHMEM off for the M12
2734 */
2735
2736 if (instance->chan == 12) {
2737 instance->shmem_bad_Ea = 1;
2738 sprintf(Msg, "*** SHMEM partially enabled for ONCORE M12 s/w v%d.%d ***", instance->version, instance->revision);
2739 record_clock_stats(&(instance->peer->srcadr), Msg);
2740 }
2741
2742 oncore_sendmsg(instance->ttyfd, oncore_cmd_Cg, sizeof(oncore_cmd_Cg)); /* Return to Posn Fix mode */
2743 oncore_sendmsg(instance->ttyfd, oncore_cmd_Bb, sizeof(oncore_cmd_Bb)); /* turn on for shmem (6/8/12) */
2744 oncore_sendmsg(instance->ttyfd, oncore_cmd_Ek, sizeof(oncore_cmd_Ek)); /* turn off (VP) */
2745 oncore_sendmsg(instance->ttyfd, oncore_cmd_Aw, sizeof(oncore_cmd_Aw)); /* UTC time (6/8/12) */
2746 oncore_sendmsg(instance->ttyfd, oncore_cmd_AB, sizeof(oncore_cmd_AB)); /* Appl type static (VP) */
2747 oncore_sendmsg(instance->ttyfd, oncore_cmd_Be, sizeof(oncore_cmd_Be)); /* Tell us the Almanac for shmem (6/8/12) */
2748 oncore_sendmsg(instance->ttyfd, oncore_cmd_Bd, sizeof(oncore_cmd_Bd)); /* Tell us when Almanac changes */
2749
2750 mode = instance->init_type;
2751
2752 /* If there is Position input in the Config file
2753 * and mode = (1,3) set it as posn hold posn, goto 0D mode.
2754 * or mode = (2,4) set it as INITIAL position, and do Site Survey.
2755 */
2756
2757 if (instance->posn_set) {
2758 record_clock_stats(&(instance->peer->srcadr), "Setting Posn from input data");
2759 oncore_set_posn(instance); /* this should print posn indirectly thru the As cmd */
2760 } else /* must issue an @@At here to check on 6/8 Position Hold, set_posn would have */
2761 if (instance->chan != 12)
2762 oncore_sendmsg(instance->ttyfd, oncore_cmd_Atx, sizeof(oncore_cmd_Atx));
2763
2764 if (mode != 0) {
2765 /* cable delay in ns */
2766 memcpy(Cmd, oncore_cmd_Az, (size_t) sizeof(oncore_cmd_Az));
2767 w32_buf(&Cmd[-2+4], instance->delay);
2768 oncore_sendmsg(instance->ttyfd, Cmd, sizeof(oncore_cmd_Az)); /* 6,8,12 */
2769
2770 /* PPS offset in ns */
2771 if (instance->offset) {
2772 memcpy(Cmd, oncore_cmd_Ay, (size_t) sizeof(oncore_cmd_Ay)); /* some have it, some don't */
2773 w32_buf(&Cmd[-2+4], instance->offset); /* will check for hw response */
2774 oncore_sendmsg(instance->ttyfd, Cmd, sizeof(oncore_cmd_Ay));
2775 }
2776
2777 /* Satellite mask angle */
2778
2779 if (instance->Ag != 0xff) { /* will have 0xff in it if not set by user */
2780 memcpy(Cmd, oncore_cmd_Ag, (size_t) sizeof(oncore_cmd_Ag));
2781 Cmd[-2+4] = instance->Ag;
2782 oncore_sendmsg(instance->ttyfd, Cmd, sizeof(oncore_cmd_Ag));
2783 }
2784 }
2785
2786 /* 6, 8 12 chan - Position/Status/Data Output Message, 1/s
2787 * now we're really running
2788 * these were ALL started in the chan test,
2789 * However, if we had mode=3,4 then commands got turned off, so we turn
2790 * them on again here just in case
2791 */
2792
2793 if (instance->chan == 6) { /* start 6chan, kill 8,12chan commands, possibly testing VP in 6chan mode */
2794 oncore_sendmsg(instance->ttyfd, oncore_cmd_Ea0, sizeof(oncore_cmd_Ea0));
2795 oncore_sendmsg(instance->ttyfd, oncore_cmd_En0, sizeof(oncore_cmd_En0));
2796 oncore_sendmsg(instance->ttyfd, oncore_cmd_Ha0, sizeof(oncore_cmd_Ha0));
2797 oncore_sendmsg(instance->ttyfd, oncore_cmd_Hn0, sizeof(oncore_cmd_Hn0));
2798 oncore_sendmsg(instance->ttyfd, oncore_cmd_Ba, sizeof(oncore_cmd_Ba ));
2799 } else if (instance->chan == 8) { /* start 8chan, kill 6,12chan commands */
2800 oncore_sendmsg(instance->ttyfd, oncore_cmd_Ba0, sizeof(oncore_cmd_Ba0));
2801 oncore_sendmsg(instance->ttyfd, oncore_cmd_Bn0, sizeof(oncore_cmd_Bn0));
2802 oncore_sendmsg(instance->ttyfd, oncore_cmd_Ha0, sizeof(oncore_cmd_Ha0));
2803 oncore_sendmsg(instance->ttyfd, oncore_cmd_Hn0, sizeof(oncore_cmd_Hn0));
2804 oncore_sendmsg(instance->ttyfd, oncore_cmd_Ea, sizeof(oncore_cmd_Ea ));
2805 } else if (instance->chan == 12){ /* start 12chan, kill 6,12chan commands */
2806 oncore_sendmsg(instance->ttyfd, oncore_cmd_Ba0, sizeof(oncore_cmd_Ba0));
2807 oncore_sendmsg(instance->ttyfd, oncore_cmd_Bn0, sizeof(oncore_cmd_Bn0));
2808 oncore_sendmsg(instance->ttyfd, oncore_cmd_Ea0, sizeof(oncore_cmd_Ea0));
2809 oncore_sendmsg(instance->ttyfd, oncore_cmd_En0, sizeof(oncore_cmd_En0));
2810 oncore_sendmsg(instance->ttyfd, oncore_cmd_Ha, sizeof(oncore_cmd_Ha ));
2811 }
2812
2813 instance->count = 1;
2814 instance->o_state = ONCORE_ALMANAC;
2815 cp = "state = ONCORE_ALMANAC";
2816 record_clock_stats(&(instance->peer->srcadr), cp);
2817 }
2818
2819
2820
2821 /* 12chan position */
2822
2823 static void
2824 oncore_msg_Ga(
2825 struct instance *instance,
2826 u_char *buf,
2827 size_t len
2828 )
2829 {
2830 char Msg[160];
2831 long lat, lon, ht;
2832 double Lat, Lon, Ht;
2833
2834
2835 lat = buf_w32(&buf[4]);
2836 lon = buf_w32(&buf[8]);
2837 ht = buf_w32(&buf[12]); /* GPS ellipsoid */
2838
2839 Lat = lat;
2840 Lon = lon;
2841 Ht = ht;
2842
2843 Lat /= 3600000;
2844 Lon /= 3600000;
2845 Ht /= 100;
2846
2847
2848 sprintf(Msg, "Ga Posn Lat = %.7f, Lon = %.7f, Ht = %.2f", Lat, Lon, Ht);
2849 record_clock_stats(&(instance->peer->srcadr), Msg);
2850
2851 instance->ss_lat = lat;
2852 instance->ss_long = lon;
2853 instance->ss_ht = ht;
2854
2855 oncore_print_posn(instance);
2856 }
2857
2858
2859
2860 /* 12 chan time/date */
2861
2862 static void
2863 oncore_msg_Gb(
2864 struct instance *instance,
2865 u_char *buf,
2866 size_t len
2867 )
2868 {
2869 char Msg[160], *gmts;
2870 int mo, d, y, h, m, s, gmth, gmtm;
2871
2872 mo = buf[4];
2873 d = buf[5];
2874 y = 256*buf[6]+buf[7];
2875
2876 h = buf[8];
2877 m = buf[9];
2878 s = buf[10];
2879
2880 gmts = ((buf[11] == 0) ? "+" : "-");
2881 gmth = buf[12];
2882 gmtm = buf[13];
2883
2884 sprintf(Msg, "Date/Time set to: %d%s%d %2d:%02d:%02d GMT (GMT offset is %s%02d:%02d)",
2885 d, Month[mo-1], y, h, m, s, gmts, gmth, gmtm);
2886 record_clock_stats(&(instance->peer->srcadr), Msg);
2887 }
2888
2889
2890
2891 /* Leap Second for M12, gives all info from satellite message */
2892 /* also in UT v3.0 */
2893
2894 static void
2895 oncore_msg_Gj(
2896 struct instance *instance,
2897 u_char *buf,
2898 size_t len
2899 )
2900 {
2901 int dt;
2902 char Msg[160], *cp;
2903
2904 instance->saw_Gj = 1; /* flag, saw_Gj, dont need to try Bj in check_leap */
2905
2906 /* print the message to verify whats there */
2907
2908 dt = buf[5] - buf[4];
2909
2910 #if 1
2911 sprintf(Msg, "ONCORE[%d]: Leap Sec Msg: %d %d %d %d %d %d %d %d %d %d",
2912 instance->unit,
2913 buf[4], buf[5], 256*buf[6]+buf[7], buf[8], buf[9], buf[10],
2914 (buf[14]+256*(buf[13]+256*(buf[12]+256*buf[11]))),
2915 buf[15], buf[16], buf[17]);
2916 record_clock_stats(&(instance->peer->srcadr), Msg);
2917 #endif
2918 if (dt) {
2919 sprintf(Msg, "ONCORE[%d]: Leap second (%d) scheduled for %d%s%d at %d:%d:%d",
2920 instance->unit,
2921 dt, buf[9], Month[buf[8]-1], 256*buf[6]+buf[7],
2922 buf[15], buf[16], buf[17]);
2923 record_clock_stats(&(instance->peer->srcadr), Msg);
2924 }
2925
2926 /* Only raise warning within a month of the leap second */
2927
2928 instance->pp->leap = LEAP_NOWARNING;
2929 cp = "Set pp.leap to LEAP_NOWARNING";
2930
2931 if (buf[6] == instance->BEHa[6] && buf[7] == instance->BEHa[7] && /* year */
2932 buf[8] == instance->BEHa[4]) { /* month */
2933 if (dt) {
2934 if (dt < 0) {
2935 instance->pp->leap = LEAP_DELSECOND;
2936 cp = "Set pp.leap to LEAP_DELSECOND";
2937 } else {
2938 instance->pp->leap = LEAP_ADDSECOND;
2939 cp = "Set pp.leap to LEAP_ADDSECOND";
2940 }
2941 }
2942 }
2943 record_clock_stats(&(instance->peer->srcadr), cp);
2944 }
2945
2946
2947
2948 /* Power on failure */
2949
2950 static void
2951 oncore_msg_Sz(
2952 struct instance *instance,
2953 u_char *buf,
2954 size_t len
2955 )
2956 {
2957 const char *cp;
2958
2959 cp = "Oncore: System Failure at Power On";
2960 if (instance && instance->peer) {
2961 record_clock_stats(&(instance->peer->srcadr), cp);
2962 oncore_shutdown(instance->unit, instance->peer);
2963 }
2964 }
2965
2966 /************** Small Subroutines ***************/
2967
2968
2969 static void
2970 oncore_antenna_report(
2971 struct instance *instance,
2972 enum antenna_state new_state)
2973 {
2974 char *cp;
2975
2976 if (instance->ant_state == new_state)
2977 return;
2978
2979 switch (new_state) {
2980 case ONCORE_ANTENNA_OK: cp = "GPS antenna: OK"; break;
2981 case ONCORE_ANTENNA_OC: cp = "GPS antenna: short (overcurrent)"; break;
2982 case ONCORE_ANTENNA_UC: cp = "GPS antenna: open (not connected)"; break;
2983 case ONCORE_ANTENNA_NV: cp = "GPS antenna: short (no voltage)"; break;
2984 default: cp = "GPS antenna: ?"; break;
2985 }
2986
2987 instance->ant_state = new_state;
2988 record_clock_stats(&instance->peer->srcadr, cp);
2989 }
2990
2991
2992
2993 static void
2994 oncore_chan_test(
2995 struct instance *instance
2996 )
2997 {
2998 char *cp;
2999
3000 /* subroutine oncore_Cj_id has determined the number of channels from the
3001 * model number of the attached oncore. This is not always correct since
3002 * the oncore could have non-standard firmware. Here we check (independently) by
3003 * trying a 6, 8, and 12 chan command, and see which responds.
3004 * Caution: more than one CAN respond.
3005 *
3006 * This #chan is used by the code rather than that calculated from the model number.
3007 */
3008
3009 instance->o_state = ONCORE_CHECK_CHAN;
3010 cp = "state = ONCORE_CHECK_CHAN";
3011 record_clock_stats(&(instance->peer->srcadr), cp);
3012
3013 instance->count3 = 1;
3014 oncore_sendmsg(instance->ttyfd, oncore_cmd_Ba, sizeof(oncore_cmd_Ba));
3015 oncore_sendmsg(instance->ttyfd, oncore_cmd_Ea, sizeof(oncore_cmd_Ea));
3016 oncore_sendmsg(instance->ttyfd, oncore_cmd_Ha, sizeof(oncore_cmd_Ha));
3017 }
3018
3019
3020
3021 /* check for a GOOD Almanac, have we got one yet? */
3022
3023 static void
3024 oncore_check_almanac(
3025 struct instance *instance
3026 )
3027 {
3028 if (instance->chan == 6) {
3029 instance->rsm.bad_almanac = instance->BEHa[64]&0x1;
3030 instance->rsm.bad_fix = instance->BEHa[64]&0x52;
3031 } else if (instance->chan == 8) {
3032 instance->rsm.bad_almanac = instance->BEHa[72]&0x1;
3033 instance->rsm.bad_fix = instance->BEHa[72]&0x52;
3034 } else if (instance->chan == 12) {
3035 int bits1, bits2, bits3;
3036
3037 bits1 = (instance->BEHa[129]>>5) & 0x7; /* actually Ha */
3038 bits2 = instance->BEHa[130];
3039 instance->rsm.bad_almanac = (bits2 & 0x80);
3040 instance->rsm.bad_fix = (bits2 & 0x8) || (bits1 == 0x2);
3041 /* too few sat Bad Geom */
3042
3043 bits3 = instance->BEHa[141]; /* UTC parameters */
3044 if (!instance->count5_set && (bits3 & 0xC0)) {
3045 instance->count5 = 2;
3046 instance->count5_set = 1;
3047 }
3048 #if 0
3049 {
3050 char Msg[160];
3051
3052 sprintf(Msg, "ONCORE[%d]: DEBUG BITS: (%x %x), (%x %x %x), %x %x %x %x %x\n",
3053 instance->unit,
3054 instance->BEHa[129], instance->BEHa[130], bits1, bits2, bits3, instance->mode == MODE_0D,
3055 instance->mode == MODE_2D, instance->mode == MODE_3D,
3056 instance->rsm.bad_almanac, instance->rsm.bad_fix);
3057 record_clock_stats(&(instance->peer->srcadr), Msg);
3058 }
3059 #endif
3060 }
3061 }
3062
3063
3064
3065 /* check the antenna for changes (did it get unplugged?) */
3066
3067 static void
3068 oncore_check_antenna(
3069 struct instance *instance
3070 )
3071 {
3072 enum antenna_state antenna; /* antenna state */
3073
3074 antenna = instance->ant_state;
3075 if (instance->chan == 12)
3076 antenna = (instance->BEHa[130] & 0x6 ) >> 1;
3077 else
3078 antenna = (instance->BEHa[37] & 0xc0) >> 6; /* prob unset 6, set GT, UT unset VP */
3079
3080 oncore_antenna_report (instance, antenna);
3081 }
3082
3083
3084
3085 /*
3086 * Check the leap second status once per day.
3087 *
3088 * Note that the ONCORE firmware for the Bj command is wrong at
3089 * least in the VP.
3090 * It starts advertising a LEAP SECOND as soon as the GPS satellite
3091 * data message (page 18, subframe 4) is updated to a date in the
3092 * future, and does not wait for the month that it will occur.
3093 * The event will usually be advertised several months in advance.
3094 * Since there is a one bit flag, there is no way to tell if it is
3095 * this month, or when...
3096 *
3097 * As such, we have the workaround below, of only checking for leap
3098 * seconds with the Bj command in June/December.
3099 *
3100 * The Gj command gives more information, and we can tell in which
3101 * month to apply the correction.
3102 *
3103 * Note that with the VP we COULD read the raw data message, and
3104 * interpret it ourselves, but since this is specific to this receiver
3105 * only, and the above workaround is adequate, we don't bother.
3106 */
3107
3108 static void
3109 oncore_check_leap_sec(
3110 struct instance *instance
3111 )
3112 {
3113 if (instance->Bj_day != instance->BEHa[5]) { /* do this 1/day */
3114 instance->Bj_day = instance->BEHa[5];
3115
3116 if (instance->saw_Gj < 0) { /* -1 DONT have Gj use Bj */
3117 if ((instance->BEHa[4] == 6) || (instance->BEHa[4] == 12))
3118 oncore_sendmsg(instance->ttyfd, oncore_cmd_Bj, sizeof(oncore_cmd_Bj));
3119 return;
3120 }
3121
3122 if (instance->saw_Gj == 0) /* 0 is dont know if we have Gj */
3123 instance->count4 = 1;
3124
3125 oncore_sendmsg(instance->ttyfd, oncore_cmd_Gj, sizeof(oncore_cmd_Gj));
3126 return;
3127 }
3128
3129 /* Gj works for some 6/8 chan UT and the M12 */
3130 /* if no response from Gj in 5 sec, we try Bj */
3131 /* which isnt implemented in all the GT/UT either */
3132
3133 if (instance->count4) { /* delay, waiting for Gj response */
3134 if (instance->saw_Gj == 1)
3135 instance->count4 = 0;
3136 else if (instance->count4++ > 5) { /* delay, waiting for Gj response */
3137 instance->saw_Gj = -1; /* didnt see it, will use Bj */
3138 instance->count4 = 0;
3139 if ((instance->BEHa[4] == 6) || (instance->BEHa[4] == 12))
3140 oncore_sendmsg(instance->ttyfd, oncore_cmd_Bj, sizeof(oncore_cmd_Bj));
3141 }
3142 }
3143 }
3144
3145
3146
3147 /* check the message checksum,
3148 * buf points to START of message ( @@ )
3149 * len is length WITH CR/LF.
3150 */
3151
3152 static int
3153 oncore_checksum_ok(
3154 u_char *buf,
3155 int len
3156 )
3157 {
3158 int i, j;
3159
3160 j = 0;
3161 for (i = 2; i < len-3; i++)
3162 j ^= buf[i];
3163
3164 return(j == buf[len-3]);
3165 }
3166
3167
3168
3169 static void
3170 oncore_compute_dH(
3171 struct instance *instance
3172 )
3173 {
3174 int GPS, MSL;
3175 char Msg[160];
3176
3177 /* Here calculate dH = GPS - MSL for output message */
3178 /* also set Altitude Hold mode if GT */
3179
3180 instance->have_dH = 1;
3181 if (instance->chan == 12) {
3182 GPS = buf_w32(&instance->BEHa[39]);
3183 MSL = buf_w32(&instance->BEHa[43]);
3184 } else {
3185 GPS = buf_w32(&instance->BEHa[23]);
3186 MSL = buf_w32(&instance->BEHa[27]);
3187 }
3188 instance->dH = GPS - MSL;
3189 instance->dH /= 100.;
3190
3191 /* if MSL is not set, the calculation is meaningless */
3192
3193 if (MSL) { /* not set ! */
3194 sprintf(Msg, "dH = (GPS - MSL) = %.2fm", instance->dH);
3195 record_clock_stats(&(instance->peer->srcadr), Msg);
3196 }
3197 }
3198
3199
3200
3201 /*
3202 * try loading Almanac from shmem (where it was copied from shmem_old
3203 */
3204
3205 static void
3206 oncore_load_almanac(
3207 struct instance *instance
3208 )
3209 {
3210 u_char *cp, Cmd[20];
3211 int n;
3212 struct timeval tv;
3213 struct tm *tm;
3214
3215 if (!instance->shmem)
3216 return;
3217
3218 #if 1
3219 for (cp=instance->shmem+4; (n = 256*(*(cp-3)) + *(cp-2)); cp+=(n+3)) {
3220 if (!strncmp((char *) cp, "@@Cb", 4) &&
3221 oncore_checksum_ok(cp, 33) &&
3222 (*(cp+4) == 4 || *(cp+4) == 5)) {
3223 write(instance->ttyfd, cp, n);
3224 #if 1
3225 oncore_print_Cb(instance, cp);
3226 #endif
3227 }
3228 }
3229 #else
3230 /************DEBUG************/
3231 for (cp=instance->shmem+4; (n = 256*(*(cp-3)) + *(cp-2)); cp+=(n+3)) {
3232 char Msg[160];
3233
3234 sprintf(Msg, "See %c%c%c%c %d", *(cp), *(cp+1), *(cp+2), *(cp+3), *(cp+4));
3235 record_clock_stats(&(instance->peer->srcadr), Msg);
3236
3237 if (!strncmp(cp, "@@Cb", 4)) {
3238 oncore_print_Cb(instance, cp);
3239 if (oncore_checksum_ok(cp, 33)) {
3240 if (*(cp+4) == 4 || *(cp+4) == 5) {
3241 record_clock_stats(&(instance->peer->srcadr), "GOOD SF");
3242 write(instance->ttyfd, cp, n);
3243 } else
3244 record_clock_stats(&(instance->peer->srcadr), "BAD SF");
3245 } else
3246 record_clock_stats(&(instance->peer->srcadr), "BAD CHECKSUM");
3247 }
3248 }
3249 /************DEBUG************/
3250 #endif
3251
3252 /* Must load position and time or the Almanac doesn't do us any good */
3253
3254 if (!instance->posn_set) { /* if we input a posn use it, else from SHMEM */
3255 record_clock_stats(&(instance->peer->srcadr), "Loading Posn from SHMEM");
3256 for (cp=instance->shmem+4; (n = 256*(*(cp-3)) + *(cp-2)); cp+=(n+3)) {
3257 if ((instance->chan == 6 && (!strncmp((char *) cp, "@@Ba", 4) && oncore_checksum_ok(cp, 68))) ||
3258 (instance->chan == 8 && (!strncmp((char *) cp, "@@Ea", 4) && oncore_checksum_ok(cp, 76))) ||
3259 (instance->chan == 12 && (!strncmp((char *) cp, "@@Ha", 4) && oncore_checksum_ok(cp, 154)))) {
3260 int ii, jj, kk;
3261
3262 instance->posn_set = 1;
3263 ii = buf_w32(cp + 15);
3264 jj = buf_w32(cp + 19);
3265 kk = buf_w32(cp + 23);
3266 #if 0
3267 {
3268 char Msg[160];
3269 sprintf(Msg, "SHMEM posn = %ld (%d, %d, %d)", (long) (cp-instance->shmem), ii, jj, kk);
3270 record_clock_stats(&(instance->peer->srcadr), Msg);
3271 }
3272 #endif
3273 if (ii != 0 || jj != 0 || kk != 0) { /* phk asked for this test */
3274 instance->ss_lat = ii;
3275 instance->ss_long = jj;
3276 instance->ss_ht = kk;
3277 }
3278 }
3279 }
3280 }
3281 oncore_set_posn(instance);
3282
3283 /* and set time to time from Computer clock */
3284
3285 {
3286 /*
3287 * XXX NetBSD (@20060729 all variants) defines tv_sec as a long
3288 * -> not SUS standard and doesn't even work within the system
3289 * without kludges like the one below
3290 */
3291
3292 time_t help;
3293 gettimeofday(&tv, 0);
3294 help = tv.tv_sec; /* cope with type mismatches */
3295 tm = gmtime(&help);
3296 }
3297 #if 1
3298 {
3299 char Msg[160];
3300 sprintf(Msg, "DATE %d %d %d, %d %d %d", 1900+tm->tm_year, tm->tm_mon, tm->tm_mday,
3301 tm->tm_hour, tm->tm_min, tm->tm_sec);
3302 record_clock_stats(&(instance->peer->srcadr), Msg);
3303 }
3304 #endif
3305 if (instance->chan == 12) {
3306 memcpy(Cmd, oncore_cmd_Gb, (size_t) sizeof(oncore_cmd_Gb));
3307 Cmd[-2+4] = tm->tm_mon + 1;
3308 Cmd[-2+5] = tm->tm_mday;
3309 Cmd[-2+6] = (1900+tm->tm_year)/256;
3310 Cmd[-2+7] = (1900+tm->tm_year)%256;
3311 Cmd[-2+8] = tm->tm_hour;
3312 Cmd[-2+9] = tm->tm_min;
3313 Cmd[-2+10] = tm->tm_sec;
3314 Cmd[-2+11] = 0;
3315 Cmd[-2+12] = 0;
3316 Cmd[-2+13] = 0;
3317 oncore_sendmsg(instance->ttyfd, Cmd, sizeof(oncore_cmd_Gb));
3318 } else {
3319 /* First set GMT offset to zero */
3320
3321 oncore_sendmsg(instance->ttyfd, oncore_cmd_Ab, sizeof(oncore_cmd_Ab));
3322
3323 memcpy(Cmd, oncore_cmd_Ac, (size_t) sizeof(oncore_cmd_Ac));
3324 Cmd[-2+4] = tm->tm_mon + 1;
3325 Cmd[-2+5] = tm->tm_mday;
3326 Cmd[-2+6] = (1900+tm->tm_year)/256;
3327 Cmd[-2+7] = (1900+tm->tm_year)%256;
3328 oncore_sendmsg(instance->ttyfd, Cmd, sizeof(oncore_cmd_Ac));
3329
3330 memcpy(Cmd, oncore_cmd_Aa, (size_t) sizeof(oncore_cmd_Aa));
3331 Cmd[-2+4] = tm->tm_hour;
3332 Cmd[-2+5] = tm->tm_min;
3333 Cmd[-2+6] = tm->tm_sec;
3334 oncore_sendmsg(instance->ttyfd, Cmd, sizeof(oncore_cmd_Aa));
3335 }
3336
3337 record_clock_stats(&(instance->peer->srcadr), "Setting Posn and Time after Loading Almanac");
3338 }
3339
3340
3341
3342 /* Almanac data input */
3343
3344 static void
3345 oncore_print_Cb(
3346 struct instance *instance,
3347 u_char *cp
3348 )
3349 {
3350 #if 0
3351 int ii;
3352 char Msg[160];
3353
3354 printf("DEBUG: See: %c%c%c%c\n", *(cp), *(cp+1), *(cp+2), *(cp+3));
3355 printf("DEBUG: Cb: [%d,%d]", *(cp+4), *(cp+5));
3356 for(ii=0; ii<33; ii++)
3357 printf(" %d", *(cp+ii));
3358 printf("\n");
3359
3360 sprintf(Msg, "Debug: Cb: [%d,%d]", *(cp+4), *(cp+5));
3361 record_clock_stats(&(instance->peer->srcadr), Msg);
3362 #endif
3363 }
3364
3365
3366 #if 0
3367 static void
3368 oncore_print_array(
3369 u_char *cp,
3370 int n
3371 )
3372 {
3373 int jj, i, j, nn;
3374
3375 nn = 0;
3376 printf("\nTOP\n");
3377 jj = n/16;
3378 for (j=0; j<jj; j++) {
3379 printf("%4d: ", nn);
3380 nn += 16;
3381 for (i=0; i<16; i++)
3382 printf(" %o", *cp++);
3383 printf("\n");
3384 }
3385 }
3386 #endif
3387
3388
3389 static void
3390 oncore_print_posn(
3391 struct instance *instance
3392 )
3393 {
3394 char Msg[120], ew, ns;
3395 double xd, xm, xs, yd, ym, ys, hm, hft;
3396 int idx, idy, is, imx, imy;
3397 long lat, lon;
3398
3399 record_clock_stats(&(instance->peer->srcadr), "Posn:");
3400 ew = 'E';
3401 lon = instance->ss_long;
3402 if (lon < 0) {
3403 ew = 'W';
3404 lon = -lon;
3405 }
3406
3407 ns = 'N';
3408 lat = instance->ss_lat;
3409 if (lat < 0) {
3410 ns = 'S';
3411 lat = -lat;
3412 }
3413
3414 hm = instance->ss_ht/100.;
3415 hft= hm/0.3048;
3416
3417 xd = lat/3600000.; /* lat, lon in int msec arc, ht in cm. */
3418 yd = lon/3600000.;
3419 sprintf(Msg, "Lat = %c %11.7fdeg, Long = %c %11.7fdeg, Alt = %5.2fm (%5.2fft) GPS", ns, xd, ew, yd, hm, hft);
3420 record_clock_stats(&(instance->peer->srcadr), Msg);
3421
3422 idx = xd;
3423 idy = yd;
3424 imx = lat%3600000;
3425 imy = lon%3600000;
3426 xm = imx/60000.;
3427 ym = imy/60000.;
3428 sprintf(Msg,
3429 "Lat = %c %3ddeg %7.4fm, Long = %c %3ddeg %8.5fm, Alt = %7.2fm (%7.2fft) GPS", ns, idx, xm, ew, idy, ym, hm, hft);
3430 record_clock_stats(&(instance->peer->srcadr), Msg);
3431
3432 imx = xm;
3433 imy = ym;
3434 is = lat%60000;
3435 xs = is/1000.;
3436 is = lon%60000;
3437 ys = is/1000.;
3438 sprintf(Msg,
3439 "Lat = %c %3ddeg %2dm %5.2fs, Long = %c %3ddeg %2dm %5.2fs, Alt = %7.2fm (%7.2fft) GPS", ns, idx, imx, xs, ew, idy, imy, ys, hm, hft);
3440 record_clock_stats(&(instance->peer->srcadr), Msg);
3441 }
3442
3443
3444
3445 /*
3446 * write message to Oncore.
3447 */
3448
3449 static void
3450 oncore_sendmsg(
3451 int fd,
3452 u_char *ptr,
3453 size_t len
3454 )
3455 {
3456 u_char cs = 0;
3457
3458 #ifdef DEBUG
3459 if (debug > 4)
3460 printf("ONCORE: Send @@%c%c %d\n", ptr[0], ptr[1], (int) len);
3461 #endif
3462 write(fd, "@@", (size_t) 2);
3463 write(fd, ptr, len);
3464 while (len--)
3465 cs ^= *ptr++;
3466 write(fd, &cs, (size_t) 1);
3467 write(fd, "\r\n", (size_t) 2);
3468 }
3469
3470
3471
3472 static void
3473 oncore_set_posn(
3474 struct instance *instance
3475 )
3476 {
3477 int mode;
3478 u_char Cmd[20];
3479
3480 /* Turn OFF position hold, it needs to be off to set position (for some units),
3481 will get set ON in @@Ea later */
3482
3483 if (instance->chan == 12)
3484 oncore_sendmsg(instance->ttyfd, oncore_cmd_Gd0, sizeof(oncore_cmd_Gd0)); /* (12) */
3485 else {
3486 oncore_sendmsg(instance->ttyfd, oncore_cmd_At0, sizeof(oncore_cmd_At0)); /* (6/8) */
3487 oncore_sendmsg(instance->ttyfd, oncore_cmd_Av0, sizeof(oncore_cmd_Av0)); /* (6/8) */
3488 }
3489
3490 mode = instance->init_type;
3491
3492 if (mode != 0) { /* first set posn hold position */
3493 memcpy(Cmd, oncore_cmd_As, (size_t) sizeof(oncore_cmd_As)); /* don't modify static variables */
3494 w32_buf(&Cmd[-2+4], (int) instance->ss_lat);
3495 w32_buf(&Cmd[-2+8], (int) instance->ss_long);
3496 w32_buf(&Cmd[-2+12], (int) instance->ss_ht);
3497 Cmd[-2+16] = 0;
3498 oncore_sendmsg(instance->ttyfd, Cmd, sizeof(oncore_cmd_As)); /* posn hold 3D posn (6/8/12) */
3499
3500 memcpy(Cmd, oncore_cmd_Au, (size_t) sizeof(oncore_cmd_Au));
3501 w32_buf(&Cmd[-2+4], (int) instance->ss_ht);
3502 Cmd[-2+8] = 0;
3503 oncore_sendmsg(instance->ttyfd, Cmd, sizeof(oncore_cmd_Au)); /* altitude hold (6/8/12 not UT, M12T) */
3504
3505 /* next set current position */
3506
3507 if (instance->chan == 12) {
3508 memcpy(Cmd, oncore_cmd_Ga, (size_t) sizeof(oncore_cmd_Ga));
3509 w32_buf(&Cmd[-2+4], (int) instance->ss_lat);
3510 w32_buf(&Cmd[-2+8], (int) instance->ss_long);
3511 w32_buf(&Cmd[-2+12],(int) instance->ss_ht);
3512 Cmd[-2+16] = 0;
3513 oncore_sendmsg(instance->ttyfd, Cmd, sizeof(oncore_cmd_Ga)); /* 3d posn (12) */
3514 } else {
3515 memcpy(Cmd, oncore_cmd_Ad, (size_t) sizeof(oncore_cmd_Ad));
3516 w32_buf(&Cmd[-2+4], (int) instance->ss_lat);
3517 oncore_sendmsg(instance->ttyfd, Cmd, sizeof(oncore_cmd_Ad)); /* lat (6/8) */
3518
3519 memcpy(Cmd, oncore_cmd_Ae, (size_t) sizeof(oncore_cmd_Ae));
3520 w32_buf(&Cmd[-2+4], (int) instance->ss_long);
3521 oncore_sendmsg(instance->ttyfd, Cmd, sizeof(oncore_cmd_Ae)); /* long (6/8) */
3522
3523 memcpy(Cmd, oncore_cmd_Af, (size_t) sizeof(oncore_cmd_Af));
3524 w32_buf(&Cmd[-2+4], (int) instance->ss_ht);
3525 Cmd[-2+8] = 0;
3526 oncore_sendmsg(instance->ttyfd, Cmd, sizeof(oncore_cmd_Af)); /* ht (6/8) */
3527 }
3528
3529 /* Finally, turn on position hold */
3530
3531 if (instance->chan == 12)
3532 oncore_sendmsg(instance->ttyfd, oncore_cmd_Gd1, sizeof(oncore_cmd_Gd1));
3533 else
3534 oncore_sendmsg(instance->ttyfd, oncore_cmd_At1, sizeof(oncore_cmd_At1));
3535 }
3536 }
3537
3538
3539
3540 static void
3541 oncore_set_traim(
3542 struct instance *instance
3543 )
3544 {
3545 char Msg[160];
3546
3547 if (instance->traim_in != -1) /* set in Input */
3548 instance->traim = instance->traim_in;
3549 else
3550 instance->traim = instance->traim_ck;
3551
3552 sprintf(Msg, "Input says TRAIM = %d", instance->traim_in);
3553 record_clock_stats(&(instance->peer->srcadr), Msg);
3554 sprintf(Msg, "Model # says TRAIM = %d", instance->traim_id);
3555 record_clock_stats(&(instance->peer->srcadr), Msg);
3556 sprintf(Msg, "Testing says TRAIM = %d", instance->traim_ck);
3557 record_clock_stats(&(instance->peer->srcadr), Msg);
3558 sprintf(Msg, "Using TRAIM = %d", instance->traim);
3559 record_clock_stats(&(instance->peer->srcadr), Msg);
3560
3561 if (instance->traim_ck == 1 && instance->traim == 0) {
3562 /* if it should be off, and I turned it on during testing,
3563 then turn it off again */
3564 if (instance->chan == 6)
3565 oncore_sendmsg(instance->ttyfd, oncore_cmd_Bnx, sizeof(oncore_cmd_Bnx));
3566 else if (instance->chan == 8)
3567 oncore_sendmsg(instance->ttyfd, oncore_cmd_Enx, sizeof(oncore_cmd_Enx));
3568 else /* chan == 12 */
3569 oncore_sendmsg(instance->ttyfd, oncore_cmd_Ge0, sizeof(oncore_cmd_Ge0));
3570 oncore_sendmsg(instance->ttyfd, oncore_cmd_Hn0, sizeof(oncore_cmd_Hn0));
3571 }
3572 }
3573
3574
3575
3576 /*
3577 * if SHMEM active, every 15s, steal one 'tick' to get 2D or 3D posn.
3578 */
3579
3580 static void
3581 oncore_shmem_get_3D(
3582 struct instance *instance
3583 )
3584 {
3585 if (instance->pp->second%15 == 3) { /* start the sequence */ /* by changing mode */
3586 instance->shmem_reset = 1;
3587 if (instance->chan == 12) {
3588 if (instance->shmem_Posn == 2)
3589 oncore_sendmsg(instance->ttyfd, oncore_cmd_Gd2, sizeof(oncore_cmd_Gd2)); /* 2D */
3590 else
3591 oncore_sendmsg(instance->ttyfd, oncore_cmd_Gd0, sizeof(oncore_cmd_Gd0)); /* 3D */
3592 } else {
3593 if (instance->saw_At) { /* out of 0D -> 3D mode */
3594 oncore_sendmsg(instance->ttyfd, oncore_cmd_At0, sizeof(oncore_cmd_At0));
3595 if (instance->shmem_Posn == 2) /* 3D -> 2D mode */
3596 oncore_sendmsg(instance->ttyfd, oncore_cmd_Av1, sizeof(oncore_cmd_Av1));
3597 } else
3598 oncore_sendmsg(instance->ttyfd, oncore_cmd_Av0, sizeof(oncore_cmd_Av0));
3599 }
3600 } else if (instance->shmem_reset || (instance->mode != MODE_0D)) {
3601 instance->shmem_reset = 0;
3602 if (instance->chan == 12)
3603 oncore_sendmsg(instance->ttyfd, oncore_cmd_Gd1, sizeof(oncore_cmd_Gd1)); /* 0D */
3604 else {
3605 if (instance->saw_At) {
3606 if (instance->mode == MODE_2D) /* 2D -> 3D or 0D mode */
3607 oncore_sendmsg(instance->ttyfd, oncore_cmd_Av0, sizeof(oncore_cmd_Av0));
3608 oncore_sendmsg(instance->ttyfd, oncore_cmd_At1, sizeof(oncore_cmd_At1)); /* to 0D mode */
3609 } else
3610 oncore_sendmsg(instance->ttyfd, oncore_cmd_Av1, sizeof(oncore_cmd_Av1));
3611 }
3612 }
3613 }
3614
3615
3616
3617 /*
3618 * Here we do the Software SiteSurvey.
3619 * We have to average our own position for the Position Hold Mode
3620 * We use Heights from the GPS ellipsoid.
3621 * We check for the END of either HW or SW SiteSurvey.
3622 */
3623
3624 static void
3625 oncore_ss(
3626 struct instance *instance
3627 )
3628 {
3629 char *cp, Msg[160];
3630 double lat, lon, ht;
3631
3632
3633 if (instance->site_survey == ONCORE_SS_HW) {
3634 /*
3635 * Check to see if Hardware SiteSurvey has Finished.
3636 */
3637
3638 if ((instance->chan == 8 && !(instance->BEHa[37] & 0x20)) ||
3639 (instance->chan == 12 && !(instance->BEHa[130] & 0x10))) {
3640 record_clock_stats(&(instance->peer->srcadr), "Now in 0D mode");
3641
3642 if (instance->chan == 12)
3643 oncore_sendmsg(instance->ttyfd, oncore_cmd_Gax, sizeof(oncore_cmd_Gax));
3644 else
3645 oncore_sendmsg(instance->ttyfd, oncore_cmd_Asx, sizeof(oncore_cmd_Asx));
3646
3647 cp = "SSstate = ONCORE_SS_DONE";
3648 record_clock_stats(&(instance->peer->srcadr), cp);
3649 instance->site_survey = ONCORE_SS_DONE;
3650 }
3651 } else {
3652 /*
3653 * Must be a Software Site Survey.
3654 */
3655
3656 if (instance->rsm.bad_fix) /* Not if poor geometry or less than 3 sats */
3657 return;
3658
3659 if (instance->mode != MODE_3D) /* Use only 3D Fixes */
3660 return;
3661
3662 instance->ss_lat += buf_w32(&instance->BEHa[15]);
3663 instance->ss_long += buf_w32(&instance->BEHa[19]);
3664 instance->ss_ht += buf_w32(&instance->BEHa[23]); /* GPS ellipsoid */
3665 instance->ss_count++;
3666
3667 if (instance->ss_count != POS_HOLD_AVERAGE)
3668 return;
3669
3670 instance->ss_lat /= POS_HOLD_AVERAGE;
3671 instance->ss_long /= POS_HOLD_AVERAGE;
3672 instance->ss_ht /= POS_HOLD_AVERAGE;
3673
3674 sprintf(Msg, "Surveyed posn: lat %.3f (mas) long %.3f (mas) ht %.3f (cm)",
3675 instance->ss_lat, instance->ss_long, instance->ss_ht);
3676 record_clock_stats(&(instance->peer->srcadr), Msg);
3677 lat = instance->ss_lat/3600000.;
3678 lon = instance->ss_long/3600000.;
3679 ht = instance->ss_ht/100;
3680 sprintf(Msg, "Surveyed posn: lat %.7f (deg) long %.7f (deg) ht %.2f (m)",
3681 lat, lon, ht);
3682 record_clock_stats(&(instance->peer->srcadr), Msg);
3683
3684 oncore_set_posn(instance);
3685
3686 record_clock_stats(&(instance->peer->srcadr), "Now in 0D mode");
3687
3688 cp = "SSstate = ONCORE_SS_DONE";
3689 record_clock_stats(&(instance->peer->srcadr), cp);
3690 instance->site_survey = ONCORE_SS_DONE;
3691 }
3692 }
3693
3694
3695
3696 static int
3697 oncore_wait_almanac(
3698 struct instance *instance
3699 )
3700 {
3701 if (instance->rsm.bad_almanac) {
3702 #ifdef DEBUG
3703 if (debug)
3704 printf("ONCORE[%d]: waiting for almanac\n", instance->unit);
3705 #endif
3706
3707 /*
3708 * If we get here (first time) then we don't have an almanac in memory.
3709 * Check if we have a SHMEM, and if so try to load whatever is there.
3710 */
3711
3712 if (!instance->almanac_from_shmem) {
3713 instance->almanac_from_shmem = 1;
3714 oncore_load_almanac(instance);
3715 }
3716 return(1);
3717 } else { /* Here we have the Almanac, we will be starting the @@Bn/@@En/@@Hn
3718 commands, and can finally check for TRAIM. Again, we set a delay
3719 (5sec) and wait for things to settle down */
3720
3721 if (instance->chan == 6)
3722 oncore_sendmsg(instance->ttyfd, oncore_cmd_Bn, sizeof(oncore_cmd_Bn));
3723 else if (instance->chan == 8)
3724 oncore_sendmsg(instance->ttyfd, oncore_cmd_En, sizeof(oncore_cmd_En));
3725 else if (instance->chan == 12) {
3726 oncore_sendmsg(instance->ttyfd, oncore_cmd_Gc, sizeof(oncore_cmd_Gc)); /* 1PPS on, continuous */
3727 oncore_sendmsg(instance->ttyfd, oncore_cmd_Ge, sizeof(oncore_cmd_Ge)); /* TRAIM on */
3728 oncore_sendmsg(instance->ttyfd, oncore_cmd_Hn, sizeof(oncore_cmd_Hn)); /* TRAIM status 1/s */
3729 }
3730 instance->traim_delay = 1;
3731
3732 record_clock_stats(&(instance->peer->srcadr), "Have now loaded an ALMANAC");
3733
3734 instance->o_state = ONCORE_RUN;
3735 record_clock_stats(&(instance->peer->srcadr), "state = ONCORE_RUN");
3736 }
3737 return(0);
3738 }
3739
3740
3741
3742 #else
3743 int refclock_oncore_bs;
3744 #endif /* REFCLOCK */
NetBSD on the FriendlyARM MINI2440