sys/arch/acorn32/eb7500atx/rside.c

   1 /*      $NetBSD: rside.c,v 1.9 2008/03/18 20:46:35 cube Exp $   */
   2
   3 /*
   4  * Copyright (c) 2004 Christopher Gilbert
   5  * All rights reserved.
   6  *
   7  * 1. Redistributions of source code must retain the above copyright
   8  *    notice, this list of conditions and the following disclaimer.
   9  * 2. Redistributions in binary form must reproduce the above copyright
  10  *    notice, this list of conditions and the following disclaimer in the
  11  *    documentation and/or other materials provided with the distribution.
  12  * 3. The name of the author may be used to endorse or promote products
  13  *    derived from this software without specific prior written permission.
  14  *
  15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
  16  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  17  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  18  * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
  19  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  20  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  21  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  25  * SUCH DAMAGE.
  26  */
  27 /*
  28  * Copyright (c) 1997-1998 Mark Brinicombe
  29  * Copyright (c) 1997-1998 Causality Limited
  30  *
  31  * Redistribution and use in source and binary forms, with or without
  32  * modification, are permitted provided that the following conditions
  33  * are met:
  34  * 1. Redistributions of source code must retain the above copyright
  35  *    notice, this list of conditions and the following disclaimer.
  36  * 2. Redistributions in binary form must reproduce the above copyright
  37  *    notice, this list of conditions and the following disclaimer in the
  38  *    documentation and/or other materials provided with the distribution.
  39  * 3. All advertising materials mentioning features or use of this software
  40  *    must display the following acknowledgement:
  41  *      This product includes software developed by Mark Brinicombe
  42  *      for the NetBSD Project.
  43  * 4. The name of the author may not be used to endorse or promote products
  44  *    derived from this software without specific prior written permission.
  45  *
  46  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  47  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  48  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  49  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  50  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  51  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  52  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  53  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  54  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  55  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  56  */
  57
  58 #include <sys/cdefs.h>
  59 __KERNEL_RCSID(0, "$NetBSD: rside.c,v 1.9 2008/03/18 20:46:35 cube Exp $");
  60
  61 #include <sys/param.h>
  62 #include <sys/systm.h>
  63 #include <sys/conf.h>
  64 #include <sys/device.h>
  65 #include <sys/malloc.h>
  66
  67 #include <machine/intr.h>
  68 #include <machine/io.h>
  69 #include <machine/bus.h>
  70 #include <acorn32/eb7500atx/rsidereg.h>
  71 #include <machine/irqhandler.h>
  72
  73 #include <dev/ata/atavar.h>
  74 #include <dev/ic/wdcvar.h>
  75 #include <acorn32/eb7500atx/rsbus.h>
  76
  77 /*
  78  * RiscStation IDE device.
  79  *
  80  * This probes and attaches the top level IDE device to the rsbus.
  81  * It then configures any children of the IDE device.
  82  * The attach args specify whether it is configuring the primary or
  83  * secondary channel.
  84  * The children are expected to be wdc devices using rside attachments.
  85  *
  86  * The hardware notes are:
  87  * Two ide ports are fitted, each with registers spaced 0x40 bytes apart
  88  * with the extra control register at offset 0x380 from the base of the
  89  * port.
  90  *
  91  * Primary:
  92  *      Registers at 0x302b800 (nPCCS1 + 0x0)
  93  *      IRQ connected to nEvent1 (IRQ register D)
  94  *
  95  * Secondary:
  96  *      Registers at 0x302bc00 (nPCCS1 + 0x400)
  97  *      IRQ connected to nEvent2 (IRQ register D)
  98  *
  99  * PIO timings can be changed by modifying the access speed register in the
 100  * IOMD, as there is nothing else in the nPCCS1 space.
 101  *
 102  * The Reset line is asserted by unsetting bit 4 in IO register
 103  * IOMD + 0x121CC.
 104  */
 105
 106 /*
 107  * RiscStation IDE card softc structure.
 108  *
 109  * Contains the device node, and global information required by the driver
 110  */
 111
 112 struct rside_softc {
 113         struct wdc_softc        sc_wdcdev;      /* common wdc definitions */
 114         struct ata_channel      *sc_chanarray[2]; /* channels definition */
 115         struct bus_space        sc_tag;                 /* custom tag */
 116         struct rside_channel {
 117                 struct ata_channel rc_channel;          /* generic part */
 118                 struct ata_queue rc_chqueue;            /* channel queue */
 119                 irqhandler_t *rc_ih;                    /* irq handler */
 120         } rside_channels[2];
 121         struct wdc_regs sc_wdc_regs[2];
 122 };
 123
 124 static int      rside_probe     (device_t, cfdata_t, void *);
 125 static void     rside_attach    (device_t, device_t, void *);
 126
 127 CFATTACH_DECL_NEW(rside, sizeof(struct rside_softc),
 128                 rside_probe, rside_attach, NULL, NULL);
 129
 130 /*
 131  * Create an array of address structures. These define the addresses and
 132  * masks needed for the different channels.
 133  *
 134  * index = channel
 135  */
 136
 137 const struct {
 138         u_int drive_registers;
 139         u_int aux_register;
 140 } rside_info[] = {
 141         { PRIMARY_DRIVE_REGISTERS_POFFSET, PRIMARY_AUX_REGISTER_POFFSET },
 142         { SECONDARY_DRIVE_REGISTERS_POFFSET, SECONDARY_AUX_REGISTER_POFFSET }
 143 };
 144
 145 /*
 146  * Card probe function
 147  */
 148
 149 static int
 150 rside_probe(device_t parent, cfdata_t cf, void *aux)
 151 {
 152         /* if we're including this, then for now assume it exists */
 153         return 1;
 154 }
 155
 156 /*
 157  * Card attach function
 158  *
 159  */
 160
 161 static void
 162 rside_attach(device_t parent, device_t self, void *aux)
 163 {
 164         struct rside_softc *sc = device_private(self);
 165         struct rsbus_attach_args *rs = aux;
 166         int channel, i;
 167         struct rside_channel *scp;
 168         struct ata_channel *cp;
 169         struct wdc_regs *wdr;
 170
 171         aprint_normal("\n");
 172
 173         /*
 174          * we need our own bus tag as the register spacing
 175          * is not the default.
 176          *
 177          * For the rsbus the bus tag cookie is the shift
 178          * to apply to registers
 179          * So duplicate the bus space tag and change the
 180          * cookie.
 181          */
 182
 183         sc->sc_wdcdev.sc_atac.atac_dev = self;
 184         sc->sc_wdcdev.regs = sc->sc_wdc_regs;
 185         sc->sc_tag = *rs->sa_iot;
 186         sc->sc_tag.bs_cookie = (void *) DRIVE_REGISTER_SPACING_SHIFT;
 187
 188         /* Fill in wdc and channel infos */
 189         sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DATA16;
 190         sc->sc_wdcdev.sc_atac.atac_pio_cap = 0;
 191         sc->sc_wdcdev.sc_atac.atac_channels = sc->sc_chanarray;
 192         sc->sc_wdcdev.sc_atac.atac_nchannels = 2;
 193         for (channel = 0 ; channel < 2; channel++) {
 194                 scp = &sc->rside_channels[channel];
 195                 sc->sc_chanarray[channel] = &scp->rc_channel;
 196                 cp = &scp->rc_channel;
 197                 wdr = &sc->sc_wdc_regs[channel];
 198
 199                 cp->ch_channel = channel;
 200                 cp->ch_atac = &sc->sc_wdcdev.sc_atac;
 201                 cp->ch_queue = &scp->rc_chqueue;
 202                 cp->ch_ndrive = 2;
 203                 wdr->cmd_iot = wdr->ctl_iot = &sc->sc_tag;
 204                 if (bus_space_map(wdr->cmd_iot,
 205                     rside_info[channel].drive_registers,
 206                     DRIVE_REGISTERS_SPACE, 0, &wdr->cmd_baseioh))
 207                         panic("couldn't map drive registers channel = %d,"
 208                                         "registers@0x08%x\n",
 209                                         channel,
 210                                         rside_info[channel].drive_registers);
 211
 212                 for (i = 0; i < WDC_NREG; i++) {
 213                         if (bus_space_subregion(wdr->cmd_iot, wdr->cmd_baseioh,
 214                                 i * (DRIVE_REGISTER_BYTE_SPACING >> 2), 4,
 215                                 &wdr->cmd_iohs[i]) != 0) {
 216                                 bus_space_unmap(wdr->cmd_iot, wdr->cmd_baseioh,
 217                                     DRIVE_REGISTERS_SPACE);
 218                                 continue;
 219                         }
 220                 }
 221                 wdc_init_shadow_regs(cp);
 222
 223                 if (bus_space_map(wdr->ctl_iot,
 224                     rside_info[channel].aux_register, 0x4, 0, &wdr->ctl_ioh))
 225                 {
 226                         bus_space_unmap(wdr->cmd_iot, wdr->cmd_baseioh,
 227                             DRIVE_REGISTERS_SPACE);
 228                         continue;
 229                 }
 230
 231                 /* attach it to the interrupt */
 232                 if ((scp->rc_ih = intr_claim((channel == 0 ? IRQ_NEVENT1 : IRQ_NEVENT2),
 233                                                 IPL_BIO, "rside", wdcintr, cp)) == NULL)
 234                         panic("%s: Cannot claim interrupt %d\n",
 235                             device_xname(self),
 236                             (channel == 0 ? IRQ_NEVENT1 : IRQ_NEVENT2));
 237
 238                 wdcattach(cp);
 239         }
 240 }