1 /* $NetBSD: cscreg.h,v 1.1 2001/10/05 22:27:55 reinoud Exp $ */
4 * Copyright (c) 1998 The NetBSD Foundation, Inc.
7 * This code is derived from software contributed to The NetBSD Foundation
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
33 * Cumana SCSI-2 with FAS216 SCSI interface hardware description.
39 #include <acorn32/podulebus/sfasvar.h>
41 typedef volatile unsigned short vu_short
;
43 typedef struct csc_regmap
{
49 typedef csc_regmap_t
*csc_regmap_p
;
52 * Register information
54 #define CSC_STATUS0 0x0000
55 #define CSC_ALATCH 0x0014
56 #define CSC_DACK 0x0200
57 #define CSC_FAS_OFFSET_BASE 0x0300
58 #define CSC_FAS_OFFSET_TCL 0x00
59 #define CSC_FAS_OFFSET_TCM 0x04
60 #define CSC_FAS_OFFSET_FIFO 0x08
61 #define CSC_FAS_OFFSET_COMMAND 0x0c
62 #define CSC_FAS_OFFSET_DESTID 0x10
63 #define CSC_FAS_OFFSET_TIMEOUT 0x14
64 #define CSC_FAS_OFFSET_PERIOD 0x18
65 #define CSC_FAS_OFFSET_OFFSET 0x1c
66 #define CSC_FAS_OFFSET_CONFIG1 0x20
67 #define CSC_FAS_OFFSET_CLKCONV 0x24
68 #define CSC_FAS_OFFSET_TEST 0x28
69 #define CSC_FAS_OFFSET_CONFIG2 0x2c
70 #define CSC_FAS_OFFSET_CONFIG3 0x30
71 #define CSC_FAS_OFFSET_TCH 0x38
72 #define CSC_FAS_OFFSET_FIFOBOT 0x3c
74 #define CSC_STATUS0_INT 0x01
75 #define CSC_STATUS0_DREQ 0x02
76 #define CSC_STATUS0_EDOUT 0x04
77 #define CSC_STATUS0_LATCHED 0x08
79 #define CSC_ALATCH_DEFS_P7 0x01
80 #define CSC_ALATCH_DEFS_INTEN 0x02
81 #define CSC_ALATCH_DEFS_TERM 0x04
82 #define CSC_ALATCH_DEFS_RSVD 0x08
83 #define CSC_ALATCH_DEFS_PROG 0x10
84 #define CSC_ALATCH_DEFS_DMA32 0x20
85 #define CSC_ALATCH_DEFS_DMAEN 0x40
86 #define CSC_ALATCH_DEFS_DMADIR 0x80