Expand PMF_FN_* macros.
[netbsd-mini2440.git] / sys / arch / alpha / jensenio / jensenioreg.h
blob2c97b2d23419c63039c2824770beafdf739244ae
1 /* $NetBSD: jensenioreg.h,v 1.2 2005/12/24 20:06:46 perry Exp $ */
3 /*-
4 * Copyright (c) 1999 The NetBSD Foundation, Inc.
5 * All rights reserved.
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe.
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
33 * System register description for the DECpc AXP 150 ("Jensen").
36 #define REGVAL(r) (*(volatile u_int64_t *)ALPHA_PHYS_TO_K0SEG(r))
39 * EISA Interrupt Acknowledge: 1.0000.0000
41 #define JENSEN_EISA_INTA 0x100000000UL
45 * FEPROM 0 (256K): 1.8000.0000
47 #define JENSEN_FEPROM0 0x180000000UL
51 * FEPROM 1 (1M): 1.a000.0000
53 #define JENSEN_FEPROM1 0x1a0000000UL
57 * VLSI VL82C106 junk I/O chip: 1.C000.0000
59 #define JENSEN_VL82C106 0x1c0000000UL
63 * Host Address Extension Register: 1.D000.0000
65 * 8-bit register that contains the upper bigs of address
66 * destined for the EISA bus.
68 #define JENSEN_HAE 0x1d0000000UL
69 #define HAE_MASK 0x7 /* EISA <31:25> */
70 #define HAE_SHIFT 25
74 * System Control Register: 1.E000.0000
76 * 8-bit register that contains memory configuration information
77 * and the LED display code bits.
79 * Memory configuration:
81 * 0 4M x 36 SIMMs
82 * 1 4M x 36 x 2 SIMMs
83 * 2 16M x 36 SIMMs
84 * 3 16M x 36 x 2 SIMMs
86 #define JENSEN_SYSCTL 0x1e0000000UL
87 #define SYSCTL_LEDMASK 0x0f /* LED codes */
88 #define SYSCTL_BANK0_CFG 0x30 /* Bank 0 config */
89 #define SYSCTL_BANK0_CFG_SHIFT 4
90 #define SYSCTL_BANK1_CFG 0xc0 /* Bank 1 config */
91 #define SYSCTL_BANK1_CFG_SHIFT 6
95 * Spare Register: 1.f000.0000
97 #define JENSEN_SPARE 0x1f0000000UL
101 * EISA Memory Space: 2.0000.0000
103 #define JENSEN_EISA_MEM 0x200000000UL
107 * EISA I/O Space: 3.0000.0000
109 #define JENSEN_EISA_IO 0x300000000UL