sys/arch/amiga/dev/mlhsc.c

   1 /*      $NetBSD: mlhsc.c,v 1.27.6.3 2004/09/21 13:12:30 skrll Exp $ */
   2
   3 /*
   4  * Copyright (c) 1982, 1990 The Regents of the University of California.
   5  * All rights reserved.
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions
   9  * are met:
  10  * 1. Redistributions of source code must retain the above copyright
  11  *    notice, this list of conditions and the following disclaimer.
  12  * 2. Redistributions in binary form must reproduce the above copyright
  13  *    notice, this list of conditions and the following disclaimer in the
  14  *    documentation and/or other materials provided with the distribution.
  15  * 3. Neither the name of the University nor the names of its contributors
  16  *    may be used to endorse or promote products derived from this software
  17  *    without specific prior written permission.
  18  *
  19  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
  20  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  21  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  22  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
  23  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  24  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  25  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  26  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  27  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  28  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  29  * SUCH DAMAGE.
  30  *
  31  *      @(#)dma.c
  32  */
  33
  34 /*
  35  * Copyright (c) 1994 Michael L. Hitch
  36  *
  37  * Redistribution and use in source and binary forms, with or without
  38  * modification, are permitted provided that the following conditions
  39  * are met:
  40  * 1. Redistributions of source code must retain the above copyright
  41  *    notice, this list of conditions and the following disclaimer.
  42  * 2. Redistributions in binary form must reproduce the above copyright
  43  *    notice, this list of conditions and the following disclaimer in the
  44  *    documentation and/or other materials provided with the distribution.
  45  *
  46  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  47  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  48  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  49  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  50  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  51  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  52  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  53  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  54  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  55  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  56  *
  57  *      @(#)dma.c
  58  */
  59
  60 #include <sys/cdefs.h>
  61 __KERNEL_RCSID(0, "$NetBSD: mlhsc.c,v 1.27.6.3 2004/09/21 13:12:30 skrll Exp $");
  62
  63 #include <sys/param.h>
  64 #include <sys/systm.h>
  65 #include <sys/kernel.h>
  66 #include <sys/device.h>
  67 #include <dev/scsipi/scsi_all.h>
  68 #include <dev/scsipi/scsipi_all.h>
  69 #include <dev/scsipi/scsiconf.h>
  70 #include <amiga/amiga/device.h>
  71 #include <amiga/amiga/isr.h>
  72 #include <amiga/dev/scireg.h>
  73 #include <amiga/dev/scivar.h>
  74 #include <amiga/dev/zbusvar.h>
  75
  76 void mlhscattach(struct device *, struct device *, void *);
  77 int mlhscmatch(struct device *, struct cfdata *, void *);
  78
  79 int mlhsc_dma_xfer_in(struct sci_softc *dev, int len,
  80     register u_char *buf, int phase);
  81 int mlhsc_dma_xfer_out(struct sci_softc *dev, int len,
  82     register u_char *buf, int phase);
  83
  84 #ifdef DEBUG
  85 extern int sci_debug;
  86 #define QPRINTF(a) if (sci_debug > 1) printf a
  87 #else
  88 #define QPRINTF(a)
  89 #endif
  90
  91 extern int sci_data_wait;
  92
  93 CFATTACH_DECL(mlhsc, sizeof(struct sci_softc),
  94     mlhscmatch, mlhscattach, NULL, NULL);
  95
  96 /*
  97  * if we are my Hacker's SCSI board we are here.
  98  */
  99 int
 100 mlhscmatch(struct device *pdp, struct cfdata *cfp, void *auxp)
 101 {
 102         struct zbus_args *zap;
 103
 104         zap = auxp;
 105
 106         /*
 107          * Check manufacturer and product id.
 108          */
 109         if (zap->manid == 2011 && zap->prodid == 1)
 110                 return(1);
 111         else
 112                 return(0);
 113 }
 114
 115 void
 116 mlhscattach(struct device *pdp, struct device *dp, void *auxp)
 117 {
 118         volatile u_char *rp;
 119         struct sci_softc *sc = (struct sci_softc *)dp;
 120         struct zbus_args *zap;
 121         struct scsipi_adapter *adapt = &sc->sc_adapter;
 122         struct scsipi_channel *chan = &sc->sc_channel;
 123
 124         printf("\n");
 125
 126         zap = auxp;
 127
 128         sc = (struct sci_softc *)dp;
 129         rp = zap->va;
 130         sc->sci_data = rp + 1;
 131         sc->sci_odata = rp + 1;
 132         sc->sci_icmd = rp + 3;
 133         sc->sci_mode = rp + 5;
 134         sc->sci_tcmd = rp + 7;
 135         sc->sci_bus_csr = rp + 9;
 136         sc->sci_sel_enb = rp + 9;
 137         sc->sci_csr = rp + 11;
 138         sc->sci_dma_send = rp + 11;
 139         sc->sci_idata = rp + 13;
 140         sc->sci_trecv = rp + 13;
 141         sc->sci_iack = rp + 15;
 142         sc->sci_irecv = rp + 15;
 143
 144         sc->dma_xfer_in = mlhsc_dma_xfer_in;
 145         sc->dma_xfer_out = mlhsc_dma_xfer_out;
 146
 147         scireset(sc);
 148
 149         /*
 150          * Fill in the scsipi_adapter.
 151          */
 152         memset(adapt, 0, sizeof(*adapt));
 153         adapt->adapt_dev = &sc->sc_dev;
 154         adapt->adapt_nchannels = 1;
 155         adapt->adapt_openings = 7;
 156         adapt->adapt_max_periph = 1;
 157         adapt->adapt_request = sci_scsipi_request;
 158         adapt->adapt_minphys = sci_minphys;
 159
 160         /*
 161          * Fill in the scsipi_channel.
 162          */
 163         memset(chan, 0, sizeof(*chan));
 164         chan->chan_adapter = adapt;
 165         chan->chan_bustype = &scsi_bustype;
 166         chan->chan_channel = 0;
 167         chan->chan_ntargets = 8;
 168         chan->chan_nluns = 8;
 169         chan->chan_id = 7;
 170
 171         /*
 172          * attach all scsi units on us
 173          */
 174         config_found(dp, chan, scsiprint);
 175 }
 176
 177 int
 178 mlhsc_dma_xfer_in(struct sci_softc *dev, int len, register u_char *buf,
 179                   int phase)
 180 {
 181         int wait = sci_data_wait;
 182         u_char csr;
 183         volatile register u_char *sci_dma = dev->sci_data + 16;
 184         volatile register u_char *sci_csr = dev->sci_csr;
 185 #ifdef DEBUG
 186         u_char *obp = buf;
 187 #endif
 188
 189         csr = *dev->sci_bus_csr;
 190
 191         QPRINTF(("mlhdma_in %d, csr=%02x\n", len, csr));
 192
 193         *dev->sci_tcmd = phase;
 194         *dev->sci_mode |= SCI_MODE_DMA;
 195         *dev->sci_icmd = 0;
 196         *dev->sci_irecv = 0;
 197         while (len > 128) {
 198                 wait = sci_data_wait;
 199                 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) !=
 200                   (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) {
 201                         if (!(*sci_csr & SCI_CSR_PHASE_MATCH)
 202                           || !(*dev->sci_bus_csr & SCI_BUS_BSY)
 203                           || --wait < 0) {
 204 #ifdef DEBUG
 205                                 if (sci_debug)
 206                                         printf("mlhdma_in fail: l%d i%x w%d\n",
 207                                         len, csr, wait);
 208 #endif
 209                                 *dev->sci_mode &= ~SCI_MODE_DMA;
 210                                 return 0;
 211                         }
 212                 }
 213
 214 #define R1      (*buf++ = *sci_dma)
 215                 R1; R1; R1; R1; R1; R1; R1; R1;
 216                 R1; R1; R1; R1; R1; R1; R1; R1;
 217                 R1; R1; R1; R1; R1; R1; R1; R1;
 218                 R1; R1; R1; R1; R1; R1; R1; R1;
 219                 R1; R1; R1; R1; R1; R1; R1; R1;
 220                 R1; R1; R1; R1; R1; R1; R1; R1;
 221                 R1; R1; R1; R1; R1; R1; R1; R1;
 222                 R1; R1; R1; R1; R1; R1; R1; R1;
 223                 R1; R1; R1; R1; R1; R1; R1; R1;
 224                 R1; R1; R1; R1; R1; R1; R1; R1;
 225                 R1; R1; R1; R1; R1; R1; R1; R1;
 226                 R1; R1; R1; R1; R1; R1; R1; R1;
 227                 R1; R1; R1; R1; R1; R1; R1; R1;
 228                 R1; R1; R1; R1; R1; R1; R1; R1;
 229                 R1; R1; R1; R1; R1; R1; R1; R1;
 230                 R1; R1; R1; R1; R1; R1; R1; R1;
 231                 len -= 128;
 232         }
 233         while (len > 0) {
 234                 wait = sci_data_wait;
 235                 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) !=
 236                   (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) {
 237                         if (!(*sci_csr & SCI_CSR_PHASE_MATCH)
 238                           || !(*dev->sci_bus_csr & SCI_BUS_BSY)
 239                           || --wait < 0) {
 240 #ifdef DEBUG
 241                                 if (sci_debug)
 242                                         printf("mlhdma_in fail: l%d i%x w%d\n",
 243                                         len, csr, wait);
 244 #endif
 245                                 *dev->sci_mode &= ~SCI_MODE_DMA;
 246                                 return 0;
 247                         }
 248                 }
 249
 250                 *buf++ = *sci_dma;
 251                 len--;
 252         }
 253
 254         QPRINTF(("mlhdma_in {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n",
 255           len, obp[0], obp[1], obp[2], obp[3], obp[4], obp[5],
 256           obp[6], obp[7], obp[8], obp[9]));
 257
 258         *dev->sci_mode &= ~SCI_MODE_DMA;
 259         return 0;
 260 }
 261
 262 int
 263 mlhsc_dma_xfer_out(struct sci_softc *dev, int len, register u_char *buf,
 264                    int phase)
 265 {
 266         int wait = sci_data_wait;
 267         u_char csr;
 268         volatile register u_char *sci_dma = dev->sci_data + 16;
 269         volatile register u_char *sci_csr = dev->sci_csr;
 270
 271         csr = *dev->sci_bus_csr;
 272
 273         QPRINTF(("mlhdma_xfer %d, csr=%02x\n", len, csr));
 274
 275         QPRINTF(("mlhgdma_out {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n",
 276          len, buf[0], buf[1], buf[2], buf[3], buf[4], buf[5],
 277          buf[6], buf[7], buf[8], buf[9]));
 278
 279         *dev->sci_tcmd = phase;
 280         *dev->sci_mode |= SCI_MODE_DMA;
 281         *dev->sci_icmd = SCI_ICMD_DATA;
 282         *dev->sci_dma_send = 0;
 283         while (len > 64) {
 284                 wait = sci_data_wait;
 285                 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) !=
 286                   (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) {
 287                         if (!(*sci_csr & SCI_CSR_PHASE_MATCH)
 288                           || !(*dev->sci_bus_csr & SCI_BUS_BSY)
 289                           || --wait < 0) {
 290 #ifdef DEBUG
 291                                 if (sci_debug)
 292                                         printf("mlhdma_out fail: l%d i%x w%d\n",
 293                                         len, csr, wait);
 294 #endif
 295                                 *dev->sci_mode &= ~SCI_MODE_DMA;
 296                                 return 0;
 297                         }
 298                 }
 299
 300 #define W1      (*sci_dma = *buf++)
 301                 W1; W1; W1; W1; W1; W1; W1; W1;
 302                 W1; W1; W1; W1; W1; W1; W1; W1;
 303                 W1; W1; W1; W1; W1; W1; W1; W1;
 304                 W1; W1; W1; W1; W1; W1; W1; W1;
 305                 W1; W1; W1; W1; W1; W1; W1; W1;
 306                 W1; W1; W1; W1; W1; W1; W1; W1;
 307                 W1; W1; W1; W1; W1; W1; W1; W1;
 308                 W1; W1; W1; W1; W1; W1; W1; W1;
 309                 len -= 64;
 310         }
 311         while (len > 0) {
 312                 wait = sci_data_wait;
 313                 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) !=
 314                   (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) {
 315                         if (!(*sci_csr & SCI_CSR_PHASE_MATCH)
 316                           || !(*dev->sci_bus_csr & SCI_BUS_BSY)
 317                           || --wait < 0) {
 318 #ifdef DEBUG
 319                                 if (sci_debug)
 320                                         printf("mlhdma_out fail: l%d i%x w%d\n",
 321                                         len, csr, wait);
 322 #endif
 323                                 *dev->sci_mode &= ~SCI_MODE_DMA;
 324                                 return 0;
 325                         }
 326                 }
 327
 328                 *sci_dma = *buf++;
 329                 len--;
 330         }
 331
 332         wait = sci_data_wait;
 333         while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) ==
 334           SCI_CSR_PHASE_MATCH && --wait);
 335
 336         *dev->sci_mode &= ~SCI_MODE_DMA;
 337         return 0;
 338 }