Expand PMF_FN_* macros.
[netbsd-mini2440.git] / sys / arch / arm / iomd / iomd_clock.c
blobf67b85f3e41b81440a09557dfc74f2a483a4bf1d
1 /* $NetBSD: iomd_clock.c,v 1.24 2008/01/08 02:07:50 matt Exp $ */
3 /*
4 * Copyright (c) 1994-1997 Mark Brinicombe.
5 * Copyright (c) 1994 Brini.
6 * All rights reserved.
8 * This code is derived from software written for Brini by Mark Brinicombe
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by Mark Brinicombe.
21 * 4. The name of the company nor the name of the author may be used to
22 * endorse or promote products derived from this software without specific
23 * prior written permission.
25 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
26 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
27 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
28 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
29 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
30 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
35 * SUCH DAMAGE.
37 * RiscBSD kernel project
39 * clock.c
41 * Timer related machine specific code
43 * Created : 29/09/94
46 /* Include header files */
48 #include <sys/param.h>
50 __KERNEL_RCSID(0, "$NetBSD: iomd_clock.c,v 1.24 2008/01/08 02:07:50 matt Exp $");
52 #include <sys/systm.h>
53 #include <sys/kernel.h>
54 #include <sys/time.h>
55 #include <sys/timetc.h>
56 #include <sys/device.h>
57 #include <sys/simplelock.h>
58 #include <sys/intr.h>
60 #include <dev/clock_subr.h>
62 #include <arm/cpufunc.h>
64 #include <arm/iomd/iomdvar.h>
65 #include <arm/iomd/iomdreg.h>
67 struct clock_softc {
68 struct device sc_dev;
69 bus_space_tag_t sc_iot;
70 bus_space_handle_t sc_ioh;
73 #define TIMER_FREQUENCY 2000000 /* 2MHz clock */
74 #define TICKS_PER_MICROSECOND (TIMER_FREQUENCY / 1000000)
76 static void *clockirq;
77 static void *statclockirq;
78 static struct clock_softc *clock_sc;
79 static int timer0_count;
81 static int clockmatch(struct device *parent, struct cfdata *cf, void *aux);
82 static void clockattach(struct device *parent, struct device *self, void *aux);
83 #ifdef DIAGNOSTIC
84 static void checkdelay(void);
85 #endif
87 static u_int iomd_timecounter0_get(struct timecounter *tc);
90 static volatile uint32_t timer0_lastcount;
91 static volatile uint32_t timer0_offset;
92 static volatile int timer0_ticked;
93 /* TODO: Get IRQ status */
95 static struct simplelock tmr_lock = SIMPLELOCK_INITIALIZER; /* protect TC timer variables */
98 static struct timecounter iomd_timecounter = {
99 iomd_timecounter0_get,
100 0, /* No poll_pps */
101 ~0, /* 32bit accuracy */
102 TIMER_FREQUENCY,
103 "iomd_timer0",
104 100
107 int clockhandler(void *);
108 int statclockhandler(void *);
110 CFATTACH_DECL(clock, sizeof(struct clock_softc),
111 clockmatch, clockattach, NULL, NULL);
114 * int clockmatch(struct device *parent, void *match, void *aux)
116 * Just return ok for this if it is device 0
119 static int
120 clockmatch(struct device *parent, struct cfdata *cf, void *aux)
122 struct clk_attach_args *ca = aux;
124 if (strcmp(ca->ca_name, "clk") == 0)
125 return(1);
126 return(0);
131 * void clockattach(struct device *parent, struct device *dev, void *aux)
133 * Map the IOMD and identify it.
134 * Then configure the child devices based on the IOMD ID.
137 static void
138 clockattach(struct device *parent, struct device *self, void *aux)
140 struct clock_softc *sc = (struct clock_softc *)self;
141 struct clk_attach_args *ca = aux;
143 sc->sc_iot = ca->ca_iot;
144 sc->sc_ioh = ca->ca_ioh; /* This is a handle for the whole IOMD */
146 clock_sc = sc;
148 /* Cannot do anything until cpu_initclocks() has been called */
150 printf("\n");
154 static void
155 tickle_tc(void)
157 if (timer0_count &&
158 timecounter->tc_get_timecount == iomd_timecounter0_get) {
159 simple_lock(&tmr_lock);
160 if (timer0_ticked)
161 timer0_ticked = 0;
162 else {
163 timer0_offset += timer0_count;
164 timer0_lastcount = 0;
166 simple_unlock(&tmr_lock);
173 * int clockhandler(struct clockframe *frame)
175 * Function called by timer 0 interrupts. This just calls
176 * hardclock(). Eventually the irqhandler can call hardclock() directly
177 * but for now we use this function so that we can debug IRQ's
181 clockhandler(void *cookie)
183 struct clockframe *frame = cookie;
184 tickle_tc();
186 hardclock(frame);
187 return 0; /* Pass the interrupt on down the chain */
192 * int statclockhandler(struct clockframe *frame)
194 * Function called by timer 1 interrupts. This just calls
195 * statclock(). Eventually the irqhandler can call statclock() directly
196 * but for now we use this function so that we can debug IRQ's
200 statclockhandler(void *cookie)
202 struct clockframe *frame = cookie;
204 statclock(frame);
205 return 0; /* Pass the interrupt on down the chain */
210 * void setstatclockrate(int newhz)
212 * Set the stat clock rate. The stat clock uses timer1
215 void
216 setstatclockrate(int newhz)
218 int count;
220 count = TIMER_FREQUENCY / newhz;
222 printf("Setting statclock to %dHz (%d ticks)\n", newhz, count);
224 bus_space_write_1(clock_sc->sc_iot, clock_sc->sc_ioh,
225 IOMD_T1LOW, (count >> 0) & 0xff);
226 bus_space_write_1(clock_sc->sc_iot, clock_sc->sc_ioh,
227 IOMD_T1HIGH, (count >> 8) & 0xff);
229 /* reload the counter */
231 bus_space_write_1(clock_sc->sc_iot, clock_sc->sc_ioh,
232 IOMD_T1GO, 0);
236 #ifdef DIAGNOSTIC
237 static void
238 checkdelay(void)
240 struct timeval start, end, diff;
242 microtime(&start);
243 delay(10000);
244 microtime(&end);
245 timersub(&end, &start, &diff);
246 if (diff.tv_sec > 0)
247 return;
248 if (diff.tv_usec > 10000)
249 return;
250 printf("WARNING: delay(10000) took %d us\n", diff.tv_usec);
252 #endif
255 * void cpu_initclocks(void)
257 * Initialise the clocks.
258 * This sets up the two timers in the IOMD and installs the IRQ handlers
260 * NOTE: Currently only timer 0 is setup and the IRQ handler is not installed
263 void
264 cpu_initclocks(void)
267 * Load timer 0 with count down value
268 * This timer generates 100Hz interrupts for the system clock
271 printf("clock: hz=%d stathz = %d profhz = %d\n", hz, stathz, profhz);
273 timer0_count = TIMER_FREQUENCY / hz;
275 bus_space_write_1(clock_sc->sc_iot, clock_sc->sc_ioh,
276 IOMD_T0LOW, (timer0_count >> 0) & 0xff);
277 bus_space_write_1(clock_sc->sc_iot, clock_sc->sc_ioh,
278 IOMD_T0HIGH, (timer0_count >> 8) & 0xff);
280 /* reload the counter */
282 bus_space_write_1(clock_sc->sc_iot, clock_sc->sc_ioh,
283 IOMD_T0GO, 0);
285 clockirq = intr_claim(IRQ_TIMER0, IPL_CLOCK, "tmr0 hard clk",
286 clockhandler, 0);
288 if (clockirq == NULL)
289 panic("%s: Cannot installer timer 0 IRQ handler",
290 clock_sc->sc_dev.dv_xname);
292 if (stathz) {
293 setstatclockrate(stathz);
294 statclockirq = intr_claim(IRQ_TIMER1, IPL_CLOCK,
295 "tmr1 stat clk", statclockhandler, 0);
296 if (statclockirq == NULL)
297 panic("%s: Cannot installer timer 1 IRQ handler",
298 clock_sc->sc_dev.dv_xname);
300 #ifdef DIAGNOSTIC
301 checkdelay();
302 #endif
303 tc_init(&iomd_timecounter);
308 static u_int iomd_timecounter0_get(struct timecounter *tc)
310 int s;
311 u_int tm;
314 * Latch the current value of the timer and then read it.
315 * This garentees an atmoic reading of the time.
317 s = splhigh();
318 bus_space_write_1(clock_sc->sc_iot, clock_sc->sc_ioh,
319 IOMD_T0LATCH, 0);
321 tm = bus_space_read_1(clock_sc->sc_iot, clock_sc->sc_ioh,
322 IOMD_T0LOW);
323 tm += (bus_space_read_1(clock_sc->sc_iot, clock_sc->sc_ioh,
324 IOMD_T0HIGH) << 8);
325 splx(s);
326 simple_lock(&tmr_lock);
328 tm = timer0_count - tm;
331 if (timer0_count &&
332 (tm < timer0_lastcount || (!timer0_ticked && false/* XXX: clkintr_pending */))) {
333 timer0_ticked = 1;
334 timer0_offset += timer0_count;
337 timer0_lastcount = tm;
338 tm += timer0_offset;
340 simple_unlock(&tmr_lock);
341 return tm;
347 * Estimated loop for n microseconds
350 /* Need to re-write this to use the timers */
352 /* One day soon I will actually do this */
354 int delaycount = 100;
356 void
357 delay(u_int n)
359 volatile u_int n2;
360 volatile u_int i;
362 if (n == 0) return;
363 n2 = n;
364 while (n2-- > 0) {
365 if (cputype == CPU_ID_SA110) /* XXX - Seriously gross hack */
366 for (i = delaycount; --i;);
367 else
368 for (i = 8; --i;);
372 /* End of iomd_clock.c */