sys/arch/arm/iomd/iomd_irqhandler.c

   1 /*      $NetBSD$        */
   2
   3 /*
   4  * Copyright (c) 1994-1998 Mark Brinicombe.
   5  * Copyright (c) 1994 Brini.
   6  * All rights reserved.
   7  *
   8  * This code is derived from software written for Brini by Mark Brinicombe
   9  *
  10  * Redistribution and use in source and binary forms, with or without
  11  * modification, are permitted provided that the following conditions
  12  * are met:
  13  * 1. Redistributions of source code must retain the above copyright
  14  *    notice, this list of conditions and the following disclaimer.
  15  * 2. Redistributions in binary form must reproduce the above copyright
  16  *    notice, this list of conditions and the following disclaimer in the
  17  *    documentation and/or other materials provided with the distribution.
  18  * 3. All advertising materials mentioning features or use of this software
  19  *    must display the following acknowledgement:
  20  *      This product includes software developed by Mark Brinicombe
  21  *      for the NetBSD Project.
  22  * 4. The name of the company nor the name of the author may be used to
  23  *    endorse or promote products derived from this software without specific
  24  *    prior written permission.
  25  *
  26  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  27  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  28  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  29  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  30  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  31  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  32  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  33  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  34  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  35  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  36  *
  37  * IRQ/FIQ initialisation, claim, release and handler routines
  38  *
  39  *      from: irqhandler.c,v 1.14 1997/04/02 21:52:19 christos Exp $
  40  */
  41
  42 #include <sys/cdefs.h>
  43 __KERNEL_RCSID(0, "$NetBSD$");
  44
  45 #include "opt_irqstats.h"
  46
  47 #include <sys/param.h>
  48 #include <sys/systm.h>
  49 #include <sys/syslog.h>
  50 #include <sys/malloc.h>
  51 #include <uvm/uvm_extern.h>
  52
  53 #include <arm/iomd/iomdreg.h>
  54 #include <arm/iomd/iomdvar.h>
  55
  56 #include <machine/intr.h>
  57 #include <machine/cpu.h>
  58 #include <arm/arm32/katelib.h>
  59
  60 irqhandler_t *irqhandlers[NIRQS];
  61
  62 u_int current_mask;
  63 u_int actual_mask;
  64 u_int disabled_mask;
  65 u_int irqmasks[NIPL];
  66
  67 extern char *_intrnames;
  68
  69 /* Prototypes */
  70
  71 extern void set_spl_masks(void);
  72
  73 /*
  74  * void irq_init(void)
  75  *
  76  * Initialise the IRQ/FIQ sub system
  77  */
  78
  79 void
  80 irq_init(void)
  81 {
  82         int loop;
  83
  84         /* Clear all the IRQ handlers and the irq block masks */
  85         for (loop = 0; loop < NIRQS; ++loop)
  86                 irqhandlers[loop] = NULL;
  87
  88         /* Clear the IRQ/FIQ masks in the IOMD */
  89         IOMD_WRITE_BYTE(IOMD_IRQMSKA, 0x00);
  90         IOMD_WRITE_BYTE(IOMD_IRQMSKB, 0x00);
  91
  92         switch (IOMD_ID) {
  93         case RPC600_IOMD_ID:
  94                 break;
  95         case ARM7500_IOC_ID:
  96         case ARM7500FE_IOC_ID:
  97                 IOMD_WRITE_BYTE(IOMD_IRQMSKC, 0x00);
  98                 IOMD_WRITE_BYTE(IOMD_IRQMSKD, 0x00);
  99                 break;
 100         default:
 101                 printf("Unknown IOMD id (%d) found in irq_init()\n", IOMD_ID);
 102         }
 103
 104         IOMD_WRITE_BYTE(IOMD_FIQMSK, 0x00);
 105         IOMD_WRITE_BYTE(IOMD_DMAMSK, 0x00);
 106
 107         /*
 108          * Setup the irqmasks for the different Interrupt Priority Levels
 109          * We will start with no bits set and these will be updated as handlers
 110          * are installed at different IPL's.
 111          */
 112         for (loop = 0; loop < NIPL; ++loop)
 113                 irqmasks[loop] = 0;
 114
 115         current_mask = 0x00000000;
 116         disabled_mask = 0x00000000;
 117         actual_mask = 0x00000000;
 118
 119         set_spl_masks();
 120
 121         /* Enable IRQ's and FIQ's */
 122         enable_interrupts(I32_bit | F32_bit);
 123 }
 124
 125
 126 /*
 127  * int irq_claim(int irq, irqhandler_t *handler)
 128  *
 129  * Enable an IRQ and install a handler for it.
 130  */
 131
 132 int
 133 irq_claim(int irq, irqhandler_t *handler)
 134 {
 135         int level;
 136         u_int oldirqstate;
 137
 138 #ifdef DIAGNOSTIC
 139         /* Sanity check */
 140         if (handler == NULL)
 141                 panic("NULL interrupt handler");
 142         if (handler->ih_func == NULL)
 143                 panic("Interrupt handler does not have a function");
 144 #endif  /* DIAGNOSTIC */
 145
 146         /*
 147          * IRQ_INSTRUCT indicates that we should get the irq number
 148          * from the irq structure
 149          */
 150         if (irq == IRQ_INSTRUCT)
 151                 irq = handler->ih_num;
 152
 153         /* Make sure the irq number is valid */
 154         if (irq < 0 || irq >= NIRQS)
 155                 return -1;
 156
 157         /* Make sure the level is valid */
 158         if (handler->ih_level < 0 || handler->ih_level >= NIPL)
 159                 return -1;
 160
 161         oldirqstate = disable_interrupts(I32_bit);
 162
 163         /* Attach handler at top of chain */
 164         handler->ih_next = irqhandlers[irq];
 165         irqhandlers[irq] = handler;
 166
 167         /*
 168          * Reset the flags for this handler.
 169          * As the handler is now in the chain mark it as active.
 170          */
 171         handler->ih_flags = 0 | IRQ_FLAG_ACTIVE;
 172
 173         /*
 174          * Record the interrupt number for accounting.
 175          * Done here as the accounting number may not be the same as the
 176          * IRQ number though for the moment they are
 177          */
 178         handler->ih_num = irq;
 179
 180 #ifdef IRQSTATS
 181         /* Get the interrupt name from the head of the list */
 182         if (handler->ih_name) {
 183                 char *ptr = _intrnames + (irq * 14);
 184                 strcpy(ptr, "             ");
 185                 strncpy(ptr, handler->ih_name,
 186                     min(strlen(handler->ih_name), 13));
 187         } else {
 188                 char *ptr = _intrnames + (irq * 14);
 189                 sprintf(ptr, "irq %2d     ", irq);
 190         }
 191 #endif  /* IRQSTATS */
 192
 193         /*
 194          * Update the irq masks.
 195          * Find the lowest interrupt priority on the irq chain.
 196          * Interrupt is allowable at priorities lower than this.
 197          * If ih_level is out of range then don't bother to update
 198          * the masks.
 199          */
 200         if (handler->ih_level >= 0 && handler->ih_level < NIPL) {
 201                 irqhandler_t *ptr;
 202
 203                 /*
 204                  * Find the lowest interrupt priority on the irq chain.
 205                  * Interrupt is allowable at priorities lower than this.
 206                  */
 207                 ptr = irqhandlers[irq];
 208                 if (ptr) {
 209                         int max_level;
 210
 211                         level = ptr->ih_level - 1;
 212                         max_level = ptr->ih_level - 1;
 213                         while (ptr) {
 214                                 if (ptr->ih_level - 1 < level)
 215                                         level = ptr->ih_level - 1;
 216                                 else if (ptr->ih_level - 1 > max_level)
 217                                         max_level = ptr->ih_level - 1;
 218                                 ptr = ptr->ih_next;
 219                         }
 220                         /* Clear out any levels that we cannot now allow */
 221                         while (max_level >=0 && max_level > level) {
 222                                 irqmasks[max_level] &= ~(1 << irq);
 223                                 --max_level;
 224                         }
 225                         while (level >= 0) {
 226                                 irqmasks[level] |= (1 << irq);
 227                                 --level;
 228                         }
 229                 }
 230
 231 #include "sl.h"
 232 #include "ppp.h"
 233 #if NSL > 0 || NPPP > 0
 234                 /* In the presence of SLIP or PPP, splimp > spltty. */
 235                 irqmasks[IPL_NET] &= irqmasks[IPL_TTY];
 236 #endif
 237         }
 238
 239         enable_irq(irq);
 240         set_spl_masks();
 241         restore_interrupts(oldirqstate);
 242
 243         return 0;
 244 }
 245
 246
 247 /*
 248  * int irq_release(int irq, irqhandler_t *handler)
 249  *
 250  * Disable an IRQ and remove a handler for it.
 251  */
 252
 253 int
 254 irq_release(int irq, irqhandler_t *handler)
 255 {
 256         int level;
 257         irqhandler_t *irqhand;
 258         irqhandler_t **prehand;
 259 #ifdef IRQSTATS
 260         extern char *_intrnames;
 261 #endif
 262
 263         /*
 264          * IRQ_INSTRUCT indicates that we should get the irq number
 265          * from the irq structure
 266          */
 267         if (irq == IRQ_INSTRUCT)
 268                 irq = handler->ih_num;
 269
 270         /* Make sure the irq number is valid */
 271         if (irq < 0 || irq >= NIRQS)
 272                 return(-1);
 273
 274         /* Locate the handler */
 275         irqhand = irqhandlers[irq];
 276         prehand = &irqhandlers[irq];
 277
 278         while (irqhand && handler != irqhand) {
 279                 prehand = &irqhand->ih_next;
 280                 irqhand = irqhand->ih_next;
 281         }
 282
 283         /* Remove the handler if located */
 284         if (irqhand)
 285                 *prehand = irqhand->ih_next;
 286         else
 287                 return -1;
 288
 289         /* Now the handler has been removed from the chain mark is as inactive */
 290         irqhand->ih_flags &= ~IRQ_FLAG_ACTIVE;
 291
 292         /* Make sure the head of the handler list is active */
 293         if (irqhandlers[irq])
 294                 irqhandlers[irq]->ih_flags |= IRQ_FLAG_ACTIVE;
 295
 296 #ifdef IRQSTATS
 297         /* Get the interrupt name from the head of the list */
 298         if (irqhandlers[irq] && irqhandlers[irq]->ih_name) {
 299                 char *ptr = _intrnames + (irq * 14);
 300                 strcpy(ptr, "             ");
 301                 strncpy(ptr, irqhandlers[irq]->ih_name,
 302                     min(strlen(irqhandlers[irq]->ih_name), 13));
 303         } else {
 304                 char *ptr = _intrnames + (irq * 14);
 305                 sprintf(ptr, "irq %2d     ", irq);
 306         }
 307 #endif  /* IRQSTATS */
 308
 309         /*
 310          * Update the irq masks.
 311          * If ih_level is out of range then don't bother to update
 312          * the masks.
 313          */
 314         if (handler->ih_level >= 0 && handler->ih_level < NIPL) {
 315                 irqhandler_t *ptr;
 316
 317                 /* Clean the bit from all the masks */
 318                 for (level = 0; level < NIPL; ++level)
 319                         irqmasks[level] &= ~(1 << irq);
 320
 321                 /*
 322                  * Find the lowest interrupt priority on the irq chain.
 323                  * Interrupt is allowable at priorities lower than this.
 324                  */
 325                 ptr = irqhandlers[irq];
 326                 if (ptr) {
 327                         level = ptr->ih_level - 1;
 328                         while (ptr) {
 329                                 if (ptr->ih_level - 1 < level)
 330                                         level = ptr->ih_level - 1;
 331                                 ptr = ptr->ih_next;
 332                         }
 333                         while (level >= 0) {
 334                                 irqmasks[level] |= (1 << irq);
 335                                 --level;
 336                         }
 337                 }
 338         }
 339
 340         /*
 341          * Disable the appropriate mask bit if there are no handlers left for
 342          * this IRQ.
 343          */
 344         if (irqhandlers[irq] == NULL)
 345                 disable_irq(irq);
 346
 347         set_spl_masks();
 348
 349         return 0;
 350 }
 351
 352
 353 void *
 354 intr_claim(int irq, int level, const char *name, int (*ih_func)(void *),
 355     void *ih_arg)
 356 {
 357         irqhandler_t *ih;
 358
 359         ih = malloc(sizeof(*ih), M_DEVBUF, M_NOWAIT);
 360         if (!ih)
 361                 panic("intr_claim(): Cannot malloc handler memory");
 362
 363         ih->ih_level = level;
 364         ih->ih_name = name;
 365         ih->ih_func = ih_func;
 366         ih->ih_arg = ih_arg;
 367         ih->ih_flags = 0;
 368
 369         if (irq_claim(irq, ih) != 0)
 370                 return NULL;
 371         return ih;
 372 }
 373
 374
 375 int
 376 intr_release(void *arg)
 377 {
 378         irqhandler_t *ih = (irqhandler_t *)arg;
 379
 380         if (irq_release(ih->ih_num, ih) == 0) {
 381                 free(ih, M_DEVBUF);
 382                 return 0 ;
 383         }
 384         return 1;
 385 }
 386
 387 #if 0
 388 u_int
 389 disable_interrupts(u_int mask)
 390 {
 391         u_int cpsr;
 392
 393         cpsr = SetCPSR(mask, mask);
 394         return cpsr;
 395 }
 396
 397
 398 u_int
 399 restore_interrupts(u_int old_cpsr)
 400 {
 401         int mask = I32_bit | F32_bit;
 402
 403         return SetCPSR(mask, old_cpsr & mask);
 404 }
 405
 406
 407 u_int
 408 enable_interrupts(u_int mask)
 409 {
 410
 411         return SetCPSR(mask, 0);
 412 }
 413 #endif
 414
 415 /*
 416  * void disable_irq(int irq)
 417  *
 418  * Disables a specific irq. The irq is removed from the master irq mask
 419  */
 420
 421 void
 422 disable_irq(int irq)
 423 {
 424         u_int oldirqstate;
 425
 426         oldirqstate = disable_interrupts(I32_bit);
 427         current_mask &= ~(1 << irq);
 428         irq_setmasks();
 429         restore_interrupts(oldirqstate);
 430 }
 431
 432
 433 /*
 434  * void enable_irq(int irq)
 435  *
 436  * Enables a specific irq. The irq is added to the master irq mask
 437  * This routine should be used with caution. A handler should already
 438  * be installed.
 439  */
 440
 441 void
 442 enable_irq(int irq)
 443 {
 444         u_int oldirqstate;
 445
 446         oldirqstate = disable_interrupts(I32_bit);
 447         current_mask |= (1 << irq);
 448         irq_setmasks();
 449         restore_interrupts(oldirqstate);
 450 }
 451
 452
 453 /*
 454  * void stray_irqhandler(u_int mask)
 455  *
 456  * Handler for stray interrupts. This gets called if a handler cannot be
 457  * found for an interrupt.
 458  */
 459
 460 void
 461 stray_irqhandler(u_int mask)
 462 {
 463         static u_int stray_irqs = 0;
 464
 465         if (++stray_irqs <= 8)
 466                 log(LOG_ERR, "Stray interrupt %08x%s\n", mask,
 467                     stray_irqs >= 8 ? ": stopped logging" : "");
 468 }