sys/arch/evbarm/stand/board/smdk2800_io_init.c

   1 /*      $NetBSD: smdk2800_io_init.c,v 1.1.4.3 2004/09/21 13:14:53 skrll Exp $   */
   2
   3 /*
   4  * Copyright (c) 2002, 2003 Fujitsu Component Limited
   5  * Copyright (c) 2002, 2003 Genetec Corporation
   6  * All rights reserved.
   7  *
   8  * Redistribution and use in source and binary forms, with or without
   9  * modification, are permitted provided that the following conditions
  10  * are met:
  11  * 1. Redistributions of source code must retain the above copyright
  12  *    notice, this list of conditions and the following disclaimer.
  13  * 2. Redistributions in binary form must reproduce the above copyright
  14  *    notice, this list of conditions and the following disclaimer in the
  15  *    documentation and/or other materials provided with the distribution.
  16  * 3. Neither the name of The Fujitsu Component Limited nor the name of
  17  *    Genetec corporation may not be used to endorse or promote products
  18  *    derived from this software without specific prior written permission.
  19  *
  20  * THIS SOFTWARE IS PROVIDED BY FUJITSU COMPONENT LIMITED AND GENETEC
  21  * CORPORATION ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES,
  22  * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  23  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  24  * DISCLAIMED.  IN NO EVENT SHALL FUJITSU COMPONENT LIMITED OR GENETEC
  25  * CORPORATION BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  26  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  27  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
  28  * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  29  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  30  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
  31  * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  32  * SUCH DAMAGE.
  33  */
  34
  35 #include <arm/s3c2xx0/s3c2800reg.h>
  36
  37 #define EXTINTR_INIT    ((EXTINTR_HIGH|EXTINTR_FALLING)<<28) | \
  38                         ((EXTINTR_HIGH|EXTINTR_FALLING)<<24) | \
  39                         ((EXTINTR_HIGH|EXTINTR_FALLING)<<20) | \
  40                         ((EXTINTR_HIGH|EXTINTR_FALLING)<<16) | \
  41                         ((EXTINTR_HIGH|EXTINTR_FALLING)<<12) | \
  42                         ((EXTINTR_HIGH|EXTINTR_FALLING)<<8) | \
  43                         ((EXTINTR_HIGH|EXTINTR_FALLING)<<4) | \
  44                         ((EXTINTR_HIGH|EXTINTR_FALLING))
  45 #define FCLK            200000000
  46 #define F_1MHZ          1000000
  47
  48 #define IOW(a, d)       (*(volatile unsigned int *)(a) = (d))
  49 #define IOR(a)          (*(volatile unsigned int *)(a))
  50 #define SETLED(d)       IOW(S3C2800_GPIO_BASE+GPIO_PDATC,(d))
  51
  52 void smdk2800_io_init(void);
  53
  54 void
  55 smdk2800_io_init(void)
  56 {
  57         unsigned int hclk;
  58         unsigned int pclk;
  59         unsigned int tmdat;
  60
  61 #define O       PCON_OUTPUT
  62 #define I       PCON_INPUT
  63 #define A       PCON_ALTFUN
  64 #define _       0
  65 #define _C(b7,b6,b5,b4,b3,b2,b1,b0) \
  66         ((b7<<14)|(b6<<12)|(b5<<10)|(b4<<8)|(b3<<6)|(b2<<4)|(b1<<2)|(b0<<0))
  67
  68         /* GPIO port */
  69         IOW(S3C2800_GPIO_BASE+GPIO_PCONA, _C(O,O,A,A,A,A,A,A));
  70         IOW(S3C2800_GPIO_BASE+GPIO_PUPA,  0xff);
  71         IOW(S3C2800_GPIO_BASE+GPIO_PCONB, _C(I,O,A,A,A,A,A,A));
  72         IOW(S3C2800_GPIO_BASE+GPIO_PCONC, _C(_,_,_,_,O,A,A,A));
  73         IOW(S3C2800_GPIO_BASE+GPIO_PUPC,  0xff);
  74         IOW(S3C2800_GPIO_BASE+GPIO_PCOND, _C(A,A,A,A,A,A,A,A));
  75         IOW(S3C2800_GPIO_BASE+GPIO_PUPD,  0xff);
  76         IOW(S3C2800_GPIO_BASE+GPIO_PCONE, _C(O,O,O,O,A,A,A,A));
  77         IOW(S3C2800_GPIO_BASE+GPIO_PUPE,  0xff);
  78         IOW(S3C2800_GPIO_BASE+GPIO_PCONF, _C(A,A,A,A,A,A,A,A));
  79         IOW(S3C2800_GPIO_BASE+GPIO_PUPF,  0xff);
  80         IOW(S3C2800_GPIO_BASE+GPIO_EXTINTR, EXTINTR_INIT);
  81
  82 #undef  O
  83 #undef  I
  84 #undef  A
  85 #undef  _
  86 #undef  _C
  87
  88         /* Get clock value */
  89         if(IOR(S3C2800_CLKMAN_BASE+CLKMAN_CLKCON) & CLKCON_HCLK)
  90                 hclk = FCLK / 2;
  91         else
  92                 hclk = FCLK;
  93
  94         if(IOR(S3C2800_CLKMAN_BASE+CLKMAN_CLKCON) & CLKCON_PCLK)
  95                 pclk = hclk / 2;
  96         else
  97                 pclk = hclk;
  98
  99         /* Timer */
 100         if((pclk/F_1MHZ) < 1)
 101                 tmdat = 1<<16;
 102         else
 103                 tmdat = (pclk/F_1MHZ)<<16;
 104
 105 #define TMDAT_INIT              0xf424
 106
 107         IOW(S3C2800_TIMER0_BASE+TIMER_TMDAT, (tmdat | TMDAT_INIT));
 108         IOW(S3C2800_TIMER1_BASE+TIMER_TMDAT, (tmdat | TMDAT_INIT));
 109         IOW(S3C2800_TIMER2_BASE+TIMER_TMDAT, (tmdat | TMDAT_INIT));
 110
 111         IOW(S3C2800_TIMER0_BASE+TIMER_TMCON, TMCON_MUX_DIV32 | TMCON_INTENA | TMCON_ENABLE);
 112         IOW(S3C2800_TIMER1_BASE+TIMER_TMCON, TMCON_MUX_DIV16 | TMCON_INTENA | TMCON_ENABLE);
 113         IOW(S3C2800_TIMER2_BASE+TIMER_TMCON, TMCON_MUX_DIV8 | TMCON_INTENA | TMCON_ENABLE);
 114
 115         /* Interrupt controller */
 116         IOW(S3C2800_INTCTL_BASE+INTCTL_INTMOD, 0);
 117         IOW(S3C2800_INTCTL_BASE+INTCTL_INTMSK, 0);
 118
 119         /* Initial complete */
 120         SETLED(0x0);    /* All LEDs on (o o o) */
 121 }