Expand PMF_FN_* macros.
[netbsd-mini2440.git] / sys / arch / evbmips / rmixl / machdep.c
blob2e59e2a60cd56c20861f18988ddd72c6562c3c92
1 /* $NetBSD: machdep.c,v 1.2 2009/12/14 00:46:03 matt Exp $ */
3 /*
4 * Copyright 2001, 2002 Wasabi Systems, Inc.
5 * All rights reserved.
7 * Written by Jason R. Thorpe and Simon Burge for Wasabi Systems, Inc.
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed for the NetBSD Project by
20 * Wasabi Systems, Inc.
21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22 * or promote products derived from this software without specific prior
23 * written permission.
25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 * POSSIBILITY OF SUCH DAMAGE.
39 * Copyright (c) 1992, 1993
40 * The Regents of the University of California. All rights reserved.
42 * This code is derived from software contributed to Berkeley by
43 * the Systems Programming Group of the University of Utah Computer
44 * Science Department, The Mach Operating System project at
45 * Carnegie-Mellon University and Ralph Campbell.
47 * Redistribution and use in source and binary forms, with or without
48 * modification, are permitted provided that the following conditions
49 * are met:
50 * 1. Redistributions of source code must retain the above copyright
51 * notice, this list of conditions and the following disclaimer.
52 * 2. Redistributions in binary form must reproduce the above copyright
53 * notice, this list of conditions and the following disclaimer in the
54 * documentation and/or other materials provided with the distribution.
55 * 3. Neither the name of the University nor the names of its contributors
56 * may be used to endorse or promote products derived from this software
57 * without specific prior written permission.
59 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
60 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
61 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
62 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
63 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
64 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
65 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
66 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
67 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
68 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
69 * SUCH DAMAGE.
71 * @(#)machdep.c 8.3 (Berkeley) 1/12/94
72 * from: Utah Hdr: machdep.c 1.63 91/04/24
75 * Copyright (c) 1988 University of Utah.
77 * This code is derived from software contributed to Berkeley by
78 * the Systems Programming Group of the University of Utah Computer
79 * Science Department, The Mach Operating System project at
80 * Carnegie-Mellon University and Ralph Campbell.
82 * Redistribution and use in source and binary forms, with or without
83 * modification, are permitted provided that the following conditions
84 * are met:
85 * 1. Redistributions of source code must retain the above copyright
86 * notice, this list of conditions and the following disclaimer.
87 * 2. Redistributions in binary form must reproduce the above copyright
88 * notice, this list of conditions and the following disclaimer in the
89 * documentation and/or other materials provided with the distribution.
90 * 3. All advertising materials mentioning features or use of this software
91 * must display the following acknowledgement:
92 * This product includes software developed by the University of
93 * California, Berkeley and its contributors.
94 * 4. Neither the name of the University nor the names of its contributors
95 * may be used to endorse or promote products derived from this software
96 * without specific prior written permission.
98 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
99 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
100 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
101 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
102 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
103 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
104 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
105 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
106 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
107 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
108 * SUCH DAMAGE.
110 * @(#)machdep.c 8.3 (Berkeley) 1/12/94
111 * from: Utah Hdr: machdep.c 1.63 91/04/24
114 #include <sys/cdefs.h>
115 __KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.2 2009/12/14 00:46:03 matt Exp $");
117 #include "opt_ddb.h"
118 #include "opt_com.h"
119 #include "opt_execfmt.h"
120 #include "opt_memsize.h"
122 #include <sys/param.h>
123 #include <sys/systm.h>
124 #include <sys/kernel.h>
125 #include <sys/buf.h>
126 #include <sys/reboot.h>
127 #include <sys/mount.h>
128 #include <sys/kcore.h>
129 #include <sys/boot_flag.h>
130 #include <sys/termios.h>
131 #include <sys/ksyms.h>
132 #include <sys/bus.h>
133 #include <sys/device.h>
134 #include <sys/extent.h>
135 #include <sys/malloc.h>
137 #include <uvm/uvm_extern.h>
139 #include <dev/cons.h>
141 #include "ksyms.h"
143 #if NKSYMS || defined(DDB) || defined(LKM)
144 #include <machine/db_machdep.h>
145 #include <ddb/db_extern.h>
146 #endif
148 #include <machine/cpu.h>
149 #include <machine/psl.h>
151 #include "com.h"
152 #if NCOM == 0
153 #error no serial console
154 #endif
156 #include <dev/ic/comreg.h>
157 #include <dev/ic/comvar.h>
159 #include <mips/rmi/rmixl_comvar.h>
160 #include <mips/rmi/rmixlvar.h>
161 #include <mips/rmi/rmixl_firmware.h>
162 #include <mips/rmi/rmixlreg.h>
164 #define MACHDEP_DEBUG 1
165 #ifdef MACHDEP_DEBUG
166 int machdep_debug=MACHDEP_DEBUG;
167 # define DPRINTF(x) do { if (machdep_debug) printf x ; } while(0)
168 #else
169 # define DPRINTF(x)
170 #endif
172 #ifndef CONSFREQ
173 # define CONSFREQ -1 /* inherit from firmware */
174 #endif
175 #ifndef CONSPEED
176 # define CONSPEED 38400
177 #endif
178 #ifndef CONMODE
179 # define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | PARENB)) | CS8)
180 #endif
181 #ifndef CONSADDR
182 # define CONSADDR RMIXL_IO_DEV_UART_1
183 #endif
185 int comcnfreq = CONSFREQ;
186 int comcnspeed = CONSPEED;
187 tcflag_t comcnmode = CONMODE;
188 bus_addr_t comcnaddr = (bus_addr_t)CONSADDR;
190 struct rmixl_config rmixl_configuration;
194 * array of tested firmware versions
195 * if you find new ones and they work
196 * please add them
198 static uint64_t rmiclfw_psb_versions[] = {
199 0x4958d4fb00000056ULL,
200 0x49a5a8fa00000056ULL,
201 0x4aacdb6a00000056ULL,
203 #define RMICLFW_PSB_VERSIONS_LEN \
204 (sizeof(rmiclfw_psb_versions)/sizeof(rmiclfw_psb_versions[0]))
207 * kernel copies of firmware info
209 static rmixlfw_info_t rmixlfw_info;
210 static rmixlfw_mmap_t rmixlfw_phys_mmap;
211 static rmixlfw_mmap_t rmixlfw_avail_mmap;
212 #define RMIXLFW_INFOP_LEGAL 0x8c000000
216 * storage for fixed extent used to allocate physical address regions
217 * because extent(9) start and end values are u_long, they are only
218 * 32 bits on a 32 bit kernel, which is insuffucuent since XLS physical
219 * address is 40 bits wide. So the "physaddr" map stores regions
220 * in units of megabytes.
222 static u_long rmixl_physaddr_storage[
223 EXTENT_FIXED_STORAGE_SIZE(32)/sizeof(u_long)
226 /* For sysctl_hw. */
227 extern char cpu_model[];
229 /* Our exported CPU info; we can have only one. */
230 struct cpu_info cpu_info_store;
232 /* Maps for VM objects. */
233 struct vm_map *mb_map = NULL;
234 struct vm_map *phys_map = NULL;
236 int physmem; /* Total physical memory */
238 int netboot; /* Are we netbooting? */
241 phys_ram_seg_t mem_clusters[VM_PHYSSEG_MAX];
242 u_int mem_cluster_cnt;
245 void configure(void);
246 void mach_init(int, int32_t *, void *, int64_t);
247 static u_long rmixlfw_init(int64_t);
248 static u_long mem_clusters_init(rmixlfw_mmap_t *, rmixlfw_mmap_t *);
249 static void __attribute__((__noreturn__)) rmixl_exit(int);
250 static void rmixl_physaddr_init(void);
251 static u_int ram_seg_resv(phys_ram_seg_t *, u_int, u_quad_t, u_quad_t);
252 void rmixlfw_mmap_print(rmixlfw_mmap_t *);
256 * safepri is a safe priority for sleep to set for a spin-wait during
257 * autoconfiguration or after a panic. Used as an argument to splx().
259 int safepri = MIPS1_PSL_LOWIPL;
261 extern struct user *proc0paddr;
264 * Do all the stuff that locore normally does before calling main().
266 void
267 mach_init(int argc, int32_t *argv, void *envp, int64_t infop)
269 struct rmixl_config *rcp = &rmixl_configuration;
270 void *kernend;
271 u_long memsize;
272 u_int vm_cluster_cnt;
273 uint32_t r;
274 phys_ram_seg_t vm_clusters[VM_PHYSSEG_MAX];
275 extern char edata[], end[];
277 rmixl_mtcr(0, 1); /* disable all threads except #0 */
279 r = rmixl_mfcr(0x300);
280 r &= ~__BIT(14); /* disabled Unaligned Access */
281 rmixl_mtcr(0x300, r);
283 rmixl_mtcr(0x400, 0); /* enable MMU clock gating */
284 /* set single MMU Thread Mode */
285 /* TLB is partitioned (1 partition) */
288 * Clear the BSS segment.
290 kernend = (void *)mips_round_page(end);
291 memset(edata, 0, (char *)kernend - edata);
294 * Set up the exception vectors and CPU-specific function
295 * vectors early on. We need the wbflush() vector set up
296 * before comcnattach() is called (or at least before the
297 * first printf() after that is called).
298 * Also clears the I+D caches.
300 mips_vector_init();
302 memsize = rmixlfw_init(infop);
304 /* set the VM page size */
305 uvm_setpagesize();
307 physmem = btoc(memsize);
309 rmixl_obio_bus_mem_init(&rcp->rc_obio_memt, rcp); /* need for console */
311 #if NCOM > 0
312 rmixl_com_cnattach(comcnaddr, comcnspeed, comcnfreq,
313 COM_TYPE_NORMAL, comcnmode);
314 #endif
316 printf("\nNetBSD/rmixl\n");
317 printf("memsize = %#lx\n", memsize);
319 rmixl_physaddr_init();
322 * Obtain the cpu frequency
323 * Compute the number of ticks for hz.
324 * Compute the delay divisor.
325 * Double the Hz if this CPU runs at twice the
326 * external/cp0-count frequency
328 curcpu()->ci_cpu_freq = rmixlfw_info.cpu_frequency;
329 curcpu()->ci_cycles_per_hz = (curcpu()->ci_cpu_freq + hz / 2) / hz;
330 curcpu()->ci_divisor_delay =
331 ((curcpu()->ci_cpu_freq + 500000) / 1000000);
332 if (mips_cpu_flags & CPU_MIPS_DOUBLE_COUNT)
333 curcpu()->ci_cpu_freq *= 2;
336 * Look at arguments passed to us and compute boothowto.
337 * - rmixl firmware gives us a 32 bit argv[i], so adapt
338 * by forcing sign extension in cast to (char *)
340 boothowto = RB_AUTOBOOT;
341 for (int i = 1; i < argc; i++) {
342 for (char *cp = (char *)(intptr_t)argv[i]; *cp; cp++) {
343 int howto;
344 /* Ignore superfluous '-', if there is one */
345 if (*cp == '-')
346 continue;
348 howto = 0;
349 BOOT_FLAG(*cp, howto);
350 if (howto != 0)
351 boothowto |= howto;
352 #ifdef DIAGNOSTIC
353 else
354 printf("bootflag '%c' not recognised\n", *cp);
355 #endif
358 #ifdef DIAGNOSTIC
359 printf("boothowto %#x\n", boothowto);
360 #endif
363 * Reserve pages from the VM system.
364 * to maintain mem_clusters[] as a map of raw ram,
365 * copy into temporary table vm_clusters[]
366 * work on that and use it to feed vm_physload()
368 KASSERT(sizeof(mem_clusters) == sizeof(vm_clusters));
369 memcpy(&vm_clusters, &mem_clusters, sizeof(vm_clusters));
370 vm_cluster_cnt = mem_cluster_cnt;
372 /* reserve 0..start..kernend pages */
373 vm_cluster_cnt = ram_seg_resv(vm_clusters, vm_cluster_cnt,
374 0, round_page(MIPS_KSEG0_TO_PHYS(kernend)));
376 /* reserve reset exception vector page */
377 /* should never be in our clusters anyway... */
378 vm_cluster_cnt = ram_seg_resv(vm_clusters, vm_cluster_cnt,
379 MIPS_RESET_EXC_VEC, MIPS_RESET_EXC_VEC+NBPG);
382 * Load vm_clusters[] into the VM system.
384 for (u_int i=0; i < vm_cluster_cnt; i++) {
385 u_quad_t first, last;
387 first = trunc_page(vm_clusters[i].start);
388 last = round_page(vm_clusters[i].start + vm_clusters[i].size);
389 DPRINTF(("%s: %d: %#"PRIx64", %#"PRIx64"\n",
390 __func__, i, first, last));
392 uvm_page_physload(atop(first), atop(last), atop(first),
393 atop(last), VM_FREELIST_DEFAULT);
397 * Initialize error message buffer (at end of core).
399 mips_init_msgbuf();
401 pmap_bootstrap();
404 * Allocate uarea page for lwp0 and set it.
406 mips_init_lwp0_uarea();
408 #if defined(DDB)
409 if (boothowto & RB_KDB)
410 Debugger();
411 #endif
415 * ram_seg_resv - cut reserved regions out of segs, fragmenting as needed
417 * we simply build a new table of segs, then copy it back over the given one
418 * this is inefficient but simple and called only a few times
420 * note: 'last' here means 1st addr past the end of the segment (start+size)
422 static u_int
423 ram_seg_resv(phys_ram_seg_t *segs, u_int nsegs,
424 u_quad_t resv_first, u_quad_t resv_last)
426 u_quad_t first, last;
427 int new_nsegs=0;
428 int resv_flag;
429 phys_ram_seg_t new_segs[VM_PHYSSEG_MAX];
431 for (u_int i=0; i < nsegs; i++) {
432 resv_flag = 0;
433 first = trunc_page(segs[i].start);
434 last = round_page(segs[i].start + segs[i].size);
436 KASSERT(new_nsegs < VM_PHYSSEG_MAX);
437 if ((resv_first <= first) && (resv_last >= last)) {
438 /* whole segment is resverved */
439 continue;
441 if ((resv_first > first) && (resv_first < last)) {
442 u_quad_t new_last;
445 * reserved start in segment
446 * salvage the leading fragment
448 resv_flag = 1;
449 new_last = last - (last - resv_first);
450 KASSERT (new_last > first);
451 new_segs[new_nsegs].start = first;
452 new_segs[new_nsegs].size = new_last - first;
453 new_nsegs++;
455 if ((resv_last > first) && (resv_last < last)) {
456 u_quad_t new_first;
459 * reserved end in segment
460 * salvage the trailing fragment
462 resv_flag = 1;
463 new_first = first + (resv_last - first);
464 KASSERT (last > (new_first + NBPG));
465 new_segs[new_nsegs].start = new_first;
466 new_segs[new_nsegs].size = last - new_first;
467 new_nsegs++;
469 if (resv_flag == 0) {
471 * nothing reserved here, take it all
473 new_segs[new_nsegs].start = first;
474 new_segs[new_nsegs].size = last - first;
475 new_nsegs++;
480 memcpy(segs, new_segs, sizeof(new_segs));
482 return new_nsegs;
486 * create an extent for physical address space
487 * these are in units of MB for sake of compression (for sake of 32 bit kernels)
488 * allocate the regions where we have known functions (DRAM, IO, etc)
489 * what remains can be allocated as needed for other stuff
490 * e.g. to configure BARs that are not already initialized and enabled.
492 static void
493 rmixl_physaddr_init(void)
495 struct extent *ext;
496 unsigned long start = 0UL;
497 unsigned long end = (__BIT(40) / (1024 * 1024)) -1;
498 u_long base;
499 u_long size;
500 uint32_t r;
502 ext = extent_create("physaddr", start, end, M_DEVBUF,
503 (void *)rmixl_physaddr_storage, sizeof(rmixl_physaddr_storage),
504 EX_NOWAIT | EX_NOCOALESCE);
506 if (ext == NULL)
507 panic("%s: extent_create failed", __func__);
510 * grab regions per DRAM BARs
512 for (u_int i=0; i < RMIXL_SBC_DRAM_NBARS; i++) {
513 r = RMIXL_IOREG_READ(RMIXL_SBC_DRAM_BAR(i));
514 if ((r & RMIXL_DRAM_BAR_STATUS) == 0)
515 continue; /* not enabled */
516 base = (u_long)(DRAM_BAR_TO_BASE((uint64_t)r) / (1024 * 1024));
517 size = (u_long)(DRAM_BAR_TO_SIZE((uint64_t)r) / (1024 * 1024));
519 DPRINTF(("%s: %d: %d: 0x%08x -- 0x%010lx:%lu MB\n",
520 __func__, __LINE__, i, r, base * (1024 * 1024), size));
521 if (extent_alloc_region(ext, base, size, EX_NOWAIT) != 0)
522 panic("%s: extent_alloc_region(%p, %#lx, %#lx, %#x) "
523 "failed", __func__, ext, base, size, EX_NOWAIT);
527 * grab regions per PCIe CFG, ECFG, IO, MEM BARs
529 r = RMIXL_IOREG_READ(RMIXL_SBC_PCIE_CFG_BAR);
530 if ((r & RMIXL_PCIE_CFG_BAR_ENB) != 0) {
531 base = (u_long)(RMIXL_PCIE_CFG_BAR_TO_BA((uint64_t)r)
532 / (1024 * 1024));
533 size = (u_long)RMIXL_PCIE_CFG_SIZE / (1024 * 1024);
534 DPRINTF(("%s: %d: %s: 0x%08x -- 0x%010lx:%ld MB\n", __func__,
535 __LINE__, "CFG", r, base * 1024 * 1024, size));
536 if (extent_alloc_region(ext, base, size, EX_NOWAIT) != 0)
537 panic("%s: extent_alloc_region(%p, %#lx, %#lx, %#x) "
538 "failed", __func__, ext, base, size, EX_NOWAIT);
540 r = RMIXL_IOREG_READ(RMIXL_SBC_PCIE_ECFG_BAR);
541 if ((r & RMIXL_PCIE_ECFG_BAR_ENB) != 0) {
542 base = (u_long)(RMIXL_PCIE_ECFG_BAR_TO_BA((uint64_t)r)
543 / (1024 * 1024));
544 size = (u_long)RMIXL_PCIE_ECFG_SIZE / (1024 * 1024);
545 DPRINTF(("%s: %d: %s: 0x%08x -- 0x%010lx:%ld MB\n", __func__,
546 __LINE__, "ECFG", r, base * 1024 * 1024, size));
547 if (extent_alloc_region(ext, base, size, EX_NOWAIT) != 0)
548 panic("%s: extent_alloc_region(%p, %#lx, %#lx, %#x) "
549 "failed", __func__, ext, base, size, EX_NOWAIT);
551 r = RMIXL_IOREG_READ(RMIXL_SBC_PCIE_MEM_BAR);
552 if ((r & RMIXL_PCIE_MEM_BAR_ENB) != 0) {
553 base = (u_long)(RMIXL_PCIE_MEM_BAR_TO_BA((uint64_t)r)
554 / (1024 * 1024));
555 size = (u_long)(RMIXL_PCIE_MEM_BAR_TO_SIZE((uint64_t)r)
556 / (1024 * 1024));
557 DPRINTF(("%s: %d: %s: 0x%08x -- 0x%010lx:%ld MB\n", __func__,
558 __LINE__, "MEM", r, base * 1024 * 1024, size));
559 if (extent_alloc_region(ext, base, size, EX_NOWAIT) != 0)
560 panic("%s: extent_alloc_region(%p, %#lx, %#lx, %#x) "
561 "failed", __func__, ext, base, size, EX_NOWAIT);
563 r = RMIXL_IOREG_READ(RMIXL_SBC_PCIE_IO_BAR);
564 if ((r & RMIXL_PCIE_IO_BAR_ENB) != 0) {
565 base = (u_long)(RMIXL_PCIE_IO_BAR_TO_BA((uint64_t)r)
566 / (1024 * 1024));
567 size = (u_long)(RMIXL_PCIE_IO_BAR_TO_SIZE((uint64_t)r)
568 / (1024 * 1024));
569 DPRINTF(("%s: %d: %s: 0x%08x -- 0x%010lx:%ld MB\n", __func__,
570 __LINE__, "IO", r, base * 1024 * 1024, size));
571 if (extent_alloc_region(ext, base, size, EX_NOWAIT) != 0)
572 panic("%s: extent_alloc_region(%p, %#lx, %#lx, %#x) "
573 "failed", __func__, ext, base, size, EX_NOWAIT);
577 * at this point all regions left in "physaddr" extent
578 * are unused holes in the physical adress space
579 * available for use as needed.
581 rmixl_configuration.rc_phys_ex = ext;
582 #ifdef MACHDEP_DEBUG
583 extent_print(ext);
584 #endif
587 static u_long
588 rmixlfw_init(int64_t infop)
590 struct rmixl_config *rcp = &rmixl_configuration;
592 strcpy(cpu_model, "RMI XLS616ATX VIIA"); /* XXX */
594 infop |= MIPS_KSEG0_START;
595 rmixlfw_info = *(rmixlfw_info_t *)(intptr_t)infop;
597 for (int i=0; i < RMICLFW_PSB_VERSIONS_LEN; i++) {
598 if (rmiclfw_psb_versions[i] == rmixlfw_info.psb_version)
599 goto found;
602 rcp->rc_io_pbase = RMIXL_IO_DEV_PBASE;
603 rmixl_putchar_init(rcp->rc_io_pbase);
605 #ifdef DIAGNOSTIC
606 rmixl_puts("\r\nWARNING: untested psb_version: ");
607 rmixl_puthex64(rmixlfw_info.psb_version);
608 rmixl_puts("\r\n");
609 #endif
611 /* XXX trust and use MEMSIZE */
612 mem_clusters[0].start = 0;
613 mem_clusters[0].size = MEMSIZE;
614 mem_cluster_cnt = 1;
615 return MEMSIZE;
617 found:
618 rcp->rc_io_pbase = MIPS_KSEG1_TO_PHYS(rmixlfw_info.io_base);
619 rmixl_putchar_init(rcp->rc_io_pbase);
620 #ifdef MACHDEP_DEBUG
621 rmixl_puts("\r\ninfop: ");
622 rmixl_puthex64((uint64_t)(intptr_t)infop);
623 #endif
624 #ifdef DIAGNOSTIC
625 rmixl_puts("\r\nrecognized psb_version: ");
626 rmixl_puthex64(rmixlfw_info.psb_version);
627 rmixl_puts("\r\n");
628 #endif
630 return mem_clusters_init(
631 (rmixlfw_mmap_t *)(intptr_t)rmixlfw_info.psb_physaddr_map,
632 (rmixlfw_mmap_t *)(intptr_t)rmixlfw_info.avail_mem_map);
635 void
636 rmixlfw_mmap_print(rmixlfw_mmap_t *map)
638 #ifdef MACHDEP_DEBUG
639 for (uint32_t i=0; i < map->nmmaps; i++) {
640 rmixl_puthex32(i);
641 rmixl_puts(", ");
642 rmixl_puthex64(map->entry[i].start);
643 rmixl_puts(", ");
644 rmixl_puthex64(map->entry[i].size);
645 rmixl_puts(", ");
646 rmixl_puthex32(map->entry[i].type);
647 rmixl_puts("\r\n");
649 #endif
653 * mem_clusters_init
655 * initialize mem_clusters[] table based on memory address mapping
656 * provided by boot firmware.
658 * prefer avail_mem_map if we can, otherwise use psb_physaddr_map.
659 * these will be limited by MEMSIZE if it is configured.
660 * if neither are available, just use MEMSIZE.
662 static u_long
663 mem_clusters_init(
664 rmixlfw_mmap_t *psb_physaddr_map,
665 rmixlfw_mmap_t *avail_mem_map)
667 rmixlfw_mmap_t *map = NULL;
668 const char *mapname;
669 uint64_t tmp;
670 uint64_t sz;
671 uint64_t sum;
672 u_int cnt;
673 #ifdef MEMSIZE
674 u_long memsize = MEMSIZE;
675 #endif
677 #ifdef MACHDEP_DEBUG
678 rmixl_puts("psb_physaddr_map: ");
679 rmixl_puthex64((uint64_t)(intptr_t)psb_physaddr_map);
680 rmixl_puts("\r\n");
681 #endif
682 if (psb_physaddr_map != NULL) {
683 rmixlfw_phys_mmap = *psb_physaddr_map;
684 map = &rmixlfw_phys_mmap;
685 mapname = "psb_physaddr_map";
686 rmixlfw_mmap_print(map);
688 #ifdef DIAGNOSTIC
689 else {
690 rmixl_puts("WARNING: no psb_physaddr_map\r\n");
692 #endif
694 #ifdef MACHDEP_DEBUG
695 rmixl_puts("avail_mem_map: ");
696 rmixl_puthex64((uint64_t)(intptr_t)avail_mem_map);
697 rmixl_puts("\r\n");
698 #endif
699 if (avail_mem_map != NULL) {
700 rmixlfw_avail_mmap = *avail_mem_map;
701 map = &rmixlfw_avail_mmap;
702 mapname = "avail_mem_map";
703 rmixlfw_mmap_print(map);
705 #ifdef DIAGNOSTIC
706 else {
707 rmixl_puts("WARNING: no avail_mem_map\r\n");
709 #endif
711 if (map == NULL) {
712 #ifndef MEMSIZE
713 rmixl_puts("panic: no firmware memory map, "
714 "must configure MEMSIZE\r\n");
715 for(;;); /* XXX */
716 #else
717 #ifdef DIAGNOSTIC
718 rmixl_puts("WARNING: no avail_mem_map, "
719 "using MEMSIZE\r\n");
720 #endif
722 mem_clusters[0].start = 0;
723 mem_clusters[0].size = MEMSIZE;
724 mem_cluster_cnt = 1;
725 return MEMSIZE;
726 #endif /* MEMSIZE */
729 #ifdef DIAGNOSTIC
730 rmixl_puts("using ");
731 rmixl_puts(mapname);
732 rmixl_puts("\r\n");
733 #endif
734 #ifdef MACHDEP_DEBUG
735 rmixl_puts("memory clusters:\r\n");
736 #endif
737 sum = 0;
738 cnt = 0;
739 for (uint32_t i=0; i < map->nmmaps; i++) {
740 if (map->entry[i].type != RMIXLFW_MMAP_TYPE_RAM)
741 continue;
742 mem_clusters[cnt].start = map->entry[i].start;
743 sz = map->entry[i].size;
744 sum += sz;
745 mem_clusters[cnt].size = sz;
746 #ifdef MACHDEP_DEBUG
747 rmixl_puthex32(i);
748 rmixl_puts(": ");
749 rmixl_puthex64(mem_clusters[cnt].start);
750 rmixl_puts(", ");
751 rmixl_puthex64(sz);
752 rmixl_puts(": ");
753 rmixl_puthex64(sum);
754 rmixl_puts("\r\n");
755 #endif
756 #ifdef MEMSIZE
758 * configurably limit memsize
760 if (sum == memsize)
761 break;
762 if (sum > memsize) {
763 tmp = sum - memsize;
764 sz -= tmp;
765 sum -= tmp;
766 mem_clusters[cnt].size = sz;
767 break;
769 #endif
770 cnt++;
772 mem_cluster_cnt = cnt;
773 return sum;
776 void
777 consinit(void)
781 * Everything related to console initialization is done
782 * in mach_init().
787 * Allocate memory for variable-sized tables,
789 void
790 cpu_startup()
792 vaddr_t minaddr, maxaddr;
793 char pbuf[9];
796 * Good {morning,afternoon,evening,night}.
798 printf("%s%s", copyright, version);
799 format_bytes(pbuf, sizeof(pbuf), ctob(physmem));
800 printf("total memory = %s\n", pbuf);
803 * Virtual memory is bootstrapped -- notify the bus spaces
804 * that memory allocation is now safe.
806 rmixl_configuration.rc_mallocsafe = 1;
808 minaddr = 0;
810 * Allocate a submap for physio.
812 phys_map = uvm_km_suballoc(kernel_map, &minaddr, &maxaddr,
813 VM_PHYS_SIZE, 0, FALSE, NULL);
816 * (No need to allocate an mbuf cluster submap. Mbuf clusters
817 * are allocated via the pool allocator, and we use XKSEG to
818 * map those pages.)
821 format_bytes(pbuf, sizeof(pbuf), ptoa(uvmexp.free));
822 printf("avail memory = %s\n", pbuf);
825 int waittime = -1;
827 void
828 cpu_reboot(int howto, char *bootstr)
831 /* Take a snapshot before clobbering any registers. */
832 if (curproc)
833 savectx(curpcb);
835 if (cold) {
836 howto |= RB_HALT;
837 goto haltsys;
840 /* If "always halt" was specified as a boot flag, obey. */
841 if (boothowto & RB_HALT)
842 howto |= RB_HALT;
844 boothowto = howto;
845 if ((howto & RB_NOSYNC) == 0 && (waittime < 0)) {
846 waittime = 0;
847 vfs_shutdown();
850 * If we've been adjusting the clock, the todr
851 * will be out of synch; adjust it now.
853 resettodr();
856 splhigh();
858 if (howto & RB_DUMP)
859 dumpsys();
861 haltsys:
862 doshutdownhooks();
864 if (howto & RB_HALT) {
865 printf("\n");
866 printf("The operating system has halted.\n");
867 printf("Please press any key to reboot.\n\n");
868 cnpollc(1); /* For proper keyboard command handling */
869 cngetc();
870 cnpollc(0);
873 printf("rebooting...\n\n");
875 rmixl_exit(0);
879 * goodbye world
881 #define GPIO_CPU_RST 0xa0 /* XXX TMP */
882 void __attribute__((__noreturn__))
883 rmixl_exit(int howto)
885 /* use firmware callbak to reboot */
886 void (*reset)(void) = (void *)(intptr_t)rmixlfw_info.warm_reset;
887 if (reset != 0) {
888 (*reset)();
889 printf("warm reset callback failed, spinning...\n");
890 } else {
891 printf("warm reset callback absent, spinning...\n");
893 for (;;);