sys/arch/hpcmips/dev/mq200priv.h

   1 /*      $NetBSD: mq200priv.h,v 1.1.28.4 2005/11/10 13:56:27 skrll Exp $ */
   2
   3 /*-
   4  * Copyright (c) 2001 TAKEMURA Shin
   5  * All rights reserved.
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions
   9  * are met:
  10  * 1. Redistributions of source code must retain the above copyright
  11  *    notice, this list of conditions and the following disclaimer.
  12  * 2. Redistributions in binary form must reproduce the above copyright
  13  *    notice, this list of conditions and the following disclaimer in the
  14  *    documentation and/or other materials provided with the distribution.
  15  * 3. The name of the author may not be used to endorse or promote products
  16  *    derived from this software without specific prior written permission.
  17  *
  18  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
  19  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  20  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  21  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
  22  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  23  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  24  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  25  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  26  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  27  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  28  * SUCH DAMAGE.
  29  *
  30  */
  31
  32 struct mq200_crt_param {
  33         u_int16_t width, height, clock;
  34         u_int16_t hdtotal;
  35         u_int16_t vdtotal;
  36         u_int16_t hsstart, hsend;
  37         u_int16_t vsstart, vsend;
  38         u_int32_t opt;
  39 };
  40 #define MQ200_CRT_640x480_60Hz  0
  41 #define MQ200_CRT_800x600_60Hz  1
  42 #define MQ200_CRT_1024x768_60Hz 2
  43
  44 struct mq200_clock_setting {
  45         u_int8_t        mem, ge, gc[2];
  46         int             pll1, pll2, pll3;
  47 };
  48
  49 struct mq200_md_param {
  50         platid_t        *md_platform;
  51         short           md_fp_width, md_fp_height;
  52         int             md_baseclock;
  53         int             md_flags;
  54 #define MQ200_MD_HAVECRT        (1<<0)
  55 #define MQ200_MD_HAVEFP         (1<<1)
  56         u_int32_t       *md_init_ops;
  57         const struct mq200_clock_setting *md_clock_settings;
  58         u_int32_t       md_init_dcmisc;
  59         u_int32_t       md_init_pmc;
  60         u_int32_t       md_init_mm01;
  61 };
  62
  63 extern struct mq200_crt_param mq200_crt_params[];
  64 extern int mq200_crt_nparams;
  65 extern const char *mq200_clknames[];
  66
  67 int mq200_pllparam(int reqout, u_int32_t *res);
  68 void mq200_set_pll(struct mq200_softc *, int, int);
  69 void mq200_setup_regctx(struct mq200_softc *sc);
  70 void mq200_setup(struct mq200_softc *sc);
  71 void mq200_win_enable(struct mq200_softc *sc, int gc,
  72                            u_int32_t depth, u_int32_t start,
  73                            int width, int height, int stride);
  74 void mq200_win_disable(struct mq200_softc *sc, int gc);
  75 void mq200_setupmd(struct mq200_softc *sc);
  76 void mq200_mdsetup(struct mq200_softc *sc);
  77
  78 void mq200_dump_gc(struct mq200_softc *sc, int gc);
  79 void mq200_dump_fp(struct mq200_softc *sc);
  80 void mq200_dump_dc(struct mq200_softc *sc);
  81 void mq200_dump_pll(struct mq200_softc *sc);
  82 void mq200_dump_all(struct mq200_softc *sc);
  83 char* mq200_regname(struct mq200_softc *sc, int offset, char *buf, int size);
  84
  85 #ifdef MQ200_DEBUG
  86 #ifndef MQ200DEBUG_CONF
  87 #define MQ200DEBUG_CONF 0
  88 #endif
  89 extern int mq200_debug;
  90 #define DPRINTF(fmt, args...)   do { if (mq200_debug) printf("mq200: " fmt, ##args); } while(0)
  91 #define VPRINTF(fmt, args...)   do { if (bootverbose || mq200_debug) printf("mq200: " fmt, ##args); } while(0)
  92 #else
  93 #define DPRINTF(fmt, args...)   do { } while (0)
  94 #define VPRINTF(fmt, args...)   do { if (bootverbose) printf("mq200: " fmt, ##args); } while(0)
  95 #endif
  96
  97 /*
  98  * register access wrappers
  99  */
 100 static inline void
 101 mq200_writex(struct mq200_softc *sc, int offset, u_int32_t data)
 102 {
 103 #ifdef _KERNEL
 104         bus_space_write_4(sc->sc_iot, sc->sc_ioh, offset, data);
 105 #else
 106         *(volatile unsigned long*)(sc->sc_baseaddr + offset) = data;
 107 #endif
 108 }
 109
 110 #ifdef MQ200_DEBUG
 111 void
 112 mq200_write(struct mq200_softc *sc, int offset, u_int32_t data);
 113 #else
 114 static inline void
 115 mq200_write(struct mq200_softc *sc, int offset, u_int32_t data)
 116 {
 117         mq200_writex(sc, offset, data);
 118 }
 119 #endif /* MQ200_DEBUG */
 120
 121 static inline void
 122 mq200_write2(struct mq200_softc *sc, struct mq200_regctx *reg, u_int32_t data)
 123 {
 124         reg->val = data;
 125         mq200_writex(sc, reg->offset, reg->val);
 126 }
 127
 128 static inline u_int32_t
 129 mq200_read(struct mq200_softc *sc, int offset)
 130 {
 131 #ifdef _KERNEL
 132         return bus_space_read_4(sc->sc_iot, sc->sc_ioh, offset);
 133 #else
 134         return *(volatile unsigned long*)(sc->sc_baseaddr + offset);
 135 #endif
 136 }
 137
 138 static inline void
 139 mq200_mod(struct mq200_softc *sc, struct mq200_regctx *reg, u_int32_t mask, u_int32_t data)
 140 {
 141         reg->val &= ~mask;
 142         reg->val |= data;
 143         mq200_writex(sc, reg->offset, reg->val);
 144 }
 145
 146 static inline void
 147 mq200_on(struct mq200_softc *sc, struct mq200_regctx *reg, unsigned long data)
 148 {
 149         mq200_mod(sc, reg, data, data);
 150 }
 151
 152 static inline void
 153 mq200_off(struct mq200_softc *sc, struct mq200_regctx *reg, unsigned long data)
 154 {
 155         mq200_mod(sc, reg, data, 0);
 156 }