Expand PMF_FN_* macros.
[netbsd-mini2440.git] / sys / arch / hpcmips / tx / tx39clockreg.h
blobfe1b546ebaaeed036c9a352b1a5efea59411365e
1 /* $NetBSD: tx39clockreg.h,v 1.2 2000/09/28 16:18:26 uch Exp $ */
3 /*-
4 * Copyright (c) 1999, 2000 The NetBSD Foundation, Inc.
5 * All rights reserved.
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by UCHIYAMA Yasushi.
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
33 * Toshiba TX3912/3922 Clock module
36 #define TX39_CLOCKCTRL_REG 0x1c0
39 * Clock Control Register
41 /* R/W */
42 #define TX39_CLOCK_CHICLKDIV_SHIFT 24
43 #define TX39_CLOCK_CHICLKDIV_MASK 0xff
44 #define TX39_CLOCK_CHICLKDIV(cr) \
45 (((cr) >> TX39_CLOCK_CHICLKDIV_SHIFT) & \
46 TX39_CLOCK_CHICLKDIV_MASK)
47 #define TX39_CLOCK_CHICLKDIV_SET(cr, val) \
48 ((cr) | (((val) << TX39_CLOCK_CHICLKDIV_SHIFT) & \
49 (TX39_CLOCK_CHICLKDIV_MASK << TX39_CLOCK_CHICLKDIV_SHIFT)))
51 #define TX39_CLOCK_ENCLKTEST 0x00800000
52 #define TX39_CLOCK_CCLKTESTSELSIB 0x00400000
53 #define TX39_CLOCK_CHIMCLKSEL 0x00200000
54 #define TX39_CLOCK_CHICLKDIR 0x00100000
55 #define TX39_CLOCK_ENCHIMCLK 0x00080000
56 #ifdef TX391X
57 #define TX39_CLOCK_ENVIDCLK 0x00040000
58 #define TX39_CLOCK_ENMBUSCLK 0x00020000
59 #endif /* TX391X */
60 #ifdef TX392X
61 #define TX39_CLOCK_SPICLKDIR 0x00040000
62 #define TX39_CLOCK_ENIRDACLK 0x00020000
63 #endif /* TX392X */
64 #define TX39_CLOCK_ENSPICLK 0x00010000
65 #define TX39_CLOCK_ENTIMERCLK 0x00008000
66 #define TX39_CLOCK_ENFASTTIMERCLK 0x00004000
67 #define TX39_CLOCK_SIBCLKDIR 0x00002000
68 #ifdef TX392X
69 #define TX39_CLOCK_ENC48MOUTCLK 0x00001000
70 #endif /* TX392X */
71 #define TX39_CLOCK_ENSIBMCLK 0x00000800
73 #define TX39_CLOCK_SIBMCLKDIV_SHIFT 8
74 #define TX39_CLOCK_SIBMCLKDIV_MASK 0x7
75 #define TX39_CLOCK_SIBMCLKDIV(cr) \
76 (((cr) >> TX39_CLOCK_SIBMCLKDIV_SHIFT) & \
77 TX39_CLOCK_SIBMCLKDIV_MASK)
78 #define TX39_CLOCK_SIBMCLKDIV_SET(cr, val) \
79 ((cr) | (((val) << TX39_CLOCK_SIBMCLKDIV_SHIFT) & \
80 (TX39_CLOCK_SIBMCLKDIV_MASK << TX39_CLOCK_SIBMCLKDIV_SHIFT)))
82 #define TX39_CLOCK_CSERSEL 0x00000080
84 #define TX39_CLOCK_CSERDIV_SHIFT 4
85 #define TX39_CLOCK_CSERDIV_MASK 0x7
86 #define TX39_CLOCK_CSERDIV(cr) \
87 (((cr) >> TX39_CLOCK_CSERDIV_SHIFT) & \
88 TX39_CLOCK_CSERDIV_MASK)
89 #define TX39_CLOCK_CSERDIV_SET(cr, val) \
90 ((cr) | (((val) << TX39_CLOCK_CSERDIV_SHIFT) & \
91 (TX39_CLOCK_CSERDIV_MASK << TX39_CLOCK_CSERDIV_SHIFT)))
93 #define TX39_CLOCK_ENCSERCLK 0x00000008
94 #define TX39_CLOCK_ENIRCLK 0x00000004
95 #define TX39_CLOCK_ENUARTACLK 0x00000002
96 #define TX39_CLOCK_ENUARTBCLK 0x00000001