sys/arch/ia64/include/mca_machdep.h

   1 /*      $NetBSD$        */
   2
   3 /*-
   4  * Copyright (c) 2002 Marcel Moolenaar
   5  * All rights reserved.
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions
   9  * are met:
  10  *
  11  * 1. Redistributions of source code must retain the above copyright
  12  *    notice, this list of conditions and the following disclaimer.
  13  * 2. Redistributions in binary form must reproduce the above copyright
  14  *    notice, this list of conditions and the following disclaimer in the
  15  *    documentation and/or other materials provided with the distribution.
  16  *
  17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  18  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  19  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  20  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  21  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  22  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  26  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  *
  28  * $FreeBSD$
  29  */
  30
  31 #ifndef _MACHINE_MCA_H_
  32 #define _MACHINE_MCA_H_
  33
  34 struct mca_record_header {
  35         uint64_t        rh_seqnr;               /* Record id. */
  36         uint8_t         rh_major;               /* BCD (=02). */
  37         uint8_t         rh_minor;               /* BCD (=00). */
  38         uint8_t         rh_error;               /* Error severity. */
  39 #define MCA_RH_ERROR_RECOVERABLE        0
  40 #define MCA_RH_ERROR_FATAL              1
  41 #define MCA_RH_ERROR_CORRECTED          2
  42         uint8_t         rh_flags;
  43 #define MCA_RH_FLAGS_PLATFORM_ID        0x01    /* Platform_id present. */
  44         uint32_t        rh_length;              /* Size including header. */
  45         uint8_t         rh_time[8];
  46 #define MCA_RH_TIME_SEC         0
  47 #define MCA_RH_TIME_MIN         1
  48 #define MCA_RH_TIME_HOUR        2
  49 #define MCA_RH_TIME_MDAY        4
  50 #define MCA_RH_TIME_MON         5
  51 #define MCA_RH_TIME_YEAR        6
  52 #define MCA_RH_TIME_CENT        7
  53         struct uuid     rh_platform;
  54 };
  55
  56 struct mca_section_header {
  57         struct uuid     sh_uuid;
  58         uint8_t         sh_major;               /* BCD (=02). */
  59         uint8_t         sh_minor;               /* BCD (=00). */
  60         uint8_t         sh_flags;
  61 #define MCA_SH_FLAGS_CORRECTED  0x01            /* Error has been corrected. */
  62 #define MCA_SH_FLAGS_PROPAGATE  0x02            /* Possible propagation. */
  63 #define MCA_SH_FLAGS_RESET      0x04            /* Reset device before use. */
  64 #define MCA_SH_FLAGS_VALID      0x80            /* Flags are valid. */
  65         uint8_t         __reserved;
  66         uint32_t        sh_length;              /* Size including header. */
  67 };
  68
  69 struct mca_cpu_record {
  70         uint64_t        cpu_flags;
  71 #define MCA_CPU_FLAGS_ERRMAP            (1ULL << 0)
  72 #define MCA_CPU_FLAGS_STATE             (1ULL << 1)
  73 #define MCA_CPU_FLAGS_CR_LID            (1ULL << 2)
  74 #define MCA_CPU_FLAGS_PSI_STRUCT        (1ULL << 3)
  75 #define MCA_CPU_FLAGS_CACHE(x)          (((x) >> 4) & 15)
  76 #define MCA_CPU_FLAGS_TLB(x)            (((x) >> 8) & 15)
  77 #define MCA_CPU_FLAGS_BUS(x)            (((x) >> 12) & 15)
  78 #define MCA_CPU_FLAGS_REG(x)            (((x) >> 16) & 15)
  79 #define MCA_CPU_FLAGS_MS(x)             (((x) >> 20) & 15)
  80 #define MCA_CPU_FLAGS_CPUID             (1ULL << 24)
  81         uint64_t        cpu_errmap;
  82         uint64_t        cpu_state;
  83         uint64_t        cpu_cr_lid;
  84         /* Nx cpu_mod (cache). */
  85         /* Nx cpu_mod (TLB). */
  86         /* Nx cpu_mod (bus). */
  87         /* Nx cpu_mod (reg). */
  88         /* Nx cpu_mod (MS). */
  89         /* cpu_cpuid. */
  90         /* cpu_psi. */
  91 };
  92
  93 struct mca_cpu_cpuid {
  94         uint64_t        cpuid[6];
  95 };
  96
  97 struct mca_cpu_mod {
  98         uint64_t        cpu_mod_flags;
  99 #define MCA_CPU_MOD_FLAGS_INFO  (1ULL << 0)
 100 #define MCA_CPU_MOD_FLAGS_REQID (1ULL << 1)
 101 #define MCA_CPU_MOD_FLAGS_RSPID (1ULL << 2)
 102 #define MCA_CPU_MOD_FLAGS_TGTID (1ULL << 3)
 103 #define MCA_CPU_MOD_FLAGS_IP    (1ULL << 4)
 104         uint64_t        cpu_mod_info;
 105         uint64_t        cpu_mod_reqid;
 106         uint64_t        cpu_mod_rspid;
 107         uint64_t        cpu_mod_tgtid;
 108         uint64_t        cpu_mod_ip;
 109 };
 110
 111 struct mca_cpu_psi {
 112         uint64_t        cpu_psi_flags;
 113 #define MCA_CPU_PSI_FLAGS_STATE (1ULL << 0)
 114 #define MCA_CPU_PSI_FLAGS_BR    (1ULL << 1)
 115 #define MCA_CPU_PSI_FLAGS_CR    (1ULL << 2)
 116 #define MCA_CPU_PSI_FLAGS_AR    (1ULL << 3)
 117 #define MCA_CPU_PSI_FLAGS_RR    (1ULL << 4)
 118 #define MCA_CPU_PSI_FLAGS_FR    (1ULL << 5)
 119         uint8_t         cpu_psi_state[1024];    /* XXX variable? */
 120         uint64_t        cpu_psi_br[8];
 121         uint64_t        cpu_psi_cr[128];        /* XXX variable? */
 122         uint64_t        cpu_psi_ar[128];        /* XXX variable? */
 123         uint64_t        cpu_psi_rr[8];
 124         uint64_t        cpu_psi_fr[256];        /* 16 bytes per register! */
 125 };
 126
 127 struct mca_mem_record {
 128         uint64_t        mem_flags;
 129 #define MCA_MEM_FLAGS_STATUS            (1ULL << 0)
 130 #define MCA_MEM_FLAGS_ADDR              (1ULL << 1)
 131 #define MCA_MEM_FLAGS_ADDRMASK          (1ULL << 2)
 132 #define MCA_MEM_FLAGS_NODE              (1ULL << 3)
 133 #define MCA_MEM_FLAGS_CARD              (1ULL << 4)
 134 #define MCA_MEM_FLAGS_MODULE            (1ULL << 5)
 135 #define MCA_MEM_FLAGS_BANK              (1ULL << 6)
 136 #define MCA_MEM_FLAGS_DEVICE            (1ULL << 7)
 137 #define MCA_MEM_FLAGS_ROW               (1ULL << 8)
 138 #define MCA_MEM_FLAGS_COLUMN            (1ULL << 9)
 139 #define MCA_MEM_FLAGS_BITPOS            (1ULL << 10)
 140 #define MCA_MEM_FLAGS_REQID             (1ULL << 11)
 141 #define MCA_MEM_FLAGS_RSPID             (1ULL << 12)
 142 #define MCA_MEM_FLAGS_TGTID             (1ULL << 13)
 143 #define MCA_MEM_FLAGS_BUSDATA           (1ULL << 14)
 144 #define MCA_MEM_FLAGS_OEM_ID            (1ULL << 15)
 145 #define MCA_MEM_FLAGS_OEM_DATA          (1ULL << 16)
 146         uint64_t        mem_status;
 147         uint64_t        mem_addr;
 148         uint64_t        mem_addrmask;
 149         uint16_t        mem_node;
 150         uint16_t        mem_card;
 151         uint16_t        mem_module;
 152         uint16_t        mem_bank;
 153         uint16_t        mem_device;
 154         uint16_t        mem_row;
 155         uint16_t        mem_column;
 156         uint16_t        mem_bitpos;
 157         uint64_t        mem_reqid;
 158         uint64_t        mem_rspid;
 159         uint64_t        mem_tgtid;
 160         uint64_t        mem_busdata;
 161         struct uuid     mem_oem_id;
 162         uint16_t        mem_oem_length;         /* Size of OEM data. */
 163         /* N bytes of OEM platform data. */
 164 };
 165
 166 struct mca_pcibus_record {
 167         uint64_t        pcibus_flags;
 168 #define MCA_PCIBUS_FLAGS_STATUS         (1ULL << 0)
 169 #define MCA_PCIBUS_FLAGS_ERROR          (1ULL << 1)
 170 #define MCA_PCIBUS_FLAGS_BUS            (1ULL << 2)
 171 #define MCA_PCIBUS_FLAGS_ADDR           (1ULL << 3)
 172 #define MCA_PCIBUS_FLAGS_DATA           (1ULL << 4)
 173 #define MCA_PCIBUS_FLAGS_CMD            (1ULL << 5)
 174 #define MCA_PCIBUS_FLAGS_REQID          (1ULL << 6)
 175 #define MCA_PCIBUS_FLAGS_RSPID          (1ULL << 7)
 176 #define MCA_PCIBUS_FLAGS_TGTID          (1ULL << 8)
 177 #define MCA_PCIBUS_FLAGS_OEM_ID         (1ULL << 9)
 178 #define MCA_PCIBUS_FLAGS_OEM_DATA       (1ULL << 10)
 179         uint64_t        pcibus_status;
 180         uint16_t        pcibus_error;
 181         uint16_t        pcibus_bus;
 182         uint32_t        __reserved;
 183         uint64_t        pcibus_addr;
 184         uint64_t        pcibus_data;
 185         uint64_t        pcibus_cmd;
 186         uint64_t        pcibus_reqid;
 187         uint64_t        pcibus_rspid;
 188         uint64_t        pcibus_tgtid;
 189         struct uuid     pcibus_oem_id;
 190         uint16_t        pcibus_oem_length;      /* Size of OEM data. */
 191         /* N bytes of OEM platform data. */
 192 };
 193
 194 struct mca_pcidev_record {
 195         uint64_t        pcidev_flags;
 196 #define MCA_PCIDEV_FLAGS_STATUS         (1ULL << 0)
 197 #define MCA_PCIDEV_FLAGS_INFO           (1ULL << 1)
 198 #define MCA_PCIDEV_FLAGS_REG_MEM        (1ULL << 2)
 199 #define MCA_PCIDEV_FLAGS_REG_IO         (1ULL << 3)
 200 #define MCA_PCIDEV_FLAGS_REG_DATA       (1ULL << 4)
 201 #define MCA_PCIDEV_FLAGS_OEM_DATA       (1ULL << 5)
 202         uint64_t        pcidev_status;
 203         struct {
 204                 uint16_t        info_vendor;
 205                 uint16_t        info_device;
 206                 uint32_t        info_ccfn;      /* Class code & funct. nr. */
 207 #define MCA_PCIDEV_INFO_CLASS(x)        ((x) & 0xffffff)
 208 #define MCA_PCIDEV_INFO_FUNCTION(x)     (((x) >> 24) & 0xff)
 209                 uint8_t         info_slot;
 210                 uint8_t         info_bus;
 211                 uint8_t         info_segment;
 212                 uint8_t         __res0;
 213                 uint32_t        __res1;
 214         } pcidev_info;
 215         uint32_t        pcidev_reg_mem;
 216         uint32_t        pcidev_reg_io;
 217         /* Nx pcidev_reg. */
 218         /* M bytes of OEM platform data. */
 219 };
 220
 221 struct mca_pcidev_reg {
 222         uint64_t        pcidev_reg_addr;
 223         uint64_t        pcidev_reg_data;
 224 };
 225
 226 #define MCA_UUID_CPU            \
 227         {0xe429faf1,0x3cb7,0x11d4,0xbc,0xa7,{0x00,0x80,0xc7,0x3c,0x88,0x81}}
 228 #define MCA_UUID_MEMORY         \
 229         {0xe429faf2,0x3cb7,0x11d4,0xbc,0xa7,{0x00,0x80,0xc7,0x3c,0x88,0x81}}
 230 #define MCA_UUID_SEL            \
 231         {0xe429faf3,0x3cb7,0x11d4,0xbc,0xa7,{0x00,0x80,0xc7,0x3c,0x88,0x81}}
 232 #define MCA_UUID_PCI_BUS        \
 233         {0xe429faf4,0x3cb7,0x11d4,0xbc,0xa7,{0x00,0x80,0xc7,0x3c,0x88,0x81}}
 234 #define MCA_UUID_SMBIOS         \
 235         {0xe429faf5,0x3cb7,0x11d4,0xbc,0xa7,{0x00,0x80,0xc7,0x3c,0x88,0x81}}
 236 #define MCA_UUID_PCI_DEV        \
 237         {0xe429faf6,0x3cb7,0x11d4,0xbc,0xa7,{0x00,0x80,0xc7,0x3c,0x88,0x81}}
 238 #define MCA_UUID_GENERIC        \
 239         {0xe429faf7,0x3cb7,0x11d4,0xbc,0xa7,{0x00,0x80,0xc7,0x3c,0x88,0x81}}
 240
 241 #ifdef _KERNEL
 242
 243 void ia64_mca_init(void);
 244 void ia64_mca_save_state(int);
 245
 246 #endif /* _KERNEL */
 247
 248 #endif /* _MACHINE_MCA_H_ */