sys/arch/ia64/include/pte.h

   1 /*      $NetBSD$        */
   2
   3 /*-
   4  * Copyright (c) 2001 Doug Rabson
   5  * All rights reserved.
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions
   9  * are met:
  10  * 1. Redistributions of source code must retain the above copyright
  11  *    notice, this list of conditions and the following disclaimer.
  12  * 2. Redistributions in binary form must reproduce the above copyright
  13  *    notice, this list of conditions and the following disclaimer in the
  14  *    documentation and/or other materials provided with the distribution.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  26  * SUCH DAMAGE.
  27  *
  28  * $FreeBSD$
  29  */
  30
  31 #ifndef _MACHINE_PTE_H_
  32 #define _MACHINE_PTE_H_
  33
  34 #define PTE_PRESENT     0x0000000000000001
  35 #define PTE__RV1_       0x0000000000000002
  36 #define PTE_MA_MASK     0x000000000000001C
  37 #define PTE_MA_WB       0x0000000000000000
  38 #define PTE_MA_UC       0x0000000000000010
  39 #define PTE_MA_UCE      0x0000000000000014
  40 #define PTE_MA_WC       0x0000000000000018
  41 #define PTE_MA_NATPAGE  0x000000000000001C
  42 #define PTE_ACCESSED    0x0000000000000020
  43 #define PTE_DIRTY       0x0000000000000040
  44 #define PTE_PL_MASK     0x0000000000000180
  45 #define PTE_PL_KERN     0x0000000000000000
  46 #define PTE_PL_USER     0x0000000000000180
  47 #define PTE_AR_MASK     0x0000000000000E00
  48
  49 #define PTE_AR_R        0x0000000000000000
  50 #define PTE_AR_RX       0x0000000000000200
  51 #define PTE_AR_RW       0x0000000000000400
  52 #define PTE_AR_RWX      0x0000000000000600
  53 #define PTE_AR_R_RW     0x0000000000000800
  54 #define PTE_AR_RX_RWX   0x0000000000000A00
  55 #define PTE_AR_RWX_RW   0x0000000000000C00
  56 #define PTE_AR_X_RX     0x0000000000000E00
  57 #define PTE_PPN_MASK    0x0003FFFFFFFFF000
  58 #define PTE__RV2_       0x000C000000000000
  59 #define PTE_ED          0x0010000000000000
  60 #define PTE_IG_MASK     0xFFE0000000000000
  61 #define PTE_WIRED       0x0020000000000000
  62 #define PTE_MANAGED     0x0040000000000000
  63 #define PTE_PROT_MASK   0x0700000000000000
  64
  65 #define ITIR__RV1_      0x0000000000000003
  66 #define ITIR_PS_MASK    0x00000000000000FC
  67 #define ITIR_KEY_MASK   0x00000000FFFFFF00
  68 #define ITIR__RV2_      0xFFFFFFFF00000000
  69
  70 #ifndef _LOCORE
  71
  72 typedef uint64_t pt_entry_t;
  73
  74 static __inline pt_entry_t
  75 pte_atomic_clear(pt_entry_t *ptep, uint64_t val)
  76 {
  77         return (atomic_clear_64(ptep, val));
  78 }
  79
  80 static __inline pt_entry_t
  81 pte_atomic_set(pt_entry_t *ptep, uint64_t val)
  82 {
  83         return (atomic_set_64(ptep, val));
  84 }
  85
  86 /*
  87  * A long-format VHPT entry.
  88  */
  89 struct ia64_lpte {
  90         pt_entry_t      pte;
  91         uint64_t        itir;
  92         uint64_t        tag;            /* includes ti */
  93         uint64_t        chain;          /* pa of collision chain */
  94 };
  95
  96
  97 /*
  98  * Layout of rr[x].
  99  */
 100 struct ia64_rr {
 101         uint64_t        rr_ve   :1;     /* bit 0 */
 102         uint64_t        __rv1__ :1;     /* bit 1 */
 103         uint64_t        rr_ps   :6;     /* bits 2..7 */
 104         uint64_t        rr_rid  :24;    /* bits 8..31 */
 105         uint64_t        __rv2__ :32;    /* bits 32..63 */
 106 };
 107
 108 #endif /* !LOCORE */
 109
 110 #endif /* !_MACHINE_PTE_H_ */