sys/arch/next68k/include/intr.h

   1 /*      $NetBSD: intr.h,v 1.20 2007/12/03 15:34:06 ad Exp $     */
   2
   3 /*
   4  * Copyright (C) 1997 Scott Reynolds
   5  * Copyright (C) 1998 Darrin Jewell
   6  * All rights reserved.
   7  *
   8  * Redistribution and use in source and binary forms, with or without
   9  * modification, are permitted provided that the following conditions
  10  * are met:
  11  * 1. Redistributions of source code must retain the above copyright
  12  *    notice, this list of conditions and the following disclaimer.
  13  * 2. Redistributions in binary form must reproduce the above copyright
  14  *    notice, this list of conditions and the following disclaimer in the
  15  *    documentation and/or other materials provided with the distribution.
  16  * 3. The name of the author may not be used to endorse or promote products
  17  *    derived from this software without specific prior written permission.
  18  *
  19  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  20  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  21  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  22  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  23  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  24  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  25  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  26  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  27  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  28  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  29  */
  30
  31 #ifndef _NEXT68K_INTR_H_
  32 #define _NEXT68K_INTR_H_
  33
  34 #include <machine/psl.h>
  35
  36 /* Probably want to dealwith IPL's here @@@ */
  37
  38 #ifdef _KERNEL
  39
  40 /* spl0 requires checking for software interrupts */
  41
  42 /* watch out for side effects */
  43 #define splx(s)         ((s) & PSL_IPL ? _spl(s) : spl0())
  44
  45 #define splsoftbio()    splraise1()
  46 #define splsoftnet()    splraise1()
  47 #define splsoftclock()  splraise1()
  48 #define splsoftserial() splraise1()
  49 #define splvm()         splraise6()
  50 #define splhigh()       spl7()
  51 #define splsched()      spl7()
  52
  53 #define spldma()        splraise6()
  54
  55 /****************************************************************/
  56
  57 #define IPL_NONE        0
  58 #define IPL_SOFTCLOCK   1
  59 #define IPL_SOFTBIO     2
  60 #define IPL_SOFTNET     3
  61 #define IPL_SOFTSERIAL  4
  62 #define IPL_VM          5
  63 #define IPL_SCHED       6
  64 #define IPL_HIGH        7
  65 #define NIPL            8
  66
  67 extern const uint16_t ipl2psl_table[NIPL];
  68
  69 typedef int ipl_t;
  70 typedef struct {
  71         uint16_t _psl;
  72 } ipl_cookie_t;
  73
  74 static inline ipl_cookie_t
  75 makeiplcookie(ipl_t ipl)
  76 {
  77
  78         return (ipl_cookie_t){._psl = ipl2psl_table[ipl]};
  79 }
  80
  81 static inline int
  82 splraiseipl(ipl_cookie_t icookie)
  83 {
  84
  85         return _splraise(icookie._psl);
  86 }
  87
  88 /****************************************************************/
  89
  90 /* locore.s */
  91 int     spl0(void);
  92
  93 extern volatile u_long *intrstat;
  94 extern volatile u_long *intrmask;
  95 #define INTR_SETMASK(x)         (*intrmask = (x))
  96 #define INTR_ENABLE(x)          (*intrmask |= NEXT_I_BIT(x))
  97 #define INTR_DISABLE(x)         (*intrmask &= (~NEXT_I_BIT(x)))
  98 #define INTR_OCCURRED(x)        (*intrstat & NEXT_I_BIT(x))
  99
 100 #endif /* _KERNEL */
 101
 102 #endif /* _NEXT68K_INTR_H_ */