1 /* $NetBSD: instr.h,v 1.1.26.3 2004/09/21 13:20:41 skrll Exp $ */
4 * Copyright (c) 1992, 1993
5 * The Regents of the University of California. All rights reserved.
7 * This software was developed by the Computer Systems Engineering group
8 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
9 * contributed to Berkeley.
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12 * must display the following acknowledgement:
13 * This product includes software developed by the University of
14 * California, Lawrence Berkeley Laboratory.
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17 * modification, are permitted provided that the following conditions
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20 * notice, this list of conditions and the following disclaimer.
21 * 2. Redistributions in binary form must reproduce the above copyright
22 * notice, this list of conditions and the following disclaimer in the
23 * documentation and/or other materials provided with the distribution.
24 * 3. Neither the name of the University nor the names of its contributors
25 * may be used to endorse or promote products derived from this software
26 * without specific prior written permission.
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40 * @(#)instr.h 8.1 (Berkeley) 6/11/93
47 int i_int
; /* as a whole */
51 * Any instruction type.
54 u_int i_opcd
:6; /* first-level decode */
233 * Primary opcode numbers:
238 #define OPC_MULLI 0x07
239 #define OPC_SUBFIC 0x08
241 #define OPC_CMPLI 0x0a
242 #define OPC_CMPI 0x0b
243 #define OPC_ADDIC 0x0c
244 #define OPC_ADDIC_DOT 0x0d
245 #define OPC_ADDI 0x0e
246 #define OPC_ADDIS 0x0f
250 #define OPC_branch_19 0x13
251 #define OPC_RLWIMI 0x14
252 #define OPC_RLWINM 0x15
254 #define OPC_RLWNM 0x17
256 #define OPC_ORIS 0x19
257 #define OPC_XORI 0x1a
258 #define OPC_XORIS 0x1b
259 #define OPC_ANDI 0x1c
260 #define OPC_ANDIS 0x1d
261 #define OPC_dwe_rot_30 0x1e
262 #define OPC_integer_31 0x1f
264 #define OPC_LWZU 0x21
266 #define OPC_LBZU 0x23
268 #define OPC_STWU 0x25
270 #define OPC_STBU 0x27
272 #define OPC_LHZU 0x29
274 #define OPC_LHAU 0x2b
276 #define OPC_STHU 0x2d
278 #define OPC_STMW 0x2f
280 #define OPC_LFSU 0x31
282 #define OPC_LFDU 0x33
283 #define OPC_STFS 0x34
284 #define OPC_STFSU 0x35
285 #define OPC_STFD 0x36
286 #define OPC_STFDU 0x37
287 #define OPC_load_st_58 0x3a
288 #define OPC_sp_fp_59 0x3b
289 #define OPC_load_st_62 0x3e
290 #define OPC_dp_fp_63 0x3f
293 * Opcode 31 sub-types (FP only)
295 #define OPC31_TW 0x004
296 #define OPC31_LFSX 0x217
297 #define OPC31_LFSUX 0x237
298 #define OPC31_LFDX 0x257
299 #define OPC31_LFDUX 0x277
300 #define OPC31_STFSX 0x297
301 #define OPC31_STFSUX 0x2b7
302 #define OPC31_STFDX 0x2d7
303 #define OPC31_STFDUX 0x2f7
304 #define OPC31_STFIWX 0x3d7
306 /* Mask for all valid indexed FP load/store ops (except stfiwx) */
307 #define OPC31_FPMASK 0x31f
308 #define OPC31_FPOP 0x217
311 * Opcode 59 sub-types:
314 #define OPC59_FDIVS 0x12
315 #define OPC59_FSUBS 0x14
316 #define OPC59_FADDS 0x15
317 #define OPC59_FSQRTS 0x16
318 #define OPC59_FRES 0x18
319 #define OPC59_FMULS 0x19
320 #define OPC59_FMSUBS 0x1c
321 #define OPC59_FMADDS 0x1d
322 #define OPC59_FNMSUBS 0x1e
323 #define OPC59_FNMADDS 0x1f
326 * Opcode 62 sub-types:
328 #define OPC62_LDE 0x0
329 #define OPC62_LDEU 0x1
330 #define OPC62_LFSE 0x4
331 #define OPC62_LFSEU 0x5
332 #define OPC62_LFDE 0x6
333 #define OPC62_LFDEU 0x7
334 #define OPC62_STDE 0x8
335 #define OPC62_STDEU 0x9
336 #define OPC62_STFSE 0xc
337 #define OPC62_STFSEU 0xd
338 #define OPC62_STFDE 0xe
339 #define OPC62_STFDEU 0xf
342 * Opcode 63 sub-types:
344 * (The first group are masks....)
347 #define OPC63M_MASK 0x10
348 #define OPC63M_FDIV 0x12
349 #define OPC63M_FSUB 0x14
350 #define OPC63M_FADD 0x15
351 #define OPC63M_FSQRT 0x16
352 #define OPC63M_FSEL 0x17
353 #define OPC63M_FMUL 0x19
354 #define OPC63M_FRSQRTE 0x1a
355 #define OPC63M_FMSUB 0x1c
356 #define OPC63M_FMADD 0x1d
357 #define OPC63M_FNMSUB 0x1e
358 #define OPC63M_FNMADD 0x1f
360 #define OPC63_FCMPU 0x00
361 #define OPC63_FRSP 0x0c
362 #define OPC63_FCTIW 0x0e
363 #define OPC63_FCTIWZ 0x0f
364 #define OPC63_FCMPO 0x20
365 #define OPC63_MTFSB1 0x26
366 #define OPC63_FNEG 0x28
367 #define OPC63_MCRFS 0x40
368 #define OPC63_MTFSB0 0x46
369 #define OPC63_FMR 0x48
370 #define OPC63_MTFSFI 0x86
371 #define OPC63_FNABS 0x88
372 #define OPC63_FABS 0x108
373 #define OPC63_MFFS 0x247
374 #define OPC63_MTFSF 0x2c7
375 #define OPC63_FCTID 0x32e
376 #define OPC63_FCTIDZ 0x32f
377 #define OPC63_FCFID 0x34e
382 #define FTYPE_LNG -1 /* data = 64-bit signed long integer */
383 #define FTYPE_INT 0 /* data = 32-bit signed integer */
384 #define FTYPE_SNG 1 /* data = 32-bit float */
385 #define FTYPE_DBL 2 /* data = 64-bit double */
388 * FPCSR rounding modes.
390 #define FSR_RD_RN 0 /* round to nearest */
391 #define FSR_RD_RZ 1 /* round towards 0 */
392 #define FSR_RD_RP 2 /* round towards +inf */
393 #define FSR_RD_RM 3 /* round towards -inf */