sys/arch/sgimips/dev/ctlreg.h

   1 /*      $NetBSD: picreg.h,v 1.5 2006/03/08 23:46:24 lukem Exp $ */
   2
   3 /*
   4  * Copyright (c) 2009 Stephen M. Rumble
   5  * All rights reserved.
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions
   9  * are met:
  10  * 1. Redistributions of source code must retain the above copyright
  11  *    notice, this list of conditions and the following disclaimer.
  12  * 2. Redistributions in binary form must reproduce the above copyright
  13  *    notice, this list of conditions and the following disclaimer in the
  14  *    documentation and/or other materials provided with the distribution.
  15  * 3. The name of the author may not be used to endorse or promote products
  16  *    derived from this software without specific prior written permission.
  17  *
  18  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  19  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  20  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  21  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  22  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  23  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  24  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  25  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  26  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  27  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  28  */
  29
  30 #ifndef _ARCH_SGIMIPS_DEV_CTLREG_H_
  31 #define _ARCH_SGIMIPS_DEV_CTLREG_H_
  32
  33 #define CTL_MEMCFG              0x00000000      /* Memory configuration (8) */
  34
  35 #define CTL_SYSID               0x00000001      /* System ID (8) */
  36 #define CTL_SYSID_FPU           0x02            /* FPU present */
  37
  38 #define CTL_CPUCTRL             0x00080002      /* Misc. config bits (16) */
  39 #define CTL_CPUCTRL_SYSRESET    0x0200          /* VME SYSRESET: reset system */
  40 #define CTL_CPUCTRL_PARITY      0x0400          /* Enable parity checking */
  41 #define CTL_CPUCTRL_SLAVE       0x0800          /* Enable slave accesses */
  42 #define CTL_CPUCTRL_WDOG        0x4000          /* Watchdog enable */
  43
  44 #define CTL_LAN_PAR_CLR         0x002a0000      /* Clear LAN parity error (8) */
  45 #define CTL_DMA_PAR_CLR         0x002a0001      /* Clear DMA parity error (8) */
  46 #define CTL_CPU_PAR_CLR         0x002a0002      /* Clear CPU parity error (8) */
  47 #define CTL_VME_PAR_CLR         0x002a0003      /* Clear VME parity error (8) */
  48
  49 #define CTL_AUX_CPUCTRL         0x000e0000      /* Aux. cpu control reg (8) */
  50 #define CTL_AUX_CPUCTRL_CONSLED 0x10            /* Enable console led */
  51 #define CTL_AUX_CPUCTRL_HRTBEAT 0x01            /* Heartbeat */
  52
  53 #endif  /* _ARCH_SGIMIPS_DEV_CTLREG_H_ */