sys/arch/sgimips/gio/lightreg.h

   1 /*      $Id: lightreg.h,v 1.3 2006/12/29 00:31:48 rumble Exp $  */
   2
   3 /*
   4  * Copyright (c) 2006 Stephen M. Rumble
   5  * All rights reserved.
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions
   9  * are met:
  10  * 1. Redistributions of source code must retain the above copyright
  11  *    notice, this list of conditions and the following disclaimer.
  12  * 2. The name of the author may not be used to endorse or promote products
  13  *    derived from this software without specific prior written permission.
  14  *
  15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  16  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  17  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  18  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  19  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  20  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  21  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  22  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  23  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  24  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  25  */
  26
  27 #ifndef _ARCH_SGIMIPS_GIO_LIGHTREG_H_
  28 #define _ARCH_SGIMIPS_GIO_LIGHTREG_H_
  29
  30 #define LIGHT_ADDR_0            0x1f3f0000
  31 #define LIGHT_ADDR_1            0x1f3f8000      /* dual head */
  32
  33 #define REX_PAGE0_SET           0x00000000      /* REX registers */
  34 #define REX_PAGE0_GO            0x00000800
  35 #define REX_PAGE1_SET           0x00004790      /* configuration registers */
  36 #define REX_PAGE1_GO            0x00004F90
  37
  38 /* REX register offsets (from REX_PAGE0_{SET,GO}) */
  39 #define REX_P0REG_COMMAND       0x00000000
  40 #define REX_P0REG_XSTARTI       0x0000000C
  41 #define REX_P0REG_YSTARTI       0x0000001C
  42 #define REX_P0REG_XYMOVE        0x00000034
  43 #define REX_P0REG_COLORREDI     0x00000038
  44 #define REX_P0REG_COLORGREENI   0x00000040
  45 #define REX_P0REG_COLORBLUEI    0x00000048
  46 #define REX_P0REG_COLORBACK     0x0000005C
  47 #define REX_P0REG_ZPATTERN      0x00000060
  48 #define REX_P0REG_XENDI         0x00000084
  49 #define REX_P0REG_YENDI         0x00000088
  50
  51 /* configuration register offsets (from REX_PAGE1_{SET,GO}) */
  52 #define REX_P1REG_WCLOCKREV     0x00000054      /* nsclock / revision */
  53 #define REX_P1REG_CFGSEL        0x0000005c      /* function selector */
  54 #define REX_P1REG_VC1_ADDRDATA  0x00000060      /* vc1 r/w addr and data 8bit */
  55 #define REX_P1REG_CFGMODE       0x00000068      /* REX system config */
  56 #define REX_P1REG_XYOFFSET      0x0000006c      /* x, y start of screen */
  57
  58 /* REX opcodes */
  59 #define REX_OP_NOP              0x00000000
  60 #define REX_OP_DRAW             0x00000001
  61
  62 /* REX command flags */
  63 #define REX_OP_FLG_BLOCK        0x00000008
  64 #define REX_OP_FLG_LENGTH32     0x00000010
  65 #define REX_OP_FLG_QUADMODE     0x00000020
  66 #define REX_OP_FLG_XYCONTINUE   0x00000080
  67 #define REX_OP_FLG_STOPONX      0x00000100
  68 #define REX_OP_FLG_STOPONY      0x00000200
  69 #define REX_OP_FLG_ENZPATTERN   0x00000400
  70 #define REX_OP_FLG_LOGICSRC     0x00080000
  71 #define REX_OP_FLG_ZOPAQUE      0x00800000
  72 #define REX_OP_FLG_ZCONTINUE    0x01000000
  73
  74 /* REX logicops */
  75 #define REX_LOGICOP_SRC         0x30000000
  76
  77 /* configmode bits */
  78 #define REX_CFGMODE_BUSY        0x00000001
  79
  80 /* configsel bits */
  81 #define REX_CFGSEL_VC1_LADDR    0x00000004      /* low address bits */
  82 #define REX_CFGSEL_VC1_HADDR    0x00000005      /* high address bits */
  83 #define REX_CFGSEL_VC1_SYSCTL   0x00000006
  84
  85 /* vc1 sysctl bits (byte) */
  86 #define VC1_SYSCTL_VIDEO_ON     0x04
  87 #define VC1_SYSCTL_CURSOR       0x10
  88 #define VC1_SYSCTL_CURSOR_ON    0x20
  89
  90 #endif  /* !_ARCH_SGIMIPS_GIO_LIGHTREG_H_ */