sys/arch/sgimips/include/intr.h

   1 /*      $NetBSD$        */
   2
   3 /*
   4  * Copyright (c) 2000 Soren S. Jorvang
   5  * All rights reserved.
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions
   9  * are met:
  10  * 1. Redistributions of source code must retain the above copyright
  11  *    notice, this list of conditions and the following disclaimer.
  12  * 2. Redistributions in binary form must reproduce the above copyright
  13  *    notice, this list of conditions and the following disclaimer in the
  14  *    documentation and/or other materials provided with the distribution.
  15  * 3. All advertising materials mentioning features or use of this software
  16  *    must display the following acknowledgement:
  17  *          This product includes software developed for the
  18  *          NetBSD Project.  See http://www.NetBSD.org/ for
  19  *          information about NetBSD.
  20  * 4. The name of the author may not be used to endorse or promote products
  21  *    derived from this software without specific prior written permission.
  22  *
  23  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  24  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  25  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  26  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  27  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  28  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  29  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  30  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  31  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  32  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  33  */
  34
  35 #ifndef _SGIMIPS_INTR_H_
  36 #define _SGIMIPS_INTR_H_
  37
  38 #define IPL_NONE        0       /* Disable only this interrupt. */
  39 #define IPL_SOFTCLOCK   1       /* generic software interrupts */
  40 #define IPL_SOFTBIO     1       /* serial software interrupts */
  41 #define IPL_SOFTNET     1       /* network software interrupts */
  42 #define IPL_SOFTSERIAL  1       /* clock software interrupts */
  43 #define IPL_VM          2
  44 #define IPL_SCHED       3
  45 #define IPL_HIGH        4
  46
  47 #define NIPL            5
  48
  49 /* Interrupt sharing types. */
  50 #define IST_NONE        0       /* none */
  51 #define IST_PULSE       1       /* pulsed */
  52 #define IST_EDGE        2       /* edge-triggered */
  53 #define IST_LEVEL       3       /* level-triggered */
  54
  55 #ifdef _KERNEL
  56 #ifndef _LOCORE
  57
  58 #include <sys/queue.h>
  59 #include <sys/types.h>
  60 #include <sys/evcnt.h>
  61 #include <mips/cpuregs.h>
  62 #include <mips/locore.h>
  63
  64 #define NINTR   32
  65
  66 struct sgimips_intrhand {
  67         LIST_ENTRY(sgimips_intrhand)
  68                 ih_q;
  69         int     (*ih_fun) (void *);
  70         void     *ih_arg;
  71         struct  sgimips_intr *ih_intrhead;
  72         struct  sgimips_intrhand *ih_next;
  73         int     ih_pending;
  74 };
  75
  76 struct sgimips_intr {
  77         LIST_HEAD(,sgimips_intrhand)
  78                 intr_q;
  79         struct  evcnt ih_evcnt;
  80         unsigned long intr_ipl;
  81 };
  82
  83 extern struct sgimips_intrhand intrtab[];
  84
  85 extern const int *ipl2spl_table;
  86
  87 #define spl0()          (void)_spllower(0)
  88 #define splx(s)         (void)_splset(s)
  89 #define splvm()         _splraise(ipl2spl_table[IPL_VM])
  90 #define splsched()      _splraise(ipl2spl_table[IPL_SCHED])
  91 #define splhigh()       _splraise(MIPS_INT_MASK)
  92
  93 #define splsoftclock()  _splraise(MIPS_SOFT_INT_MASK_1)
  94 #define splsoftbio()    splsoftclock()
  95 #define splsoftnet()    splsoftclock()
  96 #define splsoftserial() splsoftclock()
  97
  98 extern void *           cpu_intr_establish(int, int, int (*)(void *), void *);
  99
 100 typedef int ipl_t;
 101 typedef struct {
 102         int _spl;
 103 } ipl_cookie_t;
 104
 105 ipl_cookie_t makeiplcookie(ipl_t);
 106
 107 static inline int
 108 splraiseipl(ipl_cookie_t icookie)
 109 {
 110
 111         return _splraise(icookie._spl);
 112 }
 113
 114 #include <mips/softintr.h>
 115
 116 #endif /* _LOCORE */
 117 #endif /* !_KERNEL */
 118
 119 #endif  /* !_SGIMIPS_INTR_H_ */