sys/arch/sparc/fpu/fpu_add.c

   1 /*      $NetBSD: fpu_add.c,v 1.5 2003/08/07 16:29:36 agc Exp $ */
   2
   3 /*
   4  * Copyright (c) 1992, 1993
   5  *      The Regents of the University of California.  All rights reserved.
   6  *
   7  * This software was developed by the Computer Systems Engineering group
   8  * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
   9  * contributed to Berkeley.
  10  *
  11  * All advertising materials mentioning features or use of this software
  12  * must display the following acknowledgement:
  13  *      This product includes software developed by the University of
  14  *      California, Lawrence Berkeley Laboratory.
  15  *
  16  * Redistribution and use in source and binary forms, with or without
  17  * modification, are permitted provided that the following conditions
  18  * are met:
  19  * 1. Redistributions of source code must retain the above copyright
  20  *    notice, this list of conditions and the following disclaimer.
  21  * 2. Redistributions in binary form must reproduce the above copyright
  22  *    notice, this list of conditions and the following disclaimer in the
  23  *    documentation and/or other materials provided with the distribution.
  24  * 3. Neither the name of the University nor the names of its contributors
  25  *    may be used to endorse or promote products derived from this software
  26  *    without specific prior written permission.
  27  *
  28  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
  29  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  30  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  31  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
  32  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  33  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  34  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  35  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  36  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  37  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  38  * SUCH DAMAGE.
  39  *
  40  *      @(#)fpu_add.c   8.1 (Berkeley) 6/11/93
  41  */
  42
  43 /*
  44  * Perform an FPU add (return x + y).
  45  *
  46  * To subtract, negate y and call add.
  47  */
  48
  49 #include <sys/cdefs.h>
  50 __KERNEL_RCSID(0, "$NetBSD: fpu_add.c,v 1.5 2003/08/07 16:29:36 agc Exp $");
  51
  52 #include <sys/types.h>
  53 #ifdef DIAGNOSTIC
  54 #include <sys/systm.h>
  55 #endif
  56
  57 #include <machine/reg.h>
  58 #include <machine/instr.h>
  59
  60 #include <sparc/fpu/fpu_arith.h>
  61 #include <sparc/fpu/fpu_emu.h>
  62 #include <sparc/fpu/fpu_extern.h>
  63
  64 struct fpn *
  65 fpu_add(struct fpemu *fe)
  66 {
  67         register struct fpn *x = &fe->fe_f1, *y = &fe->fe_f2, *r;
  68         register u_int r0, r1, r2, r3;
  69         register int rd;
  70
  71         /*
  72          * Put the `heavier' operand on the right (see fpu_emu.h).
  73          * Then we will have one of the following cases, taken in the
  74          * following order:
  75          *
  76          *  - y = NaN.  Implied: if only one is a signalling NaN, y is.
  77          *      The result is y.
  78          *  - y = Inf.  Implied: x != NaN (is 0, number, or Inf: the NaN
  79          *    case was taken care of earlier).
  80          *      If x = -y, the result is NaN.  Otherwise the result
  81          *      is y (an Inf of whichever sign).
  82          *  - y is 0.  Implied: x = 0.
  83          *      If x and y differ in sign (one positive, one negative),
  84          *      the result is +0 except when rounding to -Inf.  If same:
  85          *      +0 + +0 = +0; -0 + -0 = -0.
  86          *  - x is 0.  Implied: y != 0.
  87          *      Result is y.
  88          *  - other.  Implied: both x and y are numbers.
  89          *      Do addition a la Hennessey & Patterson.
  90          */
  91         ORDER(x, y);
  92         if (ISNAN(y))
  93                 return (y);
  94         if (ISINF(y)) {
  95                 if (ISINF(x) && x->fp_sign != y->fp_sign)
  96                         return (fpu_newnan(fe));
  97                 return (y);
  98         }
  99         rd = ((fe->fe_fsr >> FSR_RD_SHIFT) & FSR_RD_MASK);
 100         if (ISZERO(y)) {
 101                 if (rd != FSR_RD_RM)    /* only -0 + -0 gives -0 */
 102                         y->fp_sign &= x->fp_sign;
 103                 else                    /* any -0 operand gives -0 */
 104                         y->fp_sign |= x->fp_sign;
 105                 return (y);
 106         }
 107         if (ISZERO(x))
 108                 return (y);
 109         /*
 110          * We really have two numbers to add, although their signs may
 111          * differ.  Make the exponents match, by shifting the smaller
 112          * number right (e.g., 1.011 => 0.1011) and increasing its
 113          * exponent (2^3 => 2^4).  Note that we do not alter the exponents
 114          * of x and y here.
 115          */
 116         r = &fe->fe_f3;
 117         r->fp_class = FPC_NUM;
 118         if (x->fp_exp == y->fp_exp) {
 119                 r->fp_exp = x->fp_exp;
 120                 r->fp_sticky = 0;
 121         } else {
 122                 if (x->fp_exp < y->fp_exp) {
 123                         /*
 124                          * Try to avoid subtract case iii (see below).
 125                          * This also guarantees that x->fp_sticky = 0.
 126                          */
 127                         SWAP(x, y);
 128                 }
 129                 /* now x->fp_exp > y->fp_exp */
 130                 r->fp_exp = x->fp_exp;
 131                 r->fp_sticky = fpu_shr(y, x->fp_exp - y->fp_exp);
 132         }
 133         r->fp_sign = x->fp_sign;
 134         if (x->fp_sign == y->fp_sign) {
 135                 FPU_DECL_CARRY
 136
 137                 /*
 138                  * The signs match, so we simply add the numbers.  The result
 139                  * may be `supernormal' (as big as 1.111...1 + 1.111...1, or
 140                  * 11.111...0).  If so, a single bit shift-right will fix it
 141                  * (but remember to adjust the exponent).
 142                  */
 143                 /* r->fp_mant = x->fp_mant + y->fp_mant */
 144                 FPU_ADDS(r->fp_mant[3], x->fp_mant[3], y->fp_mant[3]);
 145                 FPU_ADDCS(r->fp_mant[2], x->fp_mant[2], y->fp_mant[2]);
 146                 FPU_ADDCS(r->fp_mant[1], x->fp_mant[1], y->fp_mant[1]);
 147                 FPU_ADDC(r0, x->fp_mant[0], y->fp_mant[0]);
 148                 if ((r->fp_mant[0] = r0) >= FP_2) {
 149                         (void) fpu_shr(r, 1);
 150                         r->fp_exp++;
 151                 }
 152         } else {
 153                 FPU_DECL_CARRY
 154
 155                 /*
 156                  * The signs differ, so things are rather more difficult.
 157                  * H&P would have us negate the negative operand and add;
 158                  * this is the same as subtracting the negative operand.
 159                  * This is quite a headache.  Instead, we will subtract
 160                  * y from x, regardless of whether y itself is the negative
 161                  * operand.  When this is done one of three conditions will
 162                  * hold, depending on the magnitudes of x and y:
 163                  *   case i)   |x| > |y|.  The result is just x - y,
 164                  *      with x's sign, but it may need to be normalized.
 165                  *   case ii)  |x| = |y|.  The result is 0 (maybe -0)
 166                  *      so must be fixed up.
 167                  *   case iii) |x| < |y|.  We goofed; the result should
 168                  *      be (y - x), with the same sign as y.
 169                  * We could compare |x| and |y| here and avoid case iii,
 170                  * but that would take just as much work as the subtract.
 171                  * We can tell case iii has occurred by an overflow.
 172                  *
 173                  * N.B.: since x->fp_exp >= y->fp_exp, x->fp_sticky = 0.
 174                  */
 175                 /* r->fp_mant = x->fp_mant - y->fp_mant */
 176                 FPU_SET_CARRY(y->fp_sticky);
 177                 FPU_SUBCS(r3, x->fp_mant[3], y->fp_mant[3]);
 178                 FPU_SUBCS(r2, x->fp_mant[2], y->fp_mant[2]);
 179                 FPU_SUBCS(r1, x->fp_mant[1], y->fp_mant[1]);
 180                 FPU_SUBC(r0, x->fp_mant[0], y->fp_mant[0]);
 181                 if (r0 < FP_2) {
 182                         /* cases i and ii */
 183                         if ((r0 | r1 | r2 | r3) == 0) {
 184                                 /* case ii */
 185                                 r->fp_class = FPC_ZERO;
 186                                 r->fp_sign = rd == FSR_RD_RM;
 187                                 return (r);
 188                         }
 189                 } else {
 190                         /*
 191                          * Oops, case iii.  This can only occur when the
 192                          * exponents were equal, in which case neither
 193                          * x nor y have sticky bits set.  Flip the sign
 194                          * (to y's sign) and negate the result to get y - x.
 195                          */
 196 #ifdef DIAGNOSTIC
 197                         if (x->fp_exp != y->fp_exp || r->fp_sticky)
 198                                 panic("fpu_add");
 199 #endif
 200                         r->fp_sign = y->fp_sign;
 201                         FPU_SUBS(r3, 0, r3);
 202                         FPU_SUBCS(r2, 0, r2);
 203                         FPU_SUBCS(r1, 0, r1);
 204                         FPU_SUBC(r0, 0, r0);
 205                 }
 206                 r->fp_mant[3] = r3;
 207                 r->fp_mant[2] = r2;
 208                 r->fp_mant[1] = r1;
 209                 r->fp_mant[0] = r0;
 210                 if (r0 < FP_1)
 211                         fpu_norm(r);
 212         }
 213         return (r);
 214 }