sys/arch/sun3/dev/si_vme.c

   1 /*      $NetBSD: si_vme.c,v 1.29 2008/04/28 20:23:38 martin Exp $       */
   2
   3 /*-
   4  * Copyright (c) 1996 The NetBSD Foundation, Inc.
   5  * All rights reserved.
   6  *
   7  * This code is derived from software contributed to The NetBSD Foundation
   8  * by Adam Glass, David Jones, and Gordon W. Ross.
   9  *
  10  * Redistribution and use in source and binary forms, with or without
  11  * modification, are permitted provided that the following conditions
  12  * are met:
  13  * 1. Redistributions of source code must retain the above copyright
  14  *    notice, this list of conditions and the following disclaimer.
  15  * 2. Redistributions in binary form must reproduce the above copyright
  16  *    notice, this list of conditions and the following disclaimer in the
  17  *    documentation and/or other materials provided with the distribution.
  18  *
  19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
  20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
  23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  29  * POSSIBILITY OF SUCH DAMAGE.
  30  */
  31
  32 /*
  33  * This file contains only the machine-dependent parts of the
  34  * Sun3 SCSI driver.  (Autoconfig stuff and DMA functions.)
  35  * The machine-independent parts are in ncr5380sbc.c
  36  *
  37  * Supported hardware includes:
  38  * Sun SCSI-3 on OBIO (Sun3/50,Sun3/60)
  39  * Sun SCSI-3 on VME (Sun3/160,Sun3/260)
  40  *
  41  * Could be made to support the Sun3/E if someone wanted to.
  42  *
  43  * Note:  Both supported variants of the Sun SCSI-3 adapter have
  44  * some really unusual "features" for this driver to deal with,
  45  * generally related to the DMA engine.  The OBIO variant will
  46  * ignore any attempt to write the FIFO count register while the
  47  * SCSI bus is in DATA_IN or DATA_OUT phase.  This is dealt with
  48  * by setting the FIFO count early in COMMAND or MSG_IN phase.
  49  *
  50  * The VME variant has a bit to enable or disable the DMA engine,
  51  * but that bit also gates the interrupt line from the NCR5380!
  52  * Therefore, in order to get any interrupt from the 5380, (i.e.
  53  * for reselect) one must clear the DMA engine transfer count and
  54  * then enable DMA.  This has the further complication that you
  55  * CAN NOT touch the NCR5380 while the DMA enable bit is set, so
  56  * we have to turn DMA back off before we even look at the 5380.
  57  *
  58  * What wonderfully whacky hardware this is!
  59  *
  60  * Credits, history:
  61  *
  62  * David Jones wrote the initial version of this module, which
  63  * included support for the VME adapter only. (no reselection).
  64  *
  65  * Gordon Ross added support for the OBIO adapter, and re-worked
  66  * both the VME and OBIO code to support disconnect/reselect.
  67  * (Required figuring out the hardware "features" noted above.)
  68  *
  69  * The autoconfiguration boilerplate came from Adam Glass.
  70  */
  71
  72 /*****************************************************************
  73  * VME functions for DMA
  74  ****************************************************************/
  75
  76 #include <sys/cdefs.h>
  77 __KERNEL_RCSID(0, "$NetBSD: si_vme.c,v 1.29 2008/04/28 20:23:38 martin Exp $");
  78
  79 #include <sys/param.h>
  80 #include <sys/systm.h>
  81 #include <sys/errno.h>
  82 #include <sys/kernel.h>
  83 #include <sys/malloc.h>
  84 #include <sys/device.h>
  85 #include <sys/buf.h>
  86 #include <sys/proc.h>
  87
  88 #include <dev/scsipi/scsi_all.h>
  89 #include <dev/scsipi/scsipi_all.h>
  90 #include <dev/scsipi/scsipi_debug.h>
  91 #include <dev/scsipi/scsiconf.h>
  92
  93 #include <machine/autoconf.h>
  94 #include <machine/dvma.h>
  95
  96 /* #define DEBUG XXX */
  97
  98 #include <dev/ic/ncr5380reg.h>
  99 #include <dev/ic/ncr5380var.h>
 100
 101 #include "sireg.h"
 102 #include "sivar.h"
 103
 104 void si_vme_dma_setup(struct ncr5380_softc *);
 105 void si_vme_dma_start(struct ncr5380_softc *);
 106 void si_vme_dma_eop(struct ncr5380_softc *);
 107 void si_vme_dma_stop(struct ncr5380_softc *);
 108
 109 void si_vme_intr_on (struct ncr5380_softc *);
 110 void si_vme_intr_off(struct ncr5380_softc *);
 111
 112 static void si_vme_reset(struct ncr5380_softc *);
 113
 114 /*
 115  * New-style autoconfig attachment
 116  */
 117
 118 static int      si_vme_match(device_t, cfdata_t, void *);
 119 static void     si_vme_attach(device_t, device_t, void *);
 120
 121 CFATTACH_DECL_NEW(si_vme, sizeof(struct si_softc),
 122     si_vme_match, si_vme_attach, NULL, NULL);
 123
 124 /*
 125  * Options for disconnect/reselect, DMA, and interrupts.
 126  * By default, allow disconnect/reselect on targets 4-6.
 127  * Those are normally tapes that really need it enabled.
 128  */
 129 int si_vme_options = 0x0f;
 130
 131
 132 static int
 133 si_vme_match(device_t parent, cfdata_t cf, void *aux)
 134 {
 135         struct confargs *ca = aux;
 136         int probe_addr;
 137
 138         /* No default VME address. */
 139         if (ca->ca_paddr == -1)
 140                 return 0;
 141
 142         /* Make sure something is there... */
 143         probe_addr = ca->ca_paddr + 1;
 144         if (bus_peek(ca->ca_bustype, probe_addr, 1) == -1)
 145                 return 0;
 146
 147         /*
 148          * If this is a VME SCSI board, we have to determine whether
 149          * it is an "sc" (Sun2) or "si" (Sun3) SCSI board.  This can
 150          * be determined using the fact that the "sc" board occupies
 151          * 4K bytes in VME space but the "si" board occupies 2K bytes.
 152          */
 153         /* Note: the "si" board should NOT respond here. */
 154         probe_addr = ca->ca_paddr + 0x801;
 155         if (bus_peek(ca->ca_bustype, probe_addr, 1) != -1) {
 156                 /* Something responded at 2K+1.  Maybe an "sc" board? */
 157 #ifdef  DEBUG
 158                 printf("%s: May be an `sc' board at pa=0x%lx\n",
 159                     __func__, ca->ca_paddr);
 160 #endif
 161                 return 0;
 162         }
 163
 164         /* Default interrupt priority. */
 165         if (ca->ca_intpri == -1)
 166                 ca->ca_intpri = 2;
 167
 168         return 1;
 169 }
 170
 171 static void
 172 si_vme_attach(device_t parent, device_t self, void *args)
 173 {
 174         struct si_softc *sc = device_private(self);
 175         struct ncr5380_softc *ncr_sc = &sc->ncr_sc;
 176         struct cfdata *cf = device_cfdata(self);
 177         struct confargs *ca = args;
 178
 179         ncr_sc->sc_dev = self;
 180         sc->sc_bst = ca->ca_bustag;
 181         sc->sc_dmat = ca->ca_dmatag;
 182
 183         if (bus_space_map(sc->sc_bst, ca->ca_paddr, sizeof(struct si_regs), 0,
 184             &sc->sc_bsh) != 0) {
 185                 aprint_error(": can't map register\n");
 186                 return;
 187         }
 188         sc->sc_regs = bus_space_vaddr(sc->sc_bst, sc->sc_bsh);
 189
 190         if (bus_dmamap_create(sc->sc_dmat, MAXPHYS, 1, MAXPHYS, 0,
 191             BUS_DMA_NOWAIT, &sc->sc_dmap) != 0) {
 192                 aprint_error(": can't create DMA map\n");
 193                 return;
 194         }
 195
 196         /* Get options from config flags if specified. */
 197         if (cf->cf_flags)
 198                 sc->sc_options = cf->cf_flags;
 199         else
 200                 sc->sc_options = si_vme_options;
 201
 202         aprint_normal(": options=0x%x\n", sc->sc_options);
 203
 204         sc->sc_adapter_type = ca->ca_bustype;
 205         sc->sc_adapter_iv_am = VME_SUPV_DATA_24 | (ca->ca_intvec & 0xFF);
 206
 207         /*
 208          * MD function pointers used by the MI code.
 209          */
 210         ncr_sc->sc_pio_out = ncr5380_pio_out;
 211         ncr_sc->sc_pio_in =  ncr5380_pio_in;
 212         ncr_sc->sc_dma_alloc = si_dma_alloc;
 213         ncr_sc->sc_dma_free  = si_dma_free;
 214         ncr_sc->sc_dma_setup = si_vme_dma_setup;
 215         ncr_sc->sc_dma_start = si_vme_dma_start;
 216         ncr_sc->sc_dma_poll  = si_dma_poll;
 217         ncr_sc->sc_dma_eop   = si_vme_dma_eop;
 218         ncr_sc->sc_dma_stop  = si_vme_dma_stop;
 219         ncr_sc->sc_intr_on   = si_vme_intr_on;
 220         ncr_sc->sc_intr_off  = si_vme_intr_off;
 221
 222         /* Attach interrupt handler. */
 223         isr_add_vectored(si_intr, (void *)sc, ca->ca_intpri, ca->ca_intvec);
 224
 225         /* Reset the hardware. */
 226         si_vme_reset(ncr_sc);
 227
 228         /* Do the common attach stuff. */
 229         si_attach(sc);
 230 }
 231
 232 static void
 233 si_vme_reset(struct ncr5380_softc *ncr_sc)
 234 {
 235         struct si_softc *sc = (struct si_softc *)ncr_sc;
 236         volatile struct si_regs *si = sc->sc_regs;
 237
 238 #ifdef  DEBUG
 239         if (si_debug) {
 240                 printf("%s\n", __func__);
 241         }
 242 #endif
 243
 244         /*
 245          * The SCSI3 controller has an 8K FIFO to buffer data between the
 246          * 5380 and the DMA.  Make sure it starts out empty.
 247          *
 248          * The reset bits in the CSR are active low.
 249          */
 250         si->si_csr = 0;
 251         delay(10);
 252         si->si_csr = SI_CSR_FIFO_RES | SI_CSR_SCSI_RES | SI_CSR_INTR_EN;
 253         delay(10);
 254         si->fifo_count = 0;
 255
 256         /* Make sure the DMA engine is stopped. */
 257         si->dma_addrh = 0;
 258         si->dma_addrl = 0;
 259         si->dma_counth = 0;
 260         si->dma_countl = 0;
 261         si->si_iv_am = sc->sc_adapter_iv_am;
 262         si->fifo_cnt_hi = 0;
 263 }
 264
 265 /*
 266  * This is called when the bus is going idle,
 267  * so we want to enable the SBC interrupts.
 268  * That is controlled by the DMA enable!
 269  * Who would have guessed!
 270  * What a NASTY trick!
 271  */
 272 void
 273 si_vme_intr_on(struct ncr5380_softc *ncr_sc)
 274 {
 275         struct si_softc *sc = (struct si_softc *)ncr_sc;
 276         volatile struct si_regs *si = sc->sc_regs;
 277
 278         /* receive mode should be safer */
 279         si->si_csr &= ~SI_CSR_SEND;
 280
 281         /* Clear the count so nothing happens. */
 282         si->dma_counth = 0;
 283         si->dma_countl = 0;
 284
 285         /* Clear the start address too. (paranoid?) */
 286         si->dma_addrh = 0;
 287         si->dma_addrl = 0;
 288
 289         /* Finally, enable the DMA engine. */
 290         si->si_csr |= SI_CSR_DMA_EN;
 291 }
 292
 293 /*
 294  * This is called when the bus is idle and we are
 295  * about to start playing with the SBC chip.
 296  */
 297 void
 298 si_vme_intr_off(struct ncr5380_softc *ncr_sc)
 299 {
 300         struct si_softc *sc = (struct si_softc *)ncr_sc;
 301         volatile struct si_regs *si = sc->sc_regs;
 302
 303         si->si_csr &= ~SI_CSR_DMA_EN;
 304 }
 305
 306 /*
 307  * This function is called during the COMMAND or MSG_IN phase
 308  * that precedes a DATA_IN or DATA_OUT phase, in case we need
 309  * to setup the DMA engine before the bus enters a DATA phase.
 310  *
 311  * XXX: The VME adapter appears to suppress SBC interrupts
 312  * when the FIFO is not empty or the FIFO count is non-zero!
 313  *
 314  * On the VME version, setup the start addres, but clear the
 315  * count (to make sure it stays idle) and set that later.
 316  */
 317 void
 318 si_vme_dma_setup(struct ncr5380_softc *ncr_sc)
 319 {
 320         struct si_softc *sc = (struct si_softc *)ncr_sc;
 321         struct sci_req *sr = ncr_sc->sc_current;
 322         struct si_dma_handle *dh = sr->sr_dma_hand;
 323         volatile struct si_regs *si = sc->sc_regs;
 324         long data_pa;
 325         int xlen;
 326
 327         /*
 328          * Get the DVMA mapping for this segment.
 329          * XXX - Should separate allocation and mapin.
 330          */
 331         data_pa = dh->dh_dmaaddr;
 332         if (data_pa & 1)
 333                 panic("%s: bad pa=0x%lx", __func__, data_pa);
 334         xlen = dh->dh_dmalen;
 335         xlen &= ~1;                             /* XXX: necessary? */
 336         sc->sc_reqlen = xlen;   /* XXX: or less? */
 337
 338 #ifdef  DEBUG
 339         if (si_debug & 2) {
 340                 printf("%s: dh=%p, pa=0x%lx, xlen=0x%x\n",
 341                     __func__, dh, data_pa, xlen);
 342         }
 343 #endif
 344
 345         /* Set direction (send/recv) */
 346         if (dh->dh_flags & SIDH_OUT) {
 347                 si->si_csr |= SI_CSR_SEND;
 348         } else {
 349                 si->si_csr &= ~SI_CSR_SEND;
 350         }
 351
 352         /* Reset the FIFO. */
 353         si->si_csr &= ~SI_CSR_FIFO_RES;         /* active low */
 354         si->si_csr |= SI_CSR_FIFO_RES;
 355
 356         if (data_pa & 2) {
 357                 si->si_csr |= SI_CSR_BPCON;
 358         } else {
 359                 si->si_csr &= ~SI_CSR_BPCON;
 360         }
 361
 362         /* Load the start address. */
 363         si->dma_addrh = (uint16_t)(data_pa >> 16);
 364         si->dma_addrl = (uint16_t)(data_pa & 0xFFFF);
 365
 366         /*
 367          * Keep the count zero or it may start early!
 368          */
 369         si->dma_counth = 0;
 370         si->dma_countl = 0;
 371
 372 #if 0
 373         /* Clear FIFO counter. (also hits dma_count) */
 374         si->fifo_cnt_hi = 0;
 375         si->fifo_count = 0;
 376 #endif
 377 }
 378
 379
 380 void
 381 si_vme_dma_start(struct ncr5380_softc *ncr_sc)
 382 {
 383         struct si_softc *sc = (struct si_softc *)ncr_sc;
 384         struct sci_req *sr = ncr_sc->sc_current;
 385         struct si_dma_handle *dh = sr->sr_dma_hand;
 386         volatile struct si_regs *si = sc->sc_regs;
 387         int s, xlen;
 388
 389         xlen = sc->sc_reqlen;
 390
 391         /* This MAY be time critical (not sure). */
 392         s = splhigh();
 393
 394         si->dma_counth = (uint16_t)(xlen >> 16);
 395         si->dma_countl = (uint16_t)(xlen & 0xFFFF);
 396
 397         /* Set it anyway, even though dma_count hits it. */
 398         si->fifo_cnt_hi = (uint16_t)(xlen >> 16);
 399         si->fifo_count  = (uint16_t)(xlen & 0xFFFF);
 400
 401         /*
 402          * Acknowledge the phase change.  (After DMA setup!)
 403          * Put the SBIC into DMA mode, and start the transfer.
 404          */
 405         if (dh->dh_flags & SIDH_OUT) {
 406                 *ncr_sc->sci_tcmd = PHASE_DATA_OUT;
 407                 SCI_CLR_INTR(ncr_sc);
 408                 *ncr_sc->sci_icmd = SCI_ICMD_DATA;
 409                 *ncr_sc->sci_mode |= (SCI_MODE_DMA | SCI_MODE_DMA_IE);
 410                 *ncr_sc->sci_dma_send = 0;      /* start it */
 411         } else {
 412                 *ncr_sc->sci_tcmd = PHASE_DATA_IN;
 413                 SCI_CLR_INTR(ncr_sc);
 414                 *ncr_sc->sci_icmd = 0;
 415                 *ncr_sc->sci_mode |= (SCI_MODE_DMA | SCI_MODE_DMA_IE);
 416                 *ncr_sc->sci_irecv = 0; /* start it */
 417         }
 418
 419         /* Let'er rip! */
 420         si->si_csr |= SI_CSR_DMA_EN;
 421
 422         splx(s);
 423         ncr_sc->sc_state |= NCR_DOINGDMA;
 424
 425 #ifdef  DEBUG
 426         if (si_debug & 2) {
 427                 printf("%s: started, flags=0x%x\n",
 428                     __func__, ncr_sc->sc_state);
 429         }
 430 #endif
 431 }
 432
 433
 434 void
 435 si_vme_dma_eop(struct ncr5380_softc *ncr_sc)
 436 {
 437
 438         /* Not needed - DMA was stopped prior to examining sci_csr */
 439 }
 440
 441
 442 void
 443 si_vme_dma_stop(struct ncr5380_softc *ncr_sc)
 444 {
 445         struct si_softc *sc = (struct si_softc *)ncr_sc;
 446         struct sci_req *sr = ncr_sc->sc_current;
 447         struct si_dma_handle *dh = sr->sr_dma_hand;
 448         volatile struct si_regs *si = sc->sc_regs;
 449         int resid, ntrans;
 450
 451         if ((ncr_sc->sc_state & NCR_DOINGDMA) == 0) {
 452 #ifdef  DEBUG
 453                 printf("%s: DMA not running\n", __func__);
 454 #endif
 455                 return;
 456         }
 457         ncr_sc->sc_state &= ~NCR_DOINGDMA;
 458
 459         /* First, halt the DMA engine. */
 460         si->si_csr &= ~SI_CSR_DMA_EN;   /* VME only */
 461
 462         /* Set an impossible phase to prevent data movement? */
 463         *ncr_sc->sci_tcmd = PHASE_INVALID;
 464
 465         if (si->si_csr & (SI_CSR_DMA_CONFLICT | SI_CSR_DMA_BUS_ERR)) {
 466                 printf("si: DMA error, csr=0x%x, reset\n", si->si_csr);
 467                 sr->sr_xs->error = XS_DRIVER_STUFFUP;
 468                 ncr_sc->sc_state |= NCR_ABORTING;
 469                 si_vme_reset(ncr_sc);
 470                 goto out;
 471         }
 472
 473         /* Note that timeout may have set the error flag. */
 474         if (ncr_sc->sc_state & NCR_ABORTING)
 475                 goto out;
 476
 477         /* XXX: Wait for DMA to actually finish? */
 478
 479         /*
 480          * Now try to figure out how much actually transferred
 481          *
 482          * The fifo_count does not reflect how many bytes were
 483          * actually transferred for VME.
 484          *
 485          * SCSI-3 VME interface is a little funny on writes:
 486          * if we have a disconnect, the DMA has overshot by
 487          * one byte and the resid needs to be incremented.
 488          * Only happens for partial transfers.
 489          * (Thanks to Matt Jacob)
 490          */
 491
 492         resid = si->fifo_count & 0xFFFF;
 493         if (dh->dh_flags & SIDH_OUT)
 494                 if ((resid > 0) && (resid < sc->sc_reqlen))
 495                         resid++;
 496         ntrans = sc->sc_reqlen - resid;
 497
 498 #ifdef  DEBUG
 499         if (si_debug & 2) {
 500                 printf("%s: resid=0x%x ntrans=0x%x\n",
 501                     __func__, resid, ntrans);
 502         }
 503 #endif
 504
 505         if (ntrans < MIN_DMA_LEN) {
 506                 printf("si: fifo count: 0x%x\n", resid);
 507                 ncr_sc->sc_state |= NCR_ABORTING;
 508                 goto out;
 509         }
 510         if (ntrans > ncr_sc->sc_datalen)
 511                 panic("%s: excess transfer", __func__);
 512
 513         /* Adjust data pointer */
 514         ncr_sc->sc_dataptr += ntrans;
 515         ncr_sc->sc_datalen -= ntrans;
 516
 517         /*
 518          * After a read, we may need to clean-up
 519          * "Left-over bytes" (yuck!)
 520          */
 521         if (((dh->dh_flags & SIDH_OUT) == 0) &&
 522                 ((si->si_csr & SI_CSR_LOB) != 0)) {
 523                 uint8_t *cp = ncr_sc->sc_dataptr;
 524 #ifdef DEBUG
 525                 printf("si: Got Left-over bytes!\n");
 526 #endif
 527                 if (si->si_csr & SI_CSR_BPCON) {
 528                         /* have SI_CSR_BPCON */
 529                         cp[-1] = (si->si_bprl & 0xff00) >> 8;
 530                 } else {
 531                         switch (si->si_csr & SI_CSR_LOB) {
 532                         case SI_CSR_LOB_THREE:
 533                                 cp[-3] = (si->si_bprh & 0xff00) >> 8;
 534                                 cp[-2] = (si->si_bprh & 0x00ff);
 535                                 cp[-1] = (si->si_bprl & 0xff00) >> 8;
 536                                 break;
 537                         case SI_CSR_LOB_TWO:
 538                                 cp[-2] = (si->si_bprh & 0xff00) >> 8;
 539                                 cp[-1] = (si->si_bprh & 0x00ff);
 540                                 break;
 541                         case SI_CSR_LOB_ONE:
 542                                 cp[-1] = (si->si_bprh & 0xff00) >> 8;
 543                                 break;
 544                         }
 545                 }
 546         }
 547
 548 out:
 549         si->dma_addrh = 0;
 550         si->dma_addrl = 0;
 551
 552         si->dma_counth = 0;
 553         si->dma_countl = 0;
 554
 555         si->fifo_cnt_hi = 0;
 556         si->fifo_count  = 0;
 557
 558         /* Put SBIC back in PIO mode. */
 559         *ncr_sc->sci_mode &= ~(SCI_MODE_DMA | SCI_MODE_DMA_IE);
 560         *ncr_sc->sci_icmd = 0;
 561 }