sys/arch/x68k/dev/slhci_intio_var.h

   1 /*      $NetBSD: slhci_intio_var.h,v 1.1 2002/08/11 13:17:52 isaki Exp $        */
   2
   3 /*
   4  * Copyright (c) 2001 The NetBSD Foundation, Inc.
   5  * All rights reserved.
   6  *
   7  * This code is derived from software contributed to The NetBSD Foundation
   8  * by Tetsuya Isaki.
   9  *
  10  * Redistribution and use in source and binary forms, with or without
  11  * modification, are permitted provided that the following conditions
  12  * are met:
  13  * 1. Redistributions of source code must retain the above copyright
  14  *    notice, this list of conditions and the following disclaimer.
  15  * 2. Redistributions in binary form must reproduce the above copyright
  16  *    notice, this list of conditions and the following disclaimer in the
  17  *    documentation and/or other materials provided with the distribution.
  18  *
  19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
  20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
  23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  29  * POSSIBILITY OF SUCH DAMAGE.
  30  */
  31
  32 /*
  33  * USB part of Nereid Ethernet/USB/Memory board
  34  */
  35
  36 #define SLHCI_INTIO_ADDR1       (0xece380)
  37 #define SLHCI_INTIO_ADDR2       (0xeceb80)
  38 #define SLHCI_INTIO_INTR1       (0xfb)
  39 #define SLHCI_INTIO_INTR2       (0xfa)
  40
  41 #define NEREID_ADDR_OFFSET      (0xece3f0 - 0xece380)   /* Nereid control port */
  42 #define NEREID_CTRL             (0)
  43 #define NEREID_CTRL_RESET       (0x01)
  44 #define NEREID_CTRL_POWER       (0x02)
  45 #define NEREID_CTRL_INTR        (0x04)
  46 #define NEREID_CTRL_DIPSW       (0x08)
  47
  48 struct slhci_intio_softc {
  49         struct slhci_softc sc_sc;
  50
  51         bus_space_handle_t sc_nch;      /* Nereid control port handle */
  52 };