1 /* { dg-do run { target powerpc64-*-* } } */
2 /* { dg-require-effective-target lp64 } */
3 /* { dg-options "-O2" } */
8 /* Testcase to check for ABI compliance of parameter passing
10 Parameter passing of integral and floating point is tested. */
12 extern void abort (void);
16 unsigned long gprs
[8];
23 /* Testcase could break on future gcc's, if parameter regs
24 are changed before this asm. */
27 #define save_parms(lparms) \
28 asm volatile ("ld 11,gparms@got(2)\n\t" \
42 "stfd 6,104(11)\n\t" \
43 "stfd 7,112(11)\n\t" \
44 "stfd 8,120(11)\n\t" \
45 "stfd 9,128(11)\n\t" \
46 "stfd 10,136(11)\n\t" \
47 "stfd 11,144(11)\n\t" \
48 "stfd 12,152(11)\n\t" \
49 "stfd 13,160(11)\n\t":::"11", "memory"); \
52 #define save_parms(lparms) \
53 asm volatile ("ld r11,gparms@got(r2)\n\t" \
56 "std r5,16(r11)\n\t" \
57 "std r6,24(r11)\n\t" \
58 "std r7,32(r11)\n\t" \
59 "std r8,40(r11)\n\t" \
60 "std r9,48(r11)\n\t" \
61 "std r10,56(r11)\n\t" \
62 "stfd f1,64(r11)\n\t" \
63 "stfd f2,72(r11)\n\t" \
64 "stfd f3,80(r11)\n\t" \
65 "stfd f4,88(r11)\n\t" \
66 "stfd f5,96(r11)\n\t" \
67 "stfd f6,104(r11)\n\t" \
68 "stfd f7,112(r11)\n\t" \
69 "stfd f8,120(r11)\n\t" \
70 "stfd f9,128(r11)\n\t" \
71 "stfd f10,136(r11)\n\t" \
72 "stfd f11,144(r11)\n\t" \
73 "stfd f12,152(r11)\n\t" \
74 "stfd f13,160(r11)\n\t":::"r11", "memory"); \
78 /* Stackframe structure relevant for parameter passing. */
103 void __attribute__ ((noinline
)) fcld (char *s
, long l
, double d
)
108 if (s
!= (char *) lparms
.gprs
[0])
111 if (l
!= lparms
.gprs
[1])
114 if (d
!= lparms
.fprs
[0])
124 void __attribute__ ((noinline
))
125 fcldi (char *s
, long l
, double d
, signed int i
)
130 if (s
!= (char *) lparms
.gprs
[0])
133 if (l
!= lparms
.gprs
[1])
136 if (d
!= lparms
.fprs
[0])
139 if ((signed long) i
!= lparms
.gprs
[3])
149 void __attribute__ ((noinline
))
150 fcldu (char *s
, long l
, float d
, unsigned int i
)
155 if (s
!= (char *) lparms
.gprs
[0])
158 if (l
!= lparms
.gprs
[1])
161 if ((double) d
!= lparms
.fprs
[0])
164 if ((unsigned long) i
!= lparms
.gprs
[3])
174 void __attribute__ ((noinline
)) fceld (char *s
, ...)
185 if (s
!= (char *) lparms
.gprs
[0])
188 l
= va_arg (arg
, long);
189 d
= va_arg (arg
, double);
191 /* Go back one frame. */
192 sp
= __builtin_frame_address (0);
195 if (sp
->slot
[1].l
!= l
)
198 if (sp
->slot
[2].d
!= d
)
209 void __attribute__ ((noinline
)) fciiedl (char *s
, int i
, int j
, ...)
220 if (s
!= (char *) lparms
.gprs
[0])
223 if ((long) i
!= lparms
.gprs
[1])
226 if ((long) j
!= lparms
.gprs
[2])
229 d
= va_arg (arg
, double);
230 l
= va_arg (arg
, long);
232 sp
= __builtin_frame_address (0);
235 if (sp
->slot
[3].d
!= d
)
238 if (sp
->slot
[4].l
!= l
)
243 Parameter Register Offset in parameter save area
244 c r3 0-7 (not stored in parameter save area)
245 ff f1 8-15 (not stored)
246 d r5 16-23 (not stored)
247 ld f2 24-31 (not stored)
248 f r7 32-39 (not stored)
249 s r8,r9 40-55 (not stored)
250 gg f3 56-63 (not stored)
251 t (none) 64-79 (stored in parameter save area)
252 e (none) 80-87 (stored)
270 /* Example from ABI documentation with slight changes.
279 t : save area offset 64 - 79
280 e : save area offset 80 - 88
284 void __attribute__ ((noinline
))
285 fididisdsid (int c
, double ff
, int d
, double ld
, int f
,
286 sparm s
, double gg
, sparm t
, int e
, double hh
)
295 if ((long) c
!= lparms
.gprs
[0])
298 /* Parm 1: double. */
299 if (ff
!= lparms
.fprs
[0])
303 if ((long) d
!= lparms
.gprs
[2])
306 /* Parm 3: double. */
307 if (ld
!= lparms
.fprs
[1])
311 if ((long) f
!= lparms
.gprs
[4])
314 /* Parm 5: struct sparm. */
315 dx
.l
= lparms
.gprs
[5];
316 dy
.l
= lparms
.gprs
[6];
323 /* Parm 6: double. */
324 if (gg
!= lparms
.fprs
[2])
327 sp
= __builtin_frame_address (0);
330 /* Parm 7: struct sparm. */
331 dx
.l
= sp
->slot
[8].l
;
332 dy
.l
= sp
->slot
[9].l
;
339 if (e
!= sp
->slot
[10].l
)
342 /* Parm 9: double. */
344 if (hh
!= lparms
.fprs
[3])
354 fcldi (s
, 1, 1.0, -2);
355 fcldu (s
, 1, 1.0, 2);
357 fciiedl (s
, 1, 2, 1.0, 3);
358 fididisdsid (1, 1.0, 2, 2.0, -1, (sparm
)
360 3, 3.0}, 4.0, (sparm
)