1 .\" $NetBSD: ahc.4,v 1.32 2009/04/10 15:05:06 joerg Exp $
3 .\" Copyright (c) 1995, 1996, 1997, 1998, 2000
4 .\" Justin T. Gibbs. All rights reserved.
6 .\" Redistribution and use in source and binary forms, with or without
7 .\" modification, are permitted provided that the following conditions
9 .\" 1. Redistributions of source code must retain the above copyright
10 .\" notice, this list of conditions and the following disclaimer.
11 .\" 2. Redistributions in binary form must reproduce the above copyright
12 .\" notice, this list of conditions and the following disclaimer in the
13 .\" documentation and/or other materials provided with the distribution.
14 .\" 3. The name of the author may not be used to endorse or promote products
15 .\" derived from this software without specific prior written permission.
17 .\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 .\" IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 .\" OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 .\" IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 .\" INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 .\" NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 .\" DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 .\" THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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26 .\" THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 .\" $FreeBSD: src/share/man/man4/ahc.4,v 1.22 2000/02/14 16:40:58 gibbs Exp $
36 .Nd Adaptec VL/EISA/PCI/CardBus SCSI host adapter driver
38 .\" For one or more VL/EISA cards:
42 .Cd "ahc0 at isa? port ? irq ?"
45 .Cd "ahc* at eisa? slot ?"
47 .\" For one or more PCI cards:
51 .Cd "ahc* at pci? dev ? function ?"
54 .Cd "ahc* at cardbus? function ?"
56 To allow PCI adapters to use memory mapped I/O if enabled:
57 .Cd options AHC_ALLOW_MEMIO
59 Disable tagged queuing (avoids hangs on some hardware under load)
60 .Cd options AHC_NO_TAGS
62 Change the default SCSI id for cards without a SEEPROM (default 7):
63 .Cd options AHC_CARDBUS_DEFAULT_SCSI_ID=integer
65 .\" To configure one or more controllers to assume the target role:
66 .\" .Cd options AHC_TMODE_ENABLE \*[Lt]bitmask of units\*[Gt]
68 .\" For one or more SCSI buses:
69 .\" .Cd device scbus0 at ahc0
75 .\" This driver provides access to the
77 .\" bus(es) connected to Adaptec
91 .\" host adapter chips.
92 .\" These chips are found on many motherboards as well as the following
93 .\" Adaptec SCSI controller cards:
106 .\" .Tn 2940UW Dual ,
130 device driver supports
138 host adapter chips found on many motherboards as well as
143 Driver features include support for twin and wide buses,
144 fast, ultra or ultra2 synchronous transfers depending on controller type,
145 .\" tagged queuing, SCB paging, and target mode.
146 tagged queuing and SCB paging.
148 Memory mapped I/O can be enabled for PCI devices with the
149 .Dq Dv AHC_ALLOW_MEMIO
150 configuration option.
151 Memory mapped I/O is more efficient than the alternative, programmed I/O.
152 Most PCI BIOSes will map devices so that either technique for communicating
153 with the card is available.
155 usually when the PCI device is sitting behind a PCI-\*[Gt]PCI bridge,
156 the BIOS may fail to properly initialize the chip for memory mapped I/O.
157 The typical symptom of this problem is a system hang if memory mapped I/O
159 Most modern motherboards perform the initialization correctly and work fine
160 with this option enabled.
162 .\" Individual controllers may be configured to operate in the target role
164 .\" .Dq Dv AHC_TMODE_ENABLE
165 .\" configuration option.
166 .\" The value assigned to this option should be a bitmap
167 .\" of all units where target mode is desired.
168 .\" For example, a value of 0x25, would enable target mode on units 0, 2, and 5.
170 Per target configuration performed in the
172 menu, accessible at boot
178 configuration utility for
181 is honored by this driver.
182 This includes synchronous/asynchronous transfers,
183 maximum synchronous negotiation rate,
186 the host adapter's SCSI ID,
190 Twin Channel controllers,
191 the primary channel selection.
192 For systems that store non-volatile settings in a system specific manner
193 rather than a serial EEPROM directly connected to the aic7xxx controller,
196 must be enabled for the driver to access this information.
197 This restriction applies to all
199 and many motherboard configurations.
201 Note that I/O addresses are determined automatically by the probe routines,
202 but care should be taken when using a 284x
203 .Pq Tn VESA No local bus controller
207 The jumpers setting the I/O area for the 284x should match the
209 slot into which the card is inserted to prevent conflicts with other
213 Performance and feature sets vary throughout the aic7xxx product line.
214 The following table provides a comparison of the different chips supported
218 Note that wide and twin channel features, although always supported
219 by a particular chip, may be disabled in a particular motherboard
222 .Bl -column "aic7895c" "MIPS" "EISA/VL" "MaxSync" "MaxWidth" "SCBs" "2 3 4 5 6 7 8"
223 .It Sy Chip Ta Sy MIPS Ta Sy Bus Ta Sy MaxSync Ta Sy MaxWidth Ta Sy SCBs Ta Sy Features
224 .It aic7770 Ta 10 Ta EISA/VL Ta 10MHz Ta 16Bit Ta 4 Ta 1
225 .It aic7850 Ta 10 Ta PCI/32 Ta 10MHz Ta 8Bit Ta 3 Ta ""
226 .It aic7860 Ta 10 Ta PCI/32 Ta 20MHz Ta 8Bit Ta 3 Ta ""
227 .It aic7870 Ta 10 Ta PCI/32 Ta 10MHz Ta 16Bit Ta 16 Ta ""
228 .It aic7880 Ta 10 Ta PCI/32 Ta 20MHz Ta 16Bit Ta 16 Ta ""
229 .It aic7890 Ta 20 Ta PCI/32 Ta 40MHz Ta 16Bit Ta 16 Ta 3 4 5 6 7 8
230 .It aic7891 Ta 20 Ta PCI/64 Ta 40MHz Ta 16Bit Ta 16 Ta 3 4 5 6 7 8
231 .It aic7892 Ta 20 Ta PCI/64 Ta 80MHz Ta 16Bit Ta 16 Ta 3 4 5 6 7 8
232 .It aic7895 Ta 15 Ta PCI/32 Ta 20MHz Ta 16Bit Ta 16 Ta 2 3 4 5
233 .It aic7895C Ta 15 Ta PCI/32 Ta 20MHz Ta 16Bit Ta 16 Ta 2 3 4 5 8
234 .It aic7896 Ta 20 Ta PCI/32 Ta 40MHz Ta 16Bit Ta 16 Ta 2 3 4 5 6 7 8
235 .It aic7897 Ta 20 Ta PCI/64 Ta 40MHz Ta 16Bit Ta 16 Ta 2 3 4 5 6 7 8
236 .It aic7899 Ta 20 Ta PCI/64 Ta 80MHz Ta 16Bit Ta 16 Ta 2 3 4 5 6 7 8
241 Multiplexed Twin Channel Device - One controller servicing two buses.
243 Multi-function Twin Channel Device - Two controllers on one chip.
245 Command Channel Secondary DMA Engine - Allows scatter gather list and
248 64 Byte SCB Support - SCSI CDB is embedded in the SCB to eliminate an extra DMA.
250 Block Move Instruction Support - Doubles the speed of certain sequencer
254 style Scatter Gather Engine - Improves S/G prefetch performance.
256 Queuing Registers - Allows queuing of new transactions without pausing the
259 Multiple Target IDs - Allows the controller to respond to selection as a
260 target on multiple SCSI IDs.
267 .Bl -item -offset indent
269 .Tn Adaptec AHA-2742W
270 EISA Fast Wide SCSI adapter
272 .Tn Adaptec AHA-274xAT
273 EISA dual channel Fast SCSI adapter
279 PCI Fast SCSI adapter (no SCSI BIOS)
282 PCI Fast SCSI adapter (no SCSI BIOS)
284 .Tn Adaptec AHA-2920C
285 PCI Fast SCSI adapter
286 .Bl -item -offset indent
289 Adaptec AHA-2920/A which use the Future Domain's chips are not supported
293 .Tn Adaptec AHA-2930C
294 PCI Ultra SCSI adapter
296 .Tn Adaptec AHA-2930U2
297 PCI Ultra2 Wide LVD SCSI adapter
300 PCI Fast SCSI adapter
302 .Tn Adaptec AHA-2940U
303 PCI Ultra SCSI adapter
305 .Tn Adaptec AHA-2940AU
306 PCI Ultra SCSI adapter
308 .Tn Adaptec AHA-2940UW
309 PCI Ultra Wide SCSI adapter
311 .Tn Adaptec AHA-2940UW Dual
312 PCI dual channel Ultra Wide SCSI adapter
314 .Tn Adaptec AHA-2940UW Pro
315 PCI Ultra Wide SCSI adapter
317 .Tn Adaptec AHA-2940U2W
318 PCI Ultra2 Wide LVD SCSI adapter
320 .Tn Adaptec AHA-2940U2B
321 PCI Ultra2 Wide LVD SCSI adapter
323 .Tn Adaptec AHA-2944W
324 PCI Fast Wide Differential SCSI adapter
326 .Tn Adaptec AHA-2944UW
327 PCI Ultra Wide Differential SCSI adapter
329 .Tn Adaptec AHA-2950U2W
331 .Tn Adaptec AHA-2950U2B
332 64bit PCI Ultra2 Wide LVD SCSI adapter
334 .Tn Adaptec AHA-19160B
335 PCI Ultra160 Wide LVD SCSI adapter
337 .Tn Adaptec ASC-29160
338 PCI Ultra160 Wide LVD SCSI adapter
340 .Tn Adaptec AHA-29160N
341 PCI Ultra160 Wide LVD SCSI adapter
343 .Tn Adaptec AHA-29160B
344 64bit PCI Ultra160 Wide LVD SCSI adapter
347 PCI dual channel Fast SCSI adapter
349 .Tn Adaptec AHA-3940U
350 PCI dual channel Ultra SCSI adapter
352 .Tn Adaptec AHA-3940AU
353 PCI dual channel Ultra SCSI adapter
355 .Tn Adaptec AHA-3940UW
356 PCI dual channel Ultra Wide SCSI adapter
358 .Tn Adaptec AHA-3940AUW
359 PCI dual channel Ultra Wide SCSI adapter
361 .Tn Adaptec AHA-3940U2W
362 PCI dual channel Ultra2 Wide LVD SCSI adapter
364 .Tn Adaptec AHA-3950U2
365 64bit PCI dual channel Ultra2 Wide LVD SCSI adapter
368 64bit PCI dual channel Ultra160 Wide LVD SCSI adapter
371 PCI dual channel Fast SCSI RAID adapter
373 .Tn Adaptec AHA-39160
374 64bit PCI dual channel Ultra160 Wide LVD SCSI adapter
376 .Tn Adaptec AHA-4944UW
377 PCI quad channel PCI Ultra Wide Differential SCSI adapter
379 Other SCSI controllers based on the
397 .Sh SCSI CONTROL BLOCKS (SCBs)
398 Every transaction sent to a device on the SCSI bus is assigned a
399 .Sq SCSI Control Block
401 The SCB contains all of the information required by the controller
402 to process a transaction.
403 The chip feature table lists the number of SCBs that can be stored
405 All chips with model numbers greater than or equal to 7870 allow
406 for the on chip SCB space to be augmented with external SRAM up to
407 a maximum of 255 SCBs.
408 Very few Adaptec controller configurations have external SRAM.
410 If external SRAM is not available, SCBs are a limited resource.
411 Using the SCBs in a straight forward manner would only allow the driver to
412 handle as many concurrent transactions as there are physical SCBs.
413 To fully use the SCSI bus and the devices on it,
414 requires much more concurrency.
415 The solution to this problem is
417 a concept similar to memory paging.
418 SCB paging takes advantage of the fact that devices usually disconnect
419 from the SCSI bus for long periods of time without talking to the
421 The SCBs for disconnected transactions are only of use to the
422 controller when the transfer is resumed.
423 When the host queues another transaction for the controller to
424 execute, the controller firmware will use a free SCB if one is
426 Otherwise, the state of the most recently disconnected (and therefor
427 most likely to stay disconnected) SCB is saved, via DMA, to host
428 memory, and the local SCB reused to start the new transaction.
429 This allows the controller to queue up to
430 255 transactions regardless of the amount of SCB space.
431 Since the local SCB space serves as a cache for disconnected
432 transactions, the more SCB space available, the less host bus
433 traffic consumed saving and restoring SCB data.
456 sequencer-code assembler,
457 and the firmware running on the aic7xxx chips was written by
458 .An Justin T. Gibbs .
460 porting is done by Stefan Grefen, Charles M. Hannum,
461 Michael Graff, Jason R. Thorpe, Pete Bentley,
462 Frank van der Linden and Noriyuki Soda.
466 drives (at least the Empire 2100 and 1080s) will not run on an
468 Rev B in synchronous mode at 10MHz.
469 Controllers with this problem have a
470 42 MHz clock crystal on them and run slightly above 10MHz.
471 This confuses the drive and hangs the bus.
472 Setting a maximum synchronous negotiation rate of 8MHz in the
474 utility will allow normal operation.
476 .\" Although the Ultra2 and Ultra160 products have sufficient instruction
477 .\" ram space to support both the initiator and target roles concurrently,
478 .\" this configuration is disabled in favor of allowing the target role
479 .\" to respond on multiple target ids.
480 .\" A method for configuring dual
481 .\" role mode should be provided.
483 .\" Tagged Queuing is not supported in target mode.
485 .\" Reselection in target mode fails to function correctly on all high
486 .\" voltage differential boards as shipped by Adaptec.
488 .\" how to modify HVD board to work correctly in target mode is available
490 Target mode is not supported on
492 version of this driver.