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[netbsd-mini2440.git] / sys / arch / acorn26 / ioc / ssn.c
blobc43e5c288d8847ca33fbf74d19db8d528fa562cc
1 /* $NetBSD: ssn.c,v 1.5.6.3 2004/09/21 13:11:20 skrll Exp $ */
3 /*-
4 * Copyright (c) 2002 Ben Harris
5 * All rights reserved.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. The name of the author may not be used to endorse or promote products
16 * derived from this software without specific prior written permission.
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30 #include <sys/cdefs.h>
31 __KERNEL_RCSID(0, "$NetBSD: ssn.c,v 1.5.6.3 2004/09/21 13:11:20 skrll Exp $");
33 #include <sys/param.h>
34 #include <sys/device.h>
35 #include <sys/systm.h>
37 #include <machine/bus.h>
39 #include <acorn26/iobus/iocreg.h>
40 #include <acorn26/iobus/iocvar.h>
42 #include <dev/ic/ds.h>
44 struct ssn_softc {
45 struct device sc_dev;
46 struct ds_handle sc_dsh;
47 struct device *sc_ioc;
48 int sc_timebase;
51 static int ssn_match(struct device *, struct cfdata *, void *);
52 static void ssn_attach(struct device *, struct device *, void *);
54 CFATTACH_DECL(ssn, sizeof(struct ssn_softc),
55 ssn_match, ssn_attach, NULL, NULL);
57 static int ds_ioc_read_bit(void *);
58 static void ds_ioc_write_bit(void *, int);
59 static void ds_ioc_reset(void *);
61 static int ds_crc(const u_int8_t *data, size_t len);
63 static int
64 ssn_match(struct device *parent, struct cfdata *cf, void *aux)
67 return (1);
70 static void
71 ssn_attach(struct device *parent, struct device *self, void *aux)
73 struct ssn_softc *sc = (void *)self;
74 int i;
75 u_int8_t rombuf[8];
77 sc->sc_ioc = parent;
78 sc->sc_dsh.ds_read_bit = ds_ioc_read_bit;
79 sc->sc_dsh.ds_write_bit = ds_ioc_write_bit;
80 sc->sc_dsh.ds_reset = ds_ioc_reset;
81 sc->sc_dsh.ds_hw_handle = sc;
83 sc->sc_dsh.ds_reset(sc->sc_dsh.ds_hw_handle);
85 ds_write_byte(&sc->sc_dsh, DS_ROM_READ);
86 for (i=0; i<8; ++i)
87 rombuf[i] = ds_read_byte(&sc->sc_dsh);
89 printf(": ROM %02x %02x%02x%02x%02x%02x%02x %02x CRC %02x\n",
90 rombuf[7], rombuf[6], rombuf[5], rombuf[4],
91 rombuf[3], rombuf[2], rombuf[1], rombuf[0], ds_crc(rombuf, 8));
95 static int
96 ds_ioc_read_bit(void *cookie)
98 struct ssn_softc *sc = cookie;
99 int result;
102 * Read is 1--15us low, >60us high.
103 * Sample 15us after falling edge.
105 ioc_ctl_write(sc->sc_ioc, 0, IOC_CTL_SSN);
106 ioc_ctl_write(sc->sc_ioc, IOC_CTL_SSN, IOC_CTL_SSN);
107 result = (ioc_ctl_read(sc->sc_ioc) & IOC_CTL_SSN) != 0;
108 DELAY(60);
109 return result;
112 static void
113 ds_ioc_write_bit(void *cookie, int bit)
115 struct ssn_softc *sc = cookie;
117 if (!bit) {
118 /* Write 0 is 60--120us low, >1us high. */
119 ioc_ctl_write(sc->sc_ioc, 0, IOC_CTL_SSN);
120 DELAY(60);
121 ioc_ctl_write(sc->sc_ioc, IOC_CTL_SSN, IOC_CTL_SSN);
122 DELAY(1);
123 } else {
124 /* Write 1 is 1--15us low, >60us high. */
125 ioc_ctl_write(sc->sc_ioc, 0, IOC_CTL_SSN);
126 ioc_ctl_write(sc->sc_ioc, IOC_CTL_SSN, IOC_CTL_SSN);
127 DELAY(60);
131 static void
132 ds_ioc_reset(void *cookie)
134 struct ssn_softc *sc = cookie;
135 int t_pdh, t_pdl;
137 /* Reset pulse is >480us low, then >480us high. */
138 ioc_ctl_write(sc->sc_ioc, 0, IOC_CTL_SSN);
139 DELAY(480);
140 ioc_ctl_write(sc->sc_ioc, IOC_CTL_SSN, IOC_CTL_SSN);
141 DELAY(60);
142 if ((ioc_ctl_read(sc->sc_ioc) & IOC_CTL_SSN) != 0) {
143 printf(": No presence pulse\n");
144 return;
146 DELAY(420);
147 /* Reset again, and time it this time. */
148 ioc_ctl_write(sc->sc_ioc, 0, IOC_CTL_SSN);
149 DELAY(480);
150 ioc_ctl_write(sc->sc_ioc, IOC_CTL_SSN, IOC_CTL_SSN);
151 t_pdh = 0;
152 while ((ioc_ctl_read(sc->sc_ioc) & IOC_CTL_SSN) != 0)
153 t_pdh++;
154 t_pdl = 0;
155 while ((ioc_ctl_read(sc->sc_ioc) & IOC_CTL_SSN) == 0)
156 t_pdl++;
157 DELAY(480);
158 printf(": t_PDH = %d, t_PDL = %d", t_pdh, t_pdl);
159 sc->sc_timebase = (t_pdh + t_pdl) / 5 + 1;
162 #define DS_CRC_POLY 0x8c
164 static int
165 ds_crc(const u_int8_t *buf, size_t len)
167 u_int8_t c, crc, carry;
168 size_t i, j;
170 crc = 0;
172 for (i = 0; i < len; i++) {
173 c = buf[i];
174 for (j = 0; j < 8; j++) {
175 carry = (crc ^ c) & 0x01;
176 crc >>= 1;
177 c >>= 1;
178 if (carry)
179 crc ^= DS_CRC_POLY;
182 return (crc);