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[netbsd-mini2440.git] / sys / arch / algor / include / bus.h
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1 /* $NetBSD: bus.h,v 1.13 2007/03/04 05:59:08 christos Exp $ */
3 /*-
4 * Copyright (c) 1997, 1998, 2000, 2001 The NetBSD Foundation, Inc.
5 * All rights reserved.
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 * NASA Ames Research Center.
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 * POSSIBILITY OF SUCH DAMAGE.
34 * Copyright (c) 1996 Carnegie-Mellon University.
35 * All rights reserved.
37 * Author: Chris G. Demetriou
39 * Permission to use, copy, modify and distribute this software and
40 * its documentation is hereby granted, provided that both the copyright
41 * notice and this permission notice appear in all copies of the
42 * software, derivative works or modified versions, and any portions
43 * thereof, and that both notices appear in supporting documentation.
45 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
46 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
47 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
49 * Carnegie Mellon requests users of this software to return to
51 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
52 * School of Computer Science
53 * Carnegie Mellon University
54 * Pittsburgh PA 15213-3890
56 * any improvements or extensions that they make and grant Carnegie the
57 * rights to redistribute these changes.
60 #ifndef _ALGOR_BUS_H_
61 #define _ALGOR_BUS_H_
63 #include <sys/types.h>
65 #ifdef _KERNEL
67 * Turn on BUS_SPACE_DEBUG if the global DEBUG option is enabled.
69 #if defined(DEBUG) && !defined(BUS_SPACE_DEBUG)
70 #define BUS_SPACE_DEBUG
71 #endif
73 #ifdef BUS_SPACE_DEBUG
74 #include <sys/systm.h> /* for printf() prototype */
76 * Macros for checking the aligned-ness of pointers passed to bus
77 * space ops. Strict alignment is required by the MIPS architecture,
78 * and a trap will occur if unaligned access is performed. These
79 * may aid in the debugging of a broken device driver by displaying
80 * useful information about the problem.
82 #define __BUS_SPACE_ALIGNED_ADDRESS(p, t) \
83 ((((u_long)(p)) & (sizeof(t)-1)) == 0)
85 #define __BUS_SPACE_ADDRESS_SANITY(p, t, d) \
86 ({ \
87 if (__BUS_SPACE_ALIGNED_ADDRESS((p), t) == 0) { \
88 printf("%s 0x%lx not aligned to %lu bytes %s:%d\n", \
89 d, (u_long)(p), sizeof(t), __FILE__, __LINE__); \
90 } \
91 (void) 0; \
94 #define BUS_SPACE_ALIGNED_POINTER(p, t) __BUS_SPACE_ALIGNED_ADDRESS(p, t)
95 #else
96 #define __BUS_SPACE_ADDRESS_SANITY(p, t, d) (void) 0
97 #define BUS_SPACE_ALIGNED_POINTER(p, t) ALIGNED_POINTER(p, t)
98 #endif /* BUS_SPACE_DEBUG */
99 #endif /* _KERNEL */
101 struct mips_bus_space_translation;
104 * Addresses (in bus space).
106 typedef u_long bus_addr_t;
107 typedef u_long bus_size_t;
110 * Access methods for bus space.
112 typedef struct algor_bus_space *bus_space_tag_t;
113 typedef u_long bus_space_handle_t;
115 struct algor_bus_space {
116 /* cookie */
117 void *bs_cookie;
119 /* mapping/unmapping */
120 int (*bs_map)(void *, bus_addr_t, bus_size_t,
121 int, bus_space_handle_t *, int);
122 void (*bs_unmap)(void *, bus_space_handle_t,
123 bus_size_t, int);
124 int (*bs_subregion)(void *, bus_space_handle_t,
125 bus_size_t, bus_size_t, bus_space_handle_t *);
127 /* ALGOR SPECIFIC MAPPING METHOD */
128 int (*bs_translate)(void *, bus_addr_t, bus_size_t,
129 int, struct mips_bus_space_translation *);
130 int (*bs_get_window)(void *, int,
131 struct mips_bus_space_translation *);
133 /* allocation/deallocation */
134 int (*bs_alloc)(void *, bus_addr_t, bus_addr_t,
135 bus_size_t, bus_size_t, bus_size_t, int,
136 bus_addr_t *, bus_space_handle_t *);
137 void (*bs_free)(void *, bus_space_handle_t,
138 bus_size_t);
140 /* get kernel virtual address */
141 void * (*bs_vaddr)(void *, bus_space_handle_t);
143 /* mmap for user */
144 paddr_t (*bs_mmap)(void *, bus_addr_t, off_t, int, int);
146 /* barrier */
147 void (*bs_barrier)(void *, bus_space_handle_t,
148 bus_size_t, bus_size_t, int);
150 /* read (single) */
151 u_int8_t (*bs_r_1)(void *, bus_space_handle_t,
152 bus_size_t);
153 u_int16_t (*bs_r_2)(void *, bus_space_handle_t,
154 bus_size_t);
155 u_int32_t (*bs_r_4)(void *, bus_space_handle_t,
156 bus_size_t);
157 u_int64_t (*bs_r_8)(void *, bus_space_handle_t,
158 bus_size_t);
160 /* read multiple */
161 void (*bs_rm_1)(void *, bus_space_handle_t,
162 bus_size_t, u_int8_t *, bus_size_t);
163 void (*bs_rm_2)(void *, bus_space_handle_t,
164 bus_size_t, u_int16_t *, bus_size_t);
165 void (*bs_rm_4)(void *, bus_space_handle_t,
166 bus_size_t, u_int32_t *, bus_size_t);
167 void (*bs_rm_8)(void *, bus_space_handle_t,
168 bus_size_t, u_int64_t *, bus_size_t);
170 /* read region */
171 void (*bs_rr_1)(void *, bus_space_handle_t,
172 bus_size_t, u_int8_t *, bus_size_t);
173 void (*bs_rr_2)(void *, bus_space_handle_t,
174 bus_size_t, u_int16_t *, bus_size_t);
175 void (*bs_rr_4)(void *, bus_space_handle_t,
176 bus_size_t, u_int32_t *, bus_size_t);
177 void (*bs_rr_8)(void *, bus_space_handle_t,
178 bus_size_t, u_int64_t *, bus_size_t);
180 /* write (single) */
181 void (*bs_w_1)(void *, bus_space_handle_t,
182 bus_size_t, u_int8_t);
183 void (*bs_w_2)(void *, bus_space_handle_t,
184 bus_size_t, u_int16_t);
185 void (*bs_w_4)(void *, bus_space_handle_t,
186 bus_size_t, u_int32_t);
187 void (*bs_w_8)(void *, bus_space_handle_t,
188 bus_size_t, u_int64_t);
190 /* write multiple */
191 void (*bs_wm_1)(void *, bus_space_handle_t,
192 bus_size_t, const u_int8_t *, bus_size_t);
193 void (*bs_wm_2)(void *, bus_space_handle_t,
194 bus_size_t, const u_int16_t *, bus_size_t);
195 void (*bs_wm_4)(void *, bus_space_handle_t,
196 bus_size_t, const u_int32_t *, bus_size_t);
197 void (*bs_wm_8)(void *, bus_space_handle_t,
198 bus_size_t, const u_int64_t *, bus_size_t);
200 /* write region */
201 void (*bs_wr_1)(void *, bus_space_handle_t,
202 bus_size_t, const u_int8_t *, bus_size_t);
203 void (*bs_wr_2)(void *, bus_space_handle_t,
204 bus_size_t, const u_int16_t *, bus_size_t);
205 void (*bs_wr_4)(void *, bus_space_handle_t,
206 bus_size_t, const u_int32_t *, bus_size_t);
207 void (*bs_wr_8)(void *, bus_space_handle_t,
208 bus_size_t, const u_int64_t *, bus_size_t);
210 /* set multiple */
211 void (*bs_sm_1)(void *, bus_space_handle_t,
212 bus_size_t, u_int8_t, bus_size_t);
213 void (*bs_sm_2)(void *, bus_space_handle_t,
214 bus_size_t, u_int16_t, bus_size_t);
215 void (*bs_sm_4)(void *, bus_space_handle_t,
216 bus_size_t, u_int32_t, bus_size_t);
217 void (*bs_sm_8)(void *, bus_space_handle_t,
218 bus_size_t, u_int64_t, bus_size_t);
220 /* set region */
221 void (*bs_sr_1)(void *, bus_space_handle_t,
222 bus_size_t, u_int8_t, bus_size_t);
223 void (*bs_sr_2)(void *, bus_space_handle_t,
224 bus_size_t, u_int16_t, bus_size_t);
225 void (*bs_sr_4)(void *, bus_space_handle_t,
226 bus_size_t, u_int32_t, bus_size_t);
227 void (*bs_sr_8)(void *, bus_space_handle_t,
228 bus_size_t, u_int64_t, bus_size_t);
230 /* copy */
231 void (*bs_c_1)(void *, bus_space_handle_t, bus_size_t,
232 bus_space_handle_t, bus_size_t, bus_size_t);
233 void (*bs_c_2)(void *, bus_space_handle_t, bus_size_t,
234 bus_space_handle_t, bus_size_t, bus_size_t);
235 void (*bs_c_4)(void *, bus_space_handle_t, bus_size_t,
236 bus_space_handle_t, bus_size_t, bus_size_t);
237 void (*bs_c_8)(void *, bus_space_handle_t, bus_size_t,
238 bus_space_handle_t, bus_size_t, bus_size_t);
242 * Translation of an MIPS bus address; INTERNAL USE ONLY.
244 struct mips_bus_space_translation {
245 bus_addr_t mbst_bus_start; /* start of bus window */
246 bus_addr_t mbst_bus_end; /* end of bus window */
247 paddr_t mbst_sys_start; /* start of sysBus window */
248 paddr_t mbst_sys_end; /* end of sysBus window */
249 int mbst_align_stride;/* alignment stride */
250 int mbst_flags; /* flags; see below */
253 #ifdef _KERNEL
255 * Utility macros; INTERNAL USE ONLY.
257 #define __bs_c(a,b) __CONCAT(a,b)
258 #define __bs_opname(op,size) __bs_c(__bs_c(__bs_c(bs_,op),_),size)
260 #define __bs_rs(sz, tn, t, h, o) \
261 (__BUS_SPACE_ADDRESS_SANITY((h) + (o), tn, "bus addr"), \
262 (*(t)->__bs_opname(r,sz))((t)->bs_cookie, h, o))
264 #define __bs_ws(sz, tn, t, h, o, v) \
265 do { \
266 __BUS_SPACE_ADDRESS_SANITY((h) + (o), tn, "bus addr"); \
267 (*(t)->__bs_opname(w,sz))((t)->bs_cookie, h, o, v); \
268 } while (0)
270 #define __bs_nonsingle(type, sz, tn, t, h, o, a, c) \
271 do { \
272 __BUS_SPACE_ADDRESS_SANITY((a), tn, "buffer"); \
273 __BUS_SPACE_ADDRESS_SANITY((h) + (o), tn, "bus addr"); \
274 (*(t)->__bs_opname(type,sz))((t)->bs_cookie, h, o, a, c); \
275 } while (0)
277 #define __bs_set(type, sz, tn, t, h, o, v, c) \
278 do { \
279 __BUS_SPACE_ADDRESS_SANITY((h) + (o), tn, "bus addr"); \
280 (*(t)->__bs_opname(type,sz))((t)->bs_cookie, h, o, v, c); \
281 } while (0)
283 #define __bs_copy(sz, tn, t, h1, o1, h2, o2, cnt) \
284 do { \
285 __BUS_SPACE_ADDRESS_SANITY((h1) + (o1), tn, "bus addr 1"); \
286 __BUS_SPACE_ADDRESS_SANITY((h2) + (o2), tn, "bus addr 2"); \
287 (*(t)->__bs_opname(c,sz))((t)->bs_cookie, h1, o1, h2, o2, cnt); \
288 } while (0)
292 * Mapping and unmapping operations.
294 #define bus_space_map(t, a, s, f, hp) \
295 (*(t)->bs_map)((t)->bs_cookie, (a), (s), (f), (hp), 1)
296 #define algor_bus_space_map_noacct(t, a, s, f, hp) \
297 (*(t)->bs_map)((t)->bs_cookie, (a), (s), (f), (hp), 0)
298 #define bus_space_unmap(t, h, s) \
299 (*(t)->bs_unmap)((t)->bs_cookie, (h), (s), 1)
300 #define algor_bus_space_unmap_noacct(t, h, s) \
301 (*(t)->bs_unmap)((t)->bs_cookie, (h), (s), 0)
302 #define bus_space_subregion(t, h, o, s, hp) \
303 (*(t)->bs_subregion)((t)->bs_cookie, (h), (o), (s), (hp))
305 #define algor_bus_space_translate(t, a, s, f, bst) \
306 (*(t)->bs_translate)((t)->bs_cookie, (a), (s), (f), (bst))
307 #define algor_bus_space_get_window(t, w, bst) \
308 (*(t)->bs_get_window)((t)->bs_cookie, (w), (bst))
309 #endif /* _KERNEL */
311 #define BUS_SPACE_MAP_CACHEABLE 0x01
312 #define BUS_SPACE_MAP_LINEAR 0x02
313 #define BUS_SPACE_MAP_PREFETCHABLE 0x04
315 #ifdef _KERNEL
317 * Allocation and deallocation operations.
319 #define bus_space_alloc(t, rs, re, s, a, b, f, ap, hp) \
320 (*(t)->bs_alloc)((t)->bs_cookie, (rs), (re), (s), (a), (b), \
321 (f), (ap), (hp))
322 #define bus_space_free(t, h, s) \
323 (*(t)->bs_free)((t)->bs_cookie, (h), (s))
326 * Get kernel virtual address for ranges mapped BUS_SPACE_MAP_LINEAR.
328 #define bus_space_vaddr(t, h) \
329 (*(t)->bs_vaddr)((t)->bs_cookie, (h))
332 * Mmap for user.
334 #define bus_space_mmap(t, a, o, p, f) \
335 (*(t)->bs_mmap)((t)->bs_cookie, (a), (o), (p), (f))
338 * Bus barrier operations.
340 #define bus_space_barrier(t, h, o, l, f) \
341 (*(t)->bs_barrier)((t)->bs_cookie, (h), (o), (l), (f))
343 #define BUS_SPACE_BARRIER_READ 0x01
344 #define BUS_SPACE_BARRIER_WRITE 0x02
348 * Bus read (single) operations.
350 #define bus_space_read_1(t, h, o) __bs_rs(1,u_int8_t,(t),(h),(o))
351 #define bus_space_read_2(t, h, o) __bs_rs(2,u_int16_t,(t),(h),(o))
352 #define bus_space_read_4(t, h, o) __bs_rs(4,u_int32_t,(t),(h),(o))
353 #define bus_space_read_8(t, h, o) __bs_rs(8,u_int64_t,(t),(h),(o))
357 * Bus read multiple operations.
359 #define bus_space_read_multi_1(t, h, o, a, c) \
360 __bs_nonsingle(rm,1,u_int8_t,(t),(h),(o),(a),(c))
361 #define bus_space_read_multi_2(t, h, o, a, c) \
362 __bs_nonsingle(rm,2,u_int16_t,(t),(h),(o),(a),(c))
363 #define bus_space_read_multi_4(t, h, o, a, c) \
364 __bs_nonsingle(rm,4,u_int32_t,(t),(h),(o),(a),(c))
365 #define bus_space_read_multi_8(t, h, o, a, c) \
366 __bs_nonsingle(rm,8,u_int64_t,(t),(h),(o),(a),(c))
370 * Bus read region operations.
372 #define bus_space_read_region_1(t, h, o, a, c) \
373 __bs_nonsingle(rr,1,u_int8_t,(t),(h),(o),(a),(c))
374 #define bus_space_read_region_2(t, h, o, a, c) \
375 __bs_nonsingle(rr,2,u_int16_t,(t),(h),(o),(a),(c))
376 #define bus_space_read_region_4(t, h, o, a, c) \
377 __bs_nonsingle(rr,4,u_int32_t,(t),(h),(o),(a),(c))
378 #define bus_space_read_region_8(t, h, o, a, c) \
379 __bs_nonsingle(rr,8,u_int64_t,(t),(h),(o),(a),(c))
383 * Bus write (single) operations.
385 #define bus_space_write_1(t, h, o, v) __bs_ws(1,u_int8_t,(t),(h),(o),(v))
386 #define bus_space_write_2(t, h, o, v) __bs_ws(2,u_int16_t,(t),(h),(o),(v))
387 #define bus_space_write_4(t, h, o, v) __bs_ws(4,u_int32_t,(t),(h),(o),(v))
388 #define bus_space_write_8(t, h, o, v) __bs_ws(8,u_int64_t,(t),(h),(o),(v))
392 * Bus write multiple operations.
394 #define bus_space_write_multi_1(t, h, o, a, c) \
395 __bs_nonsingle(wm,1,u_int8_t,(t),(h),(o),(a),(c))
396 #define bus_space_write_multi_2(t, h, o, a, c) \
397 __bs_nonsingle(wm,2,u_int16_t,(t),(h),(o),(a),(c))
398 #define bus_space_write_multi_4(t, h, o, a, c) \
399 __bs_nonsingle(wm,4,u_int32_t,(t),(h),(o),(a),(c))
400 #define bus_space_write_multi_8(t, h, o, a, c) \
401 __bs_nonsingle(wm,8,u_int64_t,(t),(h),(o),(a),(c))
405 * Bus write region operations.
407 #define bus_space_write_region_1(t, h, o, a, c) \
408 __bs_nonsingle(wr,1,u_int8_t,(t),(h),(o),(a),(c))
409 #define bus_space_write_region_2(t, h, o, a, c) \
410 __bs_nonsingle(wr,2,u_int16_t,(t),(h),(o),(a),(c))
411 #define bus_space_write_region_4(t, h, o, a, c) \
412 __bs_nonsingle(wr,4,u_int32_t,(t),(h),(o),(a),(c))
413 #define bus_space_write_region_8(t, h, o, a, c) \
414 __bs_nonsingle(wr,8,u_int64_t,(t),(h),(o),(a),(c))
418 * Set multiple operations.
420 #define bus_space_set_multi_1(t, h, o, v, c) \
421 __bs_set(sm,1,u_int8_t,(t),(h),(o),(v),(c))
422 #define bus_space_set_multi_2(t, h, o, v, c) \
423 __bs_set(sm,2,u_int16_t,(t),(h),(o),(v),(c))
424 #define bus_space_set_multi_4(t, h, o, v, c) \
425 __bs_set(sm,4,u_int32_t,(t),(h),(o),(v),(c))
426 #define bus_space_set_multi_8(t, h, o, v, c) \
427 __bs_set(sm,8,u_int64_t,(t),(h),(o),(v),(c))
431 * Set region operations.
433 #define bus_space_set_region_1(t, h, o, v, c) \
434 __bs_set(sr,1,u_int8_t,(t),(h),(o),(v),(c))
435 #define bus_space_set_region_2(t, h, o, v, c) \
436 __bs_set(sr,2,u_int16_t,(t),(h),(o),(v),(c))
437 #define bus_space_set_region_4(t, h, o, v, c) \
438 __bs_set(sr,4,u_int32_t,(t),(h),(o),(v),(c))
439 #define bus_space_set_region_8(t, h, o, v, c) \
440 __bs_set(sr,8,u_int64_t,(t),(h),(o),(v),(c))
444 * Copy region operations.
446 #define bus_space_copy_region_1(t, h1, o1, h2, o2, c) \
447 __bs_copy(1, u_int8_t, (t), (h1), (o1), (h2), (o2), (c))
448 #define bus_space_copy_region_2(t, h1, o1, h2, o2, c) \
449 __bs_copy(2, u_int16_t, (t), (h1), (o1), (h2), (o2), (c))
450 #define bus_space_copy_region_4(t, h1, o1, h2, o2, c) \
451 __bs_copy(4, u_int32_t, (t), (h1), (o1), (h2), (o2), (c))
452 #define bus_space_copy_region_8(t, h1, o1, h2, o2, c) \
453 __bs_copy(8, u_int64_t, (t), (h1), (o1), (h2), (o2), (c))
456 * Bus stream operations--defined in terms of non-stream counterparts
458 #define __BUS_SPACE_HAS_STREAM_METHODS 1
459 #define bus_space_read_stream_1 bus_space_read_1
460 #define bus_space_read_stream_2 bus_space_read_2
461 #define bus_space_read_stream_4 bus_space_read_4
462 #define bus_space_read_stream_8 bus_space_read_8
463 #define bus_space_read_multi_stream_1 bus_space_read_multi_1
464 #define bus_space_read_multi_stream_2 bus_space_read_multi_2
465 #define bus_space_read_multi_stream_4 bus_space_read_multi_4
466 #define bus_space_read_multi_stream_8 bus_space_read_multi_8
467 #define bus_space_read_region_stream_1 bus_space_read_region_1
468 #define bus_space_read_region_stream_2 bus_space_read_region_2
469 #define bus_space_read_region_stream_4 bus_space_read_region_4
470 #define bus_space_read_region_stream_8 bus_space_read_region_8
471 #define bus_space_write_stream_1 bus_space_write_1
472 #define bus_space_write_stream_2 bus_space_write_2
473 #define bus_space_write_stream_4 bus_space_write_4
474 #define bus_space_write_stream_8 bus_space_write_8
475 #define bus_space_write_multi_stream_1 bus_space_write_multi_1
476 #define bus_space_write_multi_stream_2 bus_space_write_multi_2
477 #define bus_space_write_multi_stream_4 bus_space_write_multi_4
478 #define bus_space_write_multi_stream_8 bus_space_write_multi_8
479 #define bus_space_write_region_stream_1 bus_space_write_region_1
480 #define bus_space_write_region_stream_2 bus_space_write_region_2
481 #define bus_space_write_region_stream_4 bus_space_write_region_4
482 #define bus_space_write_region_stream_8 bus_space_write_region_8
486 * Bus DMA methods.
490 * Flags used in various bus DMA methods.
492 #define BUS_DMA_WAITOK 0x000 /* safe to sleep (pseudo-flag) */
493 #define BUS_DMA_NOWAIT 0x001 /* not safe to sleep */
494 #define BUS_DMA_ALLOCNOW 0x002 /* perform resource allocation now */
495 #define BUS_DMA_COHERENT 0x004 /* hint: map memory DMA coherent */
496 #define BUS_DMA_STREAMING 0x008 /* hint: sequential, unidirectional */
497 #define BUS_DMA_BUS1 0x010 /* placeholders for bus functions... */
498 #define BUS_DMA_BUS2 0x020
499 #define BUS_DMA_BUS3 0x040
500 #define BUS_DMA_BUS4 0x080
501 #define BUS_DMA_READ 0x100 /* mapping is device -> memory only */
502 #define BUS_DMA_WRITE 0x200 /* mapping is memory -> device only */
503 #define BUS_DMA_NOCACHE 0x400 /* hint: map non-cached memory */
506 * Private flags stored in the DMA map.
508 #define ALGOR_DMAMAP_COHERENT 0x10000 /* no cache flush necessary on sync */
510 /* Forwards needed by prototypes below. */
511 struct mbuf;
512 struct uio;
515 * Operations performed by bus_dmamap_sync().
517 #define BUS_DMASYNC_PREREAD 0x01 /* pre-read synchronization */
518 #define BUS_DMASYNC_POSTREAD 0x02 /* post-read synchronization */
519 #define BUS_DMASYNC_PREWRITE 0x04 /* pre-write synchronization */
520 #define BUS_DMASYNC_POSTWRITE 0x08 /* post-write synchronization */
522 typedef struct algor_bus_dma_tag *bus_dma_tag_t;
523 typedef struct algor_bus_dmamap *bus_dmamap_t;
525 #define BUS_DMA_TAG_VALID(t) ((t) != (bus_dma_tag_t)0)
528 * bus_dma_segment_t
530 * Describes a single contiguous DMA transaction. Values
531 * are suitable for programming into DMA registers.
533 struct algor_bus_dma_segment {
534 bus_addr_t ds_addr; /* DMA address */
535 bus_size_t ds_len; /* length of transfer */
536 bus_addr_t _ds_vaddr; /* virtual address, 0 if invalid */
538 typedef struct algor_bus_dma_segment bus_dma_segment_t;
541 * bus_dma_tag_t
543 * A machine-dependent opaque type describing the implementation of
544 * DMA for a given bus.
546 struct algor_bus_dma_tag {
547 void *_cookie; /* cookie used in the guts */
549 bus_addr_t _wbase; /* DMA window base */
550 bus_addr_t _physbase; /* physical base of the window */
551 bus_size_t _wsize; /* size of the window */
554 * DMA mapping methods.
556 int (*_dmamap_create)(bus_dma_tag_t, bus_size_t, int,
557 bus_size_t, bus_size_t, int, bus_dmamap_t *);
558 void (*_dmamap_destroy)(bus_dma_tag_t, bus_dmamap_t);
559 int (*_dmamap_load)(bus_dma_tag_t, bus_dmamap_t, void *,
560 bus_size_t, struct proc *, int);
561 int (*_dmamap_load_mbuf)(bus_dma_tag_t, bus_dmamap_t,
562 struct mbuf *, int);
563 int (*_dmamap_load_uio)(bus_dma_tag_t, bus_dmamap_t,
564 struct uio *, int);
565 int (*_dmamap_load_raw)(bus_dma_tag_t, bus_dmamap_t,
566 bus_dma_segment_t *, int, bus_size_t, int);
567 void (*_dmamap_unload)(bus_dma_tag_t, bus_dmamap_t);
568 void (*_dmamap_sync)(bus_dma_tag_t, bus_dmamap_t,
569 bus_addr_t, bus_size_t, int);
572 * DMA memory utility functions.
574 int (*_dmamem_alloc)(bus_dma_tag_t, bus_size_t, bus_size_t,
575 bus_size_t, bus_dma_segment_t *, int, int *, int);
576 void (*_dmamem_free)(bus_dma_tag_t,
577 bus_dma_segment_t *, int);
578 int (*_dmamem_map)(bus_dma_tag_t, bus_dma_segment_t *,
579 int, size_t, void **, int);
580 void (*_dmamem_unmap)(bus_dma_tag_t, void *, size_t);
581 paddr_t (*_dmamem_mmap)(bus_dma_tag_t, bus_dma_segment_t *,
582 int, off_t, int, int);
585 #define bus_dmamap_create(t, s, n, m, b, f, p) \
586 (*(t)->_dmamap_create)((t), (s), (n), (m), (b), (f), (p))
587 #define bus_dmamap_destroy(t, p) \
588 (*(t)->_dmamap_destroy)((t), (p))
589 #define bus_dmamap_load(t, m, b, s, p, f) \
590 (*(t)->_dmamap_load)((t), (m), (b), (s), (p), (f))
591 #define bus_dmamap_load_mbuf(t, m, b, f) \
592 (*(t)->_dmamap_load_mbuf)((t), (m), (b), (f))
593 #define bus_dmamap_load_uio(t, m, u, f) \
594 (*(t)->_dmamap_load_uio)((t), (m), (u), (f))
595 #define bus_dmamap_load_raw(t, m, sg, n, s, f) \
596 (*(t)->_dmamap_load_raw)((t), (m), (sg), (n), (s), (f))
597 #define bus_dmamap_unload(t, p) \
598 (*(t)->_dmamap_unload)((t), (p))
599 #define bus_dmamap_sync(t, p, o, l, ops) \
600 (*(t)->_dmamap_sync)((t), (p), (o), (l), (ops))
601 #define bus_dmamem_alloc(t, s, a, b, sg, n, r, f) \
602 (*(t)->_dmamem_alloc)((t), (s), (a), (b), (sg), (n), (r), (f))
603 #define bus_dmamem_free(t, sg, n) \
604 (*(t)->_dmamem_free)((t), (sg), (n))
605 #define bus_dmamem_map(t, sg, n, s, k, f) \
606 (*(t)->_dmamem_map)((t), (sg), (n), (s), (k), (f))
607 #define bus_dmamem_unmap(t, k, s) \
608 (*(t)->_dmamem_unmap)((t), (k), (s))
609 #define bus_dmamem_mmap(t, sg, n, o, p, f) \
610 (*(t)->_dmamem_mmap)((t), (sg), (n), (o), (p), (f))
612 #define bus_dmatag_subregion(t, mna, mxa, nt, f) EOPNOTSUPP
613 #define bus_dmatag_destroy(t)
616 * bus_dmamap_t
618 * Describes a DMA mapping.
620 struct algor_bus_dmamap {
622 * PRIVATE MEMBERS: not for use my machine-independent code.
624 bus_size_t _dm_size; /* largest DMA transfer mappable */
625 int _dm_segcnt; /* number of segs this map can map */
626 bus_size_t _dm_maxmaxsegsz; /* fixed largest possible segment */
627 bus_size_t _dm_boundary; /* don't cross this */
628 int _dm_flags; /* misc. flags */
629 struct vmspace *_dm_vmspace; /* vmspace that owns the mapping */
632 * Private cookie to be used by the DMA back-end.
634 void *_dm_cookie;
637 * PUBLIC MEMBERS: these are used by machine-independent code.
639 bus_size_t dm_maxsegsz; /* largest possible segment */
640 bus_size_t dm_mapsize; /* size of the mapping */
641 int dm_nsegs; /* # valid segments in mapping */
642 bus_dma_segment_t dm_segs[1]; /* segments; variable length */
645 #ifdef _ALGOR_BUS_DMA_PRIVATE
646 int _bus_dmamap_create(bus_dma_tag_t, bus_size_t, int, bus_size_t,
647 bus_size_t, int, bus_dmamap_t *);
648 void _bus_dmamap_destroy(bus_dma_tag_t, bus_dmamap_t);
650 int _bus_dmamap_load(bus_dma_tag_t, bus_dmamap_t,
651 void *, bus_size_t, struct proc *, int);
652 int _bus_dmamap_load_mbuf(bus_dma_tag_t,
653 bus_dmamap_t, struct mbuf *, int);
654 int _bus_dmamap_load_uio(bus_dma_tag_t,
655 bus_dmamap_t, struct uio *, int);
656 int _bus_dmamap_load_raw(bus_dma_tag_t,
657 bus_dmamap_t, bus_dma_segment_t *, int, bus_size_t, int);
659 void _bus_dmamap_unload(bus_dma_tag_t, bus_dmamap_t);
660 void _bus_dmamap_sync(bus_dma_tag_t, bus_dmamap_t, bus_addr_t,
661 bus_size_t, int);
663 int _bus_dmamem_alloc(bus_dma_tag_t tag, bus_size_t size,
664 bus_size_t alignment, bus_size_t boundary,
665 bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags);
666 int _bus_dmamem_alloc_range(bus_dma_tag_t tag, bus_size_t size,
667 bus_size_t alignment, bus_size_t boundary,
668 bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags,
669 paddr_t low, paddr_t high);
670 void _bus_dmamem_free(bus_dma_tag_t tag, bus_dma_segment_t *segs,
671 int nsegs);
672 int _bus_dmamem_map(bus_dma_tag_t tag, bus_dma_segment_t *segs,
673 int nsegs, size_t size, void **kvap, int flags);
674 void _bus_dmamem_unmap(bus_dma_tag_t tag, void *kva,
675 size_t size);
676 paddr_t _bus_dmamem_mmap(bus_dma_tag_t tag, bus_dma_segment_t *segs,
677 int nsegs, off_t off, int prot, int flags);
678 #endif /* _ALGOR_BUS_DMA_PRIVATE */
680 #endif /* _KERNEL */
682 #endif /* _ALGOR_BUS_H_ */