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[netbsd-mini2440.git] / sys / arch / algor / pci / pci_alignstride_bus_mem_chipdep.c
blob08d7674c402ac4ad8b2d4205933cad2cecc68480
1 /* $NetBSD: pci_alignstride_bus_mem_chipdep.c,v 1.7 2008/04/28 20:23:10 martin Exp $ */
2
3 /*-
4 * Copyright (c) 2000, 2001 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32 /*
33 * Copyright (c) 1995, 1996 Carnegie-Mellon University.
34 * All rights reserved.
35 *
36 * Author: Chris G. Demetriou
37 *
38 * Permission to use, copy, modify and distribute this software and
39 * its documentation is hereby granted, provided that both the copyright
40 * notice and this permission notice appear in all copies of the
41 * software, derivative works or modified versions, and any portions
42 * thereof, and that both notices appear in supporting documentation.
43 *
44 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
45 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
46 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
47 *
48 * Carnegie Mellon requests users of this software to return to
49 *
50 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
51 * School of Computer Science
52 * Carnegie Mellon University
53 * Pittsburgh PA 15213-3890
54 *
55 * any improvements or extensions that they make and grant Carnegie the
56 * rights to redistribute these changes.
57 */
58
59 /*
60 * Common PCI Chipset "bus I/O" functions, for chipsets which have to
61 * deal with only a single PCI interface chip in a machine.
62 *
63 * uses:
64 * CHIP name of the 'chip' it's being compiled for.
65 * CHIP_MEM_BASE Mem space base to use.
66 * CHIP_MEM_EX_STORE
67 * If defined, device-provided static storage area
68 * for the sparse memory space extent. If this is
69 * defined, CHIP_MEM_EX_STORE_SIZE must also be
70 * defined. If this is not defined, a static area
71 * will be declared.
72 * CHIP_MEM_EX_STORE_SIZE
73 * Size of the device-provided static storage area
74 * for the sparse memory space extent.
75 */
76
77 #include <sys/cdefs.h>
78 __KERNEL_RCSID(1, "$NetBSD: pci_alignstride_bus_mem_chipdep.c,v 1.7 2008/04/28 20:23:10 martin Exp $");
79
80 #include <sys/extent.h>
81
82 #define __C(A,B) __CONCAT(A,B)
83 #define __S(S) __STRING(S)
84
85 /* mapping/unmapping */
86 int __C(CHIP,_mem_map)(void *, bus_addr_t, bus_size_t, int,
87 bus_space_handle_t *, int);
88 void __C(CHIP,_mem_unmap)(void *, bus_space_handle_t,
89 bus_size_t, int);
90 int __C(CHIP,_mem_subregion)(void *, bus_space_handle_t,
91 bus_size_t, bus_size_t, bus_space_handle_t *);
92
93 int __C(CHIP,_mem_translate)(void *, bus_addr_t, bus_size_t,
94 int, struct mips_bus_space_translation *);
95 int __C(CHIP,_mem_get_window)(void *, int,
96 struct mips_bus_space_translation *);
97
98 /* allocation/deallocation */
99 int __C(CHIP,_mem_alloc)(void *, bus_addr_t, bus_addr_t,
100 bus_size_t, bus_size_t, bus_addr_t, int, bus_addr_t *,
101 bus_space_handle_t *);
102 void __C(CHIP,_mem_free)(void *, bus_space_handle_t,
103 bus_size_t);
104
105 /* get kernel virtual address */
106 void * __C(CHIP,_mem_vaddr)(void *, bus_space_handle_t);
107
108 /* mmap for user */
109 paddr_t __C(CHIP,_mem_mmap)(void *, bus_addr_t, off_t, int, int);
110
111 /* barrier */
112 inline void __C(CHIP,_mem_barrier)(void *, bus_space_handle_t,
113 bus_size_t, bus_size_t, int);
114
115 /* read (single) */
116 inline u_int8_t __C(CHIP,_mem_read_1)(void *, bus_space_handle_t,
117 bus_size_t);
118 inline u_int16_t __C(CHIP,_mem_read_2)(void *, bus_space_handle_t,
119 bus_size_t);
120 inline u_int32_t __C(CHIP,_mem_read_4)(void *, bus_space_handle_t,
121 bus_size_t);
122 inline u_int64_t __C(CHIP,_mem_read_8)(void *, bus_space_handle_t,
123 bus_size_t);
124
125 /* read multiple */
126 void __C(CHIP,_mem_read_multi_1)(void *, bus_space_handle_t,
127 bus_size_t, u_int8_t *, bus_size_t);
128 void __C(CHIP,_mem_read_multi_2)(void *, bus_space_handle_t,
129 bus_size_t, u_int16_t *, bus_size_t);
130 void __C(CHIP,_mem_read_multi_4)(void *, bus_space_handle_t,
131 bus_size_t, u_int32_t *, bus_size_t);
132 void __C(CHIP,_mem_read_multi_8)(void *, bus_space_handle_t,
133 bus_size_t, u_int64_t *, bus_size_t);
134
135 /* read region */
136 void __C(CHIP,_mem_read_region_1)(void *, bus_space_handle_t,
137 bus_size_t, u_int8_t *, bus_size_t);
138 void __C(CHIP,_mem_read_region_2)(void *, bus_space_handle_t,
139 bus_size_t, u_int16_t *, bus_size_t);
140 void __C(CHIP,_mem_read_region_4)(void *, bus_space_handle_t,
141 bus_size_t, u_int32_t *, bus_size_t);
142 void __C(CHIP,_mem_read_region_8)(void *, bus_space_handle_t,
143 bus_size_t, u_int64_t *, bus_size_t);
144
145 /* write (single) */
146 inline void __C(CHIP,_mem_write_1)(void *, bus_space_handle_t,
147 bus_size_t, u_int8_t);
148 inline void __C(CHIP,_mem_write_2)(void *, bus_space_handle_t,
149 bus_size_t, u_int16_t);
150 inline void __C(CHIP,_mem_write_4)(void *, bus_space_handle_t,
151 bus_size_t, u_int32_t);
152 inline void __C(CHIP,_mem_write_8)(void *, bus_space_handle_t,
153 bus_size_t, u_int64_t);
154
155 /* write multiple */
156 void __C(CHIP,_mem_write_multi_1)(void *, bus_space_handle_t,
157 bus_size_t, const u_int8_t *, bus_size_t);
158 void __C(CHIP,_mem_write_multi_2)(void *, bus_space_handle_t,
159 bus_size_t, const u_int16_t *, bus_size_t);
160 void __C(CHIP,_mem_write_multi_4)(void *, bus_space_handle_t,
161 bus_size_t, const u_int32_t *, bus_size_t);
162 void __C(CHIP,_mem_write_multi_8)(void *, bus_space_handle_t,
163 bus_size_t, const u_int64_t *, bus_size_t);
164
165 /* write region */
166 void __C(CHIP,_mem_write_region_1)(void *, bus_space_handle_t,
167 bus_size_t, const u_int8_t *, bus_size_t);
168 void __C(CHIP,_mem_write_region_2)(void *, bus_space_handle_t,
169 bus_size_t, const u_int16_t *, bus_size_t);
170 void __C(CHIP,_mem_write_region_4)(void *, bus_space_handle_t,
171 bus_size_t, const u_int32_t *, bus_size_t);
172 void __C(CHIP,_mem_write_region_8)(void *, bus_space_handle_t,
173 bus_size_t, const u_int64_t *, bus_size_t);
174
175 /* set multiple */
176 void __C(CHIP,_mem_set_multi_1)(void *, bus_space_handle_t,
177 bus_size_t, u_int8_t, bus_size_t);
178 void __C(CHIP,_mem_set_multi_2)(void *, bus_space_handle_t,
179 bus_size_t, u_int16_t, bus_size_t);
180 void __C(CHIP,_mem_set_multi_4)(void *, bus_space_handle_t,
181 bus_size_t, u_int32_t, bus_size_t);
182 void __C(CHIP,_mem_set_multi_8)(void *, bus_space_handle_t,
183 bus_size_t, u_int64_t, bus_size_t);
184
185 /* set region */
186 void __C(CHIP,_mem_set_region_1)(void *, bus_space_handle_t,
187 bus_size_t, u_int8_t, bus_size_t);
188 void __C(CHIP,_mem_set_region_2)(void *, bus_space_handle_t,
189 bus_size_t, u_int16_t, bus_size_t);
190 void __C(CHIP,_mem_set_region_4)(void *, bus_space_handle_t,
191 bus_size_t, u_int32_t, bus_size_t);
192 void __C(CHIP,_mem_set_region_8)(void *, bus_space_handle_t,
193 bus_size_t, u_int64_t, bus_size_t);
194
195 /* copy */
196 void __C(CHIP,_mem_copy_region_1)(void *, bus_space_handle_t,
197 bus_size_t, bus_space_handle_t, bus_size_t, bus_size_t);
198 void __C(CHIP,_mem_copy_region_2)(void *, bus_space_handle_t,
199 bus_size_t, bus_space_handle_t, bus_size_t, bus_size_t);
200 void __C(CHIP,_mem_copy_region_4)(void *, bus_space_handle_t,
201 bus_size_t, bus_space_handle_t, bus_size_t, bus_size_t);
202 void __C(CHIP,_mem_copy_region_8)(void *, bus_space_handle_t,
203 bus_size_t, bus_space_handle_t, bus_size_t, bus_size_t);
204
205 #ifndef CHIP_MEM_EX_STORE
206 static long
207 __C(CHIP,_mem_ex_storage)[EXTENT_FIXED_STORAGE_SIZE(8) / sizeof(long)];
208 #define CHIP_MEM_EX_STORE(v) (__C(CHIP,_mem_ex_storage))
209 #define CHIP_MEM_EX_STORE_SIZE(v) (sizeof __C(CHIP,_mem_ex_storage))
210 #endif
211
212 #ifndef CHIP_ALIGN_STRIDE
213 #define CHIP_ALIGN_STRIDE 0
214 #endif
215
216 void
217 __C(CHIP,_bus_mem_init)(t, v)
218 bus_space_tag_t t;
219 void *v;
220 {
221 struct extent *ex;
222
223 /*
224 * Initialize the bus space tag.
225 */
226
227 /* cookie */
228 t->bs_cookie = v;
229
230 /* mapping/unmapping */
231 t->bs_map = __C(CHIP,_mem_map);
232 t->bs_unmap = __C(CHIP,_mem_unmap);
233 t->bs_subregion = __C(CHIP,_mem_subregion);
234
235 t->bs_translate = __C(CHIP,_mem_translate);
236 t->bs_get_window = __C(CHIP,_mem_get_window);
237
238 /* allocation/deallocation */
239 t->bs_alloc = __C(CHIP,_mem_alloc);
240 t->bs_free = __C(CHIP,_mem_free);
241
242 /* get kernel virtual address */
243 t->bs_vaddr = __C(CHIP,_mem_vaddr);
244
245 /* mmap for user */
246 t->bs_mmap = __C(CHIP,_mem_mmap);
247
248 /* barrier */
249 t->bs_barrier = __C(CHIP,_mem_barrier);
250
251 /* read (single) */
252 t->bs_r_1 = __C(CHIP,_mem_read_1);
253 t->bs_r_2 = __C(CHIP,_mem_read_2);
254 t->bs_r_4 = __C(CHIP,_mem_read_4);
255 t->bs_r_8 = __C(CHIP,_mem_read_8);
256
257 /* read multiple */
258 t->bs_rm_1 = __C(CHIP,_mem_read_multi_1);
259 t->bs_rm_2 = __C(CHIP,_mem_read_multi_2);
260 t->bs_rm_4 = __C(CHIP,_mem_read_multi_4);
261 t->bs_rm_8 = __C(CHIP,_mem_read_multi_8);
262
263 /* read region */
264 t->bs_rr_1 = __C(CHIP,_mem_read_region_1);
265 t->bs_rr_2 = __C(CHIP,_mem_read_region_2);
266 t->bs_rr_4 = __C(CHIP,_mem_read_region_4);
267 t->bs_rr_8 = __C(CHIP,_mem_read_region_8);
268
269 /* write (single) */
270 t->bs_w_1 = __C(CHIP,_mem_write_1);
271 t->bs_w_2 = __C(CHIP,_mem_write_2);
272 t->bs_w_4 = __C(CHIP,_mem_write_4);
273 t->bs_w_8 = __C(CHIP,_mem_write_8);
274
275 /* write multiple */
276 t->bs_wm_1 = __C(CHIP,_mem_write_multi_1);
277 t->bs_wm_2 = __C(CHIP,_mem_write_multi_2);
278 t->bs_wm_4 = __C(CHIP,_mem_write_multi_4);
279 t->bs_wm_8 = __C(CHIP,_mem_write_multi_8);
280
281 /* write region */
282 t->bs_wr_1 = __C(CHIP,_mem_write_region_1);
283 t->bs_wr_2 = __C(CHIP,_mem_write_region_2);
284 t->bs_wr_4 = __C(CHIP,_mem_write_region_4);
285 t->bs_wr_8 = __C(CHIP,_mem_write_region_8);
286
287 /* set multiple */
288 t->bs_sm_1 = __C(CHIP,_mem_set_multi_1);
289 t->bs_sm_2 = __C(CHIP,_mem_set_multi_2);
290 t->bs_sm_4 = __C(CHIP,_mem_set_multi_4);
291 t->bs_sm_8 = __C(CHIP,_mem_set_multi_8);
292
293 /* set region */
294 t->bs_sr_1 = __C(CHIP,_mem_set_region_1);
295 t->bs_sr_2 = __C(CHIP,_mem_set_region_2);
296 t->bs_sr_4 = __C(CHIP,_mem_set_region_4);
297 t->bs_sr_8 = __C(CHIP,_mem_set_region_8);
298
299 /* copy */
300 t->bs_c_1 = __C(CHIP,_mem_copy_region_1);
301 t->bs_c_2 = __C(CHIP,_mem_copy_region_2);
302 t->bs_c_4 = __C(CHIP,_mem_copy_region_4);
303 t->bs_c_8 = __C(CHIP,_mem_copy_region_8);
304
305 /* XXX WE WANT EXTENT_NOCOALESCE, BUT WE CAN'T USE IT. XXX */
306 ex = extent_create(__S(__C(CHIP,_bus_mem)), 0x0UL, 0xffffffffUL,
307 M_DEVBUF, (void *)CHIP_MEM_EX_STORE(v), CHIP_MEM_EX_STORE_SIZE(v),
308 EX_NOWAIT);
309 extent_alloc_region(ex, 0, 0xffffffffUL, EX_NOWAIT);
310
311 #ifdef CHIP_MEM_W1_BUS_START
312 #ifdef EXTENT_DEBUG
313 printf("mem: freeing from 0x%lx to 0x%lx\n",
314 CHIP_MEM_W1_BUS_START(v), CHIP_MEM_W1_BUS_END(v));
315 #endif
316 extent_free(ex, CHIP_MEM_W1_BUS_START(v),
317 CHIP_MEM_W1_BUS_END(v) - CHIP_MEM_W1_BUS_START(v) + 1,
318 EX_NOWAIT);
319 #endif
320 #ifdef CHIP_MEM_W2_BUS_START
321 if (CHIP_MEM_W2_BUS_START(v) != CHIP_MEM_W1_BUS_START(v)) {
322 #ifdef EXTENT_DEBUG
323 printf("mem: freeing from 0x%lx to 0x%lx\n",
324 CHIP_MEM_W2_BUS_START(v), CHIP_MEM_W2_BUS_END(v));
325 #endif
326 extent_free(ex, CHIP_MEM_W2_BUS_START(v),
327 CHIP_MEM_W2_BUS_END(v) - CHIP_MEM_W2_BUS_START(v) + 1,
328 EX_NOWAIT);
329 } else {
330 #ifdef EXTENT_DEBUG
331 printf("mem: window 2 (0x%lx to 0x%lx) overlaps window 1\n",
332 CHIP_MEM_W2_BUS_START(v), CHIP_MEM_W2_BUS_END(v));
333 #endif
334 }
335 #endif
336 #ifdef CHIP_MEM_W3_BUS_START
337 if (CHIP_MEM_W3_BUS_START(v) != CHIP_MEM_W1_BUS_START(v) &&
338 CHIP_MEM_W3_BUS_START(v) != CHIP_MEM_W2_BUS_START(v)) {
339 #ifdef EXTENT_DEBUG
340 printf("mem: freeing from 0x%lx to 0x%lx\n",
341 CHIP_MEM_W3_BUS_START(v), CHIP_MEM_W3_BUS_END(v));
342 #endif
343 extent_free(ex, CHIP_MEM_W3_BUS_START(v),
344 CHIP_MEM_W3_BUS_END(v) - CHIP_MEM_W3_BUS_START(v) + 1,
345 EX_NOWAIT);
346 } else {
347 #ifdef EXTENT_DEBUG
348 printf("mem: window 2 (0x%lx to 0x%lx) overlaps window 1\n",
349 CHIP_MEM_W2_BUS_START(v), CHIP_MEM_W2_BUS_END(v));
350 #endif
351 }
352 #endif
353
354 #ifdef EXTENT_DEBUG
355 extent_print(ex);
356 #endif
357 CHIP_MEM_EXTENT(v) = ex;
358 }
359
360 int
361 __C(CHIP,_mem_translate)(v, memaddr, memlen, flags, mbst)
362 void *v;
363 bus_addr_t memaddr;
364 bus_size_t memlen;
365 int flags;
366 struct mips_bus_space_translation *mbst;
367 {
368 bus_addr_t memend = memaddr + (memlen - 1);
369 #if CHIP_ALIGN_STRIDE != 0
370 int linear = flags & BUS_SPACE_MAP_LINEAR;
371
372 /*
373 * Can't map memory space linearly.
374 */
375 if (linear)
376 return (EOPNOTSUPP);
377 #endif
378
379 #ifdef CHIP_MEM_W1_BUS_START
380 if (memaddr >= CHIP_MEM_W1_BUS_START(v) &&
381 memend <= CHIP_MEM_W1_BUS_END(v))
382 return (__C(CHIP,_mem_get_window)(v, 0, mbst));
383 #endif
384
385 #ifdef CHIP_MEM_W2_BUS_START
386 if (memaddr >= CHIP_MEM_W2_BUS_START(v) &&
387 memend <= CHIP_MEM_W2_BUS_END(v))
388 return (__C(CHIP,_mem_get_window)(v, 1, mbst));
389 #endif
390
391 #ifdef CHIP_MEM_W3_BUS_START
392 if (memaddr >= CHIP_MEM_W3_BUS_START(v) &&
393 memend <= CHIP_MEM_W3_BUS_END(v))
394 return (__C(CHIP,_mem_get_window)(v, 2, mbst));
395 #endif
396
397 #ifdef EXTENT_DEBUG
398 printf("\n");
399 #ifdef CHIP_MEM_W1_BUS_START
400 printf("%s: window[1]=0x%lx-0x%lx\n",
401 __S(__C(CHIP,_mem_map)), CHIP_MEM_W1_BUS_START(v),
402 CHIP_MEM_W1_BUS_END(v));
403 #endif
404 #ifdef CHIP_MEM_W2_BUS_START
405 printf("%s: window[2]=0x%lx-0x%lx\n",
406 __S(__C(CHIP,_mem_map)), CHIP_MEM_W2_BUS_START(v),
407 CHIP_MEM_W2_BUS_END(v));
408 #endif
409 #ifdef CHIP_MEM_W3_BUS_START
410 printf("%s: window[3]=0x%lx-0x%lx\n",
411 __S(__C(CHIP,_mem_map)), CHIP_MEM_W3_BUS_START(v),
412 CHIP_MEM_W3_BUS_END(v));
413 #endif
414 #endif /* EXTENT_DEBUG */
415 /* No translation. */
416 return (EINVAL);
417 }
418
419 int
420 __C(CHIP,_mem_get_window)(v, window, mbst)
421 void *v;
422 int window;
423 struct mips_bus_space_translation *mbst;
424 {
425
426 switch (window) {
427 #ifdef CHIP_MEM_W1_BUS_START
428 case 0:
429 mbst->mbst_bus_start = CHIP_MEM_W1_BUS_START(v);
430 mbst->mbst_bus_end = CHIP_MEM_W1_BUS_END(v);
431 mbst->mbst_sys_start = CHIP_MEM_W1_SYS_START(v);
432 mbst->mbst_sys_end = CHIP_MEM_W1_SYS_END(v);
433 mbst->mbst_align_stride = CHIP_ALIGN_STRIDE;
434 mbst->mbst_flags = 0;
435 break;
436 #endif
437
438 #ifdef CHIP_MEM_W2_BUS_START
439 case 1:
440 mbst->mbst_bus_start = CHIP_MEM_W2_BUS_START(v);
441 mbst->mbst_bus_end = CHIP_MEM_W2_BUS_END(v);
442 mbst->mbst_sys_start = CHIP_MEM_W2_SYS_START(v);
443 mbst->mbst_sys_end = CHIP_MEM_W2_SYS_END(v);
444 mbst->mbst_align_stride = CHIP_ALIGN_STRIDE;
445 mbst->mbst_flags = 0;
446 break;
447 #endif
448
449 #ifdef CHIP_MEM_W3_BUS_START
450 case 2:
451 mbst->mbst_bus_start = CHIP_MEM_W3_BUS_START(v);
452 mbst->mbst_bus_end = CHIP_MEM_W3_BUS_END(v);
453 mbst->mbst_sys_start = CHIP_MEM_W3_SYS_START(v);
454 mbst->mbst_sys_end = CHIP_MEM_W3_SYS_END(v);
455 mbst->mbst_align_stride = CHIP_ALIGN_STRIDE;
456 mbst->mbst_flags = 0;
457 break;
458 #endif
459
460 default:
461 panic(__S(__C(CHIP,_mem_get_window)) ": invalid window %d",
462 window);
463 }
464
465 return (0);
466 }
467
468 int
469 __C(CHIP,_mem_map)(v, memaddr, memsize, flags, memhp, acct)
470 void *v;
471 bus_addr_t memaddr;
472 bus_size_t memsize;
473 int flags;
474 bus_space_handle_t *memhp;
475 int acct;
476 {
477 struct mips_bus_space_translation mbst;
478 int error;
479
480 /*
481 * Get the translation for this address.
482 */
483 error = __C(CHIP,_mem_translate)(v, memaddr, memsize, flags, &mbst);
484 if (error)
485 return (error);
486
487 if (acct == 0)
488 goto mapit;
489
490 #ifdef EXTENT_DEBUG
491 printf("mem: allocating 0x%lx to 0x%lx\n", memaddr,
492 memaddr + memsize - 1);
493 #endif
494 error = extent_alloc_region(CHIP_MEM_EXTENT(v), memaddr, memsize,
495 EX_NOWAIT | (CHIP_EX_MALLOC_SAFE(v) ? EX_MALLOCOK : 0));
496 if (error) {
497 #ifdef EXTENT_DEBUG
498 printf("mem: allocation failed (%d)\n", error);
499 extent_print(CHIP_MEM_EXTENT(v));
500 #endif
501 return (error);
502 }
503
504 mapit:
505 if (flags & BUS_SPACE_MAP_CACHEABLE)
506 *memhp = MIPS_PHYS_TO_KSEG0(mbst.mbst_sys_start +
507 (memaddr - mbst.mbst_bus_start));
508 else
509 *memhp = MIPS_PHYS_TO_KSEG1(mbst.mbst_sys_start +
510 (memaddr - mbst.mbst_bus_start));
511
512 return (0);
513 }
514
515 void
516 __C(CHIP,_mem_unmap)(v, memh, memsize, acct)
517 void *v;
518 bus_space_handle_t memh;
519 bus_size_t memsize;
520 int acct;
521 {
522 bus_addr_t memaddr;
523 int error;
524
525 if (acct == 0)
526 return;
527
528 #ifdef EXTENT_DEBUG
529 printf("mem: freeing handle 0x%lx for 0x%lx\n", memh, memsize);
530 #endif
531
532 if (memh >= MIPS_KSEG0_START && memh < MIPS_KSEG1_START)
533 memh = MIPS_KSEG0_TO_PHYS(memh);
534 else
535 memh = MIPS_KSEG1_TO_PHYS(memh);
536
537 #ifdef CHIP_MEM_W1_BUS_START
538 if (memh >= CHIP_MEM_W1_SYS_START(v) &&
539 memh <= CHIP_MEM_W1_SYS_END(v)) {
540 memaddr = CHIP_MEM_W1_BUS_START(v) +
541 (memh - CHIP_MEM_W1_SYS_START(v));
542 } else
543 #endif
544 #ifdef CHIP_MEM_W2_BUS_START
545 if (memh >= CHIP_MEM_W2_SYS_START(v) &&
546 memh <= CHIP_MEM_W2_SYS_END(v)) {
547 memaddr = CHIP_MEM_W2_BUS_START(v) +
548 (memh - CHIP_MEM_W2_SYS_START(v));
549 } else
550 #endif
551 #ifdef CHIP_MEM_W3_BUS_START
552 if (memh >= CHIP_MEM_W3_SYS_START(v) &&
553 memh <= CHIP_MEM_W3_SYS_END(v)) {
554 memaddr = CHIP_MEM_W3_BUS_START(v) +
555 (memh - CHIP_MEM_W3_SYS_START(v));
556 } else
557 #endif
558 {
559 printf("\n");
560 #ifdef CHIP_MEM_W1_BUS_START
561 printf("%s: sys window[1]=0x%lx-0x%lx\n",
562 __S(__C(CHIP,_mem_map)), CHIP_MEM_W1_SYS_START(v),
563 CHIP_MEM_W1_SYS_END(v));
564 #endif
565 #ifdef CHIP_MEM_W2_BUS_START
566 printf("%s: sys window[2]=0x%lx-0x%lx\n",
567 __S(__C(CHIP,_mem_map)), CHIP_MEM_W2_SYS_START(v),
568 CHIP_MEM_W2_SYS_END(v));
569 #endif
570 #ifdef CHIP_MEM_W3_BUS_START
571 printf("%s: sys window[3]=0x%lx-0x%lx\n",
572 __S(__C(CHIP,_mem_map)), CHIP_MEM_W3_SYS_START(v),
573 CHIP_MEM_W3_SYS_END(v));
574 #endif
575 panic("%s: don't know how to unmap %lx",
576 __S(__C(CHIP,_mem_unmap)), memh);
577 }
578
579 #ifdef EXTENT_DEBUG
580 printf("mem: freeing 0x%lx to 0x%lx\n", memaddr,
581 memaddr + memsize - 1);
582 #endif
583 error = extent_free(CHIP_MEM_EXTENT(v), memaddr, memsize,
584 EX_NOWAIT | (CHIP_EX_MALLOC_SAFE(v) ? EX_MALLOCOK : 0));
585 if (error) {
586 printf("%s: WARNING: could not unmap 0x%lx-0x%lx (error %d)\n",
587 __S(__C(CHIP,_mem_unmap)), memaddr, memaddr + memsize - 1,
588 error);
589 #ifdef EXTENT_DEBUG
590 extent_print(CHIP_MEM_EXTENT(v));
591 #endif
592 }
593 }
594
595 int
596 __C(CHIP,_mem_subregion)(v, memh, offset, size, nmemh)
597 void *v;
598 bus_space_handle_t memh, *nmemh;
599 bus_size_t offset, size;
600 {
601
602 *nmemh = memh + (offset << CHIP_ALIGN_STRIDE);
603 return (0);
604 }
605
606 int
607 __C(CHIP,_mem_alloc)(v, rstart, rend, size, align, boundary, flags,
608 addrp, bshp)
609 void *v;
610 bus_addr_t rstart, rend, *addrp;
611 bus_size_t size, align, boundary;
612 int flags;
613 bus_space_handle_t *bshp;
614 {
615 struct mips_bus_space_translation mbst;
616 bus_addr_t memaddr;
617 int error;
618 #if CHIP_ALIGN_STRIDE != 0
619 int linear = flags & BUS_SPACE_MAP_LINEAR;
620
621 /*
622 * Can't map memory space linearly.
623 */
624 if (linear)
625 return (EOPNOTSUPP);
626 #endif
627
628 /*
629 * Do the requested allocation.
630 */
631 #ifdef EXTENT_DEBUG
632 printf("mem: allocating from 0x%lx to 0x%lx\n", rstart, rend);
633 #endif
634 error = extent_alloc_subregion(CHIP_MEM_EXTENT(v), rstart, rend,
635 size, align, boundary,
636 EX_FAST | EX_NOWAIT | (CHIP_EX_MALLOC_SAFE(v) ? EX_MALLOCOK : 0),
637 &memaddr);
638 if (error) {
639 #ifdef EXTENT_DEBUG
640 printf("mem: allocation failed (%d)\n", error);
641 extent_print(CHIP_MEM_EXTENT(v));
642 #endif
643 return (error);
644 }
645
646 #ifdef EXTENT_DEBUG
647 printf("mem: allocated 0x%lx to 0x%lx\n", memaddr,
648 memaddr + size - 1);
649 #endif
650
651 error = __C(CHIP,_mem_translate)(v, memaddr, size, flags, &mbst);
652 if (error) {
653 (void) extent_free(CHIP_MEM_EXTENT(v), memaddr, size,
654 EX_NOWAIT | (CHIP_EX_MALLOC_SAFE(v) ? EX_MALLOCOK : 0));
655 return (error);
656 }
657
658 *addrp = memaddr;
659 if (flags & BUS_SPACE_MAP_CACHEABLE)
660 *bshp = MIPS_PHYS_TO_KSEG0(mbst.mbst_sys_start +
661 (memaddr - mbst.mbst_bus_start));
662 else
663 *bshp = MIPS_PHYS_TO_KSEG1(mbst.mbst_sys_start +
664 (memaddr - mbst.mbst_bus_start));
665
666 return (0);
667 }
668
669 void
670 __C(CHIP,_mem_free)(v, bsh, size)
671 void *v;
672 bus_space_handle_t bsh;
673 bus_size_t size;
674 {
675
676 /* Unmap does all we need to do. */
677 __C(CHIP,_mem_unmap)(v, bsh, size, 1);
678 }
679
680 void *
681 __C(CHIP,_mem_vaddr)(v, bsh)
682 void *v;
683 bus_space_handle_t bsh;
684 {
685
686 #if CHIP_ALIGN_STRIDE != 0
687 /* Linear mappings not possible. */
688 return (NULL);
689 #else
690 return ((void *)bsh);
691 #endif
692 }
693
694 paddr_t
695 __C(CHIP,_mem_mmap)(v, addr, off, prot, flags)
696 void *v;
697 bus_addr_t addr;
698 off_t off;
699 int prot;
700 int flags;
701 {
702 struct mips_bus_space_translation mbst;
703 int error;
704
705 /*
706 * Get the translation for this address.
707 */
708 error = __C(CHIP,_mem_translate)(v, addr, off + PAGE_SIZE, flags,
709 &mbst);
710 if (error)
711 return (-1);
712
713 return (mips_btop(mbst.mbst_sys_start +
714 (addr - mbst.mbst_bus_start) + off));
715 }
716
717 inline void
718 __C(CHIP,_mem_barrier)(v, h, o, l, f)
719 void *v;
720 bus_space_handle_t h;
721 bus_size_t o, l;
722 int f;
723 {
724
725 /* XXX XXX XXX */
726 if ((f & BUS_SPACE_BARRIER_WRITE) != 0)
727 wbflush();
728 }
729
730 inline u_int8_t
731 __C(CHIP,_mem_read_1)(v, memh, off)
732 void *v;
733 bus_space_handle_t memh;
734 bus_size_t off;
735 {
736 u_int8_t *ptr = (void *)(memh + (off << CHIP_ALIGN_STRIDE));
737
738 return (*ptr);
739 }
740
741 inline u_int16_t
742 __C(CHIP,_mem_read_2)(v, memh, off)
743 void *v;
744 bus_space_handle_t memh;
745 bus_size_t off;
746 {
747 #if CHIP_ALIGN_STRIDE >= 1
748 u_int16_t *ptr = (void *)(memh + (off << (CHIP_ALIGN_STRIDE - 1)));
749 #else
750 u_int16_t *ptr = (void *)(memh + off);
751 #endif
752
753 return (*ptr);
754 }
755
756 inline u_int32_t
757 __C(CHIP,_mem_read_4)(v, memh, off)
758 void *v;
759 bus_space_handle_t memh;
760 bus_size_t off;
761 {
762 #if CHIP_ALIGN_STRIDE >= 2
763 u_int32_t *ptr = (void *)(memh + (off << (CHIP_ALIGN_STRIDE - 2)));
764 #else
765 u_int32_t *ptr = (void *)(memh + off);
766 #endif
767
768 return (*ptr);
769 }
770
771 inline u_int64_t
772 __C(CHIP,_mem_read_8)(v, memh, off)
773 void *v;
774 bus_space_handle_t memh;
775 bus_size_t off;
776 {
777
778 /* XXX XXX XXX */
779 panic("%s not implemented", __S(__C(CHIP,_mem_read_8)));
780 }
781
782 #define CHIP_mem_read_multi_N(BYTES,TYPE) \
783 void \
784 __C(__C(CHIP,_mem_read_multi_),BYTES)(v, h, o, a, c) \
785 void *v; \
786 bus_space_handle_t h; \
787 bus_size_t o, c; \
788 TYPE *a; \
789 { \
790 \
791 while (c-- > 0) { \
792 __C(CHIP,_mem_barrier)(v, h, o, sizeof *a, \
793 BUS_SPACE_BARRIER_READ); \
794 *a++ = __C(__C(CHIP,_mem_read_),BYTES)(v, h, o); \
795 } \
796 }
797 CHIP_mem_read_multi_N(1,u_int8_t)
798 CHIP_mem_read_multi_N(2,u_int16_t)
799 CHIP_mem_read_multi_N(4,u_int32_t)
800 CHIP_mem_read_multi_N(8,u_int64_t)
801
802 #define CHIP_mem_read_region_N(BYTES,TYPE) \
803 void \
804 __C(__C(CHIP,_mem_read_region_),BYTES)(v, h, o, a, c) \
805 void *v; \
806 bus_space_handle_t h; \
807 bus_size_t o, c; \
808 TYPE *a; \
809 { \
810 \
811 while (c-- > 0) { \
812 *a++ = __C(__C(CHIP,_mem_read_),BYTES)(v, h, o); \
813 o += sizeof *a; \
814 } \
815 }
816 CHIP_mem_read_region_N(1,u_int8_t)
817 CHIP_mem_read_region_N(2,u_int16_t)
818 CHIP_mem_read_region_N(4,u_int32_t)
819 CHIP_mem_read_region_N(8,u_int64_t)
820
821 inline void
822 __C(CHIP,_mem_write_1)(v, memh, off, val)
823 void *v;
824 bus_space_handle_t memh;
825 bus_size_t off;
826 u_int8_t val;
827 {
828 u_int8_t *ptr = (void *)(memh + (off << CHIP_ALIGN_STRIDE));
829
830 *ptr = val;
831 }
832
833 inline void
834 __C(CHIP,_mem_write_2)(v, memh, off, val)
835 void *v;
836 bus_space_handle_t memh;
837 bus_size_t off;
838 u_int16_t val;
839 {
840 #if CHIP_ALIGN_STRIDE >= 1
841 u_int16_t *ptr = (void *)(memh + (off << (CHIP_ALIGN_STRIDE - 1)));
842 #else
843 u_int16_t *ptr = (void *)(memh + off);
844 #endif
845
846 *ptr = val;
847 }
848
849 inline void
850 __C(CHIP,_mem_write_4)(v, memh, off, val)
851 void *v;
852 bus_space_handle_t memh;
853 bus_size_t off;
854 u_int32_t val;
855 {
856 #if CHIP_ALIGN_STRIDE >= 2
857 u_int32_t *ptr = (void *)(memh + (off << (CHIP_ALIGN_STRIDE - 2)));
858 #else
859 u_int32_t *ptr = (void *)(memh + off);
860 #endif
861
862 *ptr = val;
863 }
864
865 inline void
866 __C(CHIP,_mem_write_8)(v, memh, off, val)
867 void *v;
868 bus_space_handle_t memh;
869 bus_size_t off;
870 u_int64_t val;
871 {
872
873 /* XXX XXX XXX */
874 panic("%s not implemented", __S(__C(CHIP,_mem_write_8)));
875 }
876
877 #define CHIP_mem_write_multi_N(BYTES,TYPE) \
878 void \
879 __C(__C(CHIP,_mem_write_multi_),BYTES)(v, h, o, a, c) \
880 void *v; \
881 bus_space_handle_t h; \
882 bus_size_t o, c; \
883 const TYPE *a; \
884 { \
885 \
886 while (c-- > 0) { \
887 __C(__C(CHIP,_mem_write_),BYTES)(v, h, o, *a++); \
888 __C(CHIP,_mem_barrier)(v, h, o, sizeof *a, \
889 BUS_SPACE_BARRIER_WRITE); \
890 } \
891 }
892 CHIP_mem_write_multi_N(1,u_int8_t)
893 CHIP_mem_write_multi_N(2,u_int16_t)
894 CHIP_mem_write_multi_N(4,u_int32_t)
895 CHIP_mem_write_multi_N(8,u_int64_t)
896
897 #define CHIP_mem_write_region_N(BYTES,TYPE) \
898 void \
899 __C(__C(CHIP,_mem_write_region_),BYTES)(v, h, o, a, c) \
900 void *v; \
901 bus_space_handle_t h; \
902 bus_size_t o, c; \
903 const TYPE *a; \
904 { \
905 \
906 while (c-- > 0) { \
907 __C(__C(CHIP,_mem_write_),BYTES)(v, h, o, *a++); \
908 o += sizeof *a; \
909 } \
910 }
911 CHIP_mem_write_region_N(1,u_int8_t)
912 CHIP_mem_write_region_N(2,u_int16_t)
913 CHIP_mem_write_region_N(4,u_int32_t)
914 CHIP_mem_write_region_N(8,u_int64_t)
915
916 #define CHIP_mem_set_multi_N(BYTES,TYPE) \
917 void \
918 __C(__C(CHIP,_mem_set_multi_),BYTES)(v, h, o, val, c) \
919 void *v; \
920 bus_space_handle_t h; \
921 bus_size_t o, c; \
922 TYPE val; \
923 { \
924 \
925 while (c-- > 0) { \
926 __C(__C(CHIP,_mem_write_),BYTES)(v, h, o, val); \
927 __C(CHIP,_mem_barrier)(v, h, o, sizeof val, \
928 BUS_SPACE_BARRIER_WRITE); \
929 } \
930 }
931 CHIP_mem_set_multi_N(1,u_int8_t)
932 CHIP_mem_set_multi_N(2,u_int16_t)
933 CHIP_mem_set_multi_N(4,u_int32_t)
934 CHIP_mem_set_multi_N(8,u_int64_t)
935
936 #define CHIP_mem_set_region_N(BYTES,TYPE) \
937 void \
938 __C(__C(CHIP,_mem_set_region_),BYTES)(v, h, o, val, c) \
939 void *v; \
940 bus_space_handle_t h; \
941 bus_size_t o, c; \
942 TYPE val; \
943 { \
944 \
945 while (c-- > 0) { \
946 __C(__C(CHIP,_mem_write_),BYTES)(v, h, o, val); \
947 o += sizeof val; \
948 } \
949 }
950 CHIP_mem_set_region_N(1,u_int8_t)
951 CHIP_mem_set_region_N(2,u_int16_t)
952 CHIP_mem_set_region_N(4,u_int32_t)
953 CHIP_mem_set_region_N(8,u_int64_t)
954
955 #define CHIP_mem_copy_region_N(BYTES) \
956 void \
957 __C(__C(CHIP,_mem_copy_region_),BYTES)(v, h1, o1, h2, o2, c) \
958 void *v; \
959 bus_space_handle_t h1, h2; \
960 bus_size_t o1, o2, c; \
961 { \
962 bus_size_t o; \
963 \
964 if ((h1 + o1) >= (h2 + o2)) { \
965 /* src after dest: copy forward */ \
966 for (o = 0; c != 0; c--, o += BYTES) \
967 __C(__C(CHIP,_mem_write_),BYTES)(v, h2, o2 + o, \
968 __C(__C(CHIP,_mem_read_),BYTES)(v, h1, o1 + o)); \
969 } else { \
970 /* dest after src: copy backwards */ \
971 for (o = (c - 1) * BYTES; c != 0; c--, o -= BYTES) \
972 __C(__C(CHIP,_mem_write_),BYTES)(v, h2, o2 + o, \
973 __C(__C(CHIP,_mem_read_),BYTES)(v, h1, o1 + o)); \
974 } \
975 }
976 CHIP_mem_copy_region_N(1)
977 CHIP_mem_copy_region_N(2)
978 CHIP_mem_copy_region_N(4)
979 CHIP_mem_copy_region_N(8)
NetBSD on the FriendlyARM MINI2440