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[netbsd-mini2440.git] / sys / arch / arc / jazz / fdc_jazzio.c
blob1c8ecae66df8d9d5a82c2ab32b056cc9adbf3a5a
1 /* $NetBSD: fdc_jazzio.c,v 1.13 2008/04/28 20:23:13 martin Exp $ */
2 /* $OpenBSD: fd.c,v 1.6 1998/10/03 21:18:57 millert Exp $ */
3 /* NetBSD: fd.c,v 1.78 1995/07/04 07:23:09 mycroft Exp */
5 /*-
6 * Copyright (c) 1998 The NetBSD Foundation, Inc.
7 * All rights reserved.
9 * This code is derived from software contributed to The NetBSD Foundation
10 * by Charles M. Hannum.
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
14 * are met:
15 * 1. Redistributions of source code must retain the above copyright
16 * notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright
18 * notice, this list of conditions and the following disclaimer in the
19 * documentation and/or other materials provided with the distribution.
21 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
23 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
24 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 * POSSIBILITY OF SUCH DAMAGE.
34 /*-
35 * Copyright (c) 1990 The Regents of the University of California.
36 * All rights reserved.
38 * This code is derived from software contributed to Berkeley by
39 * Don Ahn.
41 * Redistribution and use in source and binary forms, with or without
42 * modification, are permitted provided that the following conditions
43 * are met:
44 * 1. Redistributions of source code must retain the above copyright
45 * notice, this list of conditions and the following disclaimer.
46 * 2. Redistributions in binary form must reproduce the above copyright
47 * notice, this list of conditions and the following disclaimer in the
48 * documentation and/or other materials provided with the distribution.
49 * 3. Neither the name of the University nor the names of its contributors
50 * may be used to endorse or promote products derived from this software
51 * without specific prior written permission.
53 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
54 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
55 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
56 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
57 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
58 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
59 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
60 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
61 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
62 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
63 * SUCH DAMAGE.
65 * @(#)fd.c 7.4 (Berkeley) 5/25/91
68 #include <sys/cdefs.h>
69 __KERNEL_RCSID(0, "$NetBSD: fdc_jazzio.c,v 1.13 2008/04/28 20:23:13 martin Exp $");
71 #include <sys/param.h>
72 #include <sys/systm.h>
73 #include <sys/callout.h>
74 #include <sys/device.h>
76 #include <machine/autoconf.h>
77 #include <machine/bus.h>
79 #include <arc/jazz/jazzdmatlbreg.h>
80 #include <arc/jazz/fdreg.h>
81 #include <arc/jazz/fdcvar.h>
82 #include <arc/jazz/jazziovar.h>
83 #include <arc/jazz/dma.h>
85 /* controller driver configuration */
86 static int fdc_jazzio_probe(device_t, cfdata_t, void *);
87 static void fdc_jazzio_attach(device_t, device_t, void *);
89 /* MD DMA hook functions */
90 static void fdc_jazzio_dma_start(struct fdc_softc *, void *, size_t, int);
91 static void fdc_jazzio_dma_abort(struct fdc_softc *);
92 static void fdc_jazzio_dma_done(struct fdc_softc *);
94 /* software state, per controller */
95 struct fdc_jazzio_softc {
96 struct fdc_softc sc_fdc; /* base fdc device */
98 bus_space_handle_t sc_baseioh; /* base I/O handle */
99 bus_space_handle_t sc_dmaioh; /* DMA I/O handle */
101 bus_dma_tag_t sc_dmat; /* bus_dma tag */
102 bus_dmamap_t sc_dmamap; /* bus_dma map */
103 int sc_datain; /* data direction */
106 CFATTACH_DECL_NEW(fdc_jazzio, sizeof(struct fdc_jazzio_softc),
107 fdc_jazzio_probe, fdc_jazzio_attach, NULL, NULL);
109 #define FDC_NPORT 6
110 #define FDC_OFFSET 2 /* Should we use bus_space_subregion() or not? */
112 static int
113 fdc_jazzio_probe(device_t parent, cfdata_t cf, void *aux)
115 struct jazzio_attach_args *ja = aux;
116 bus_space_tag_t iot;
117 bus_space_handle_t base_ioh, ioh;
118 int rv;
120 if (strcmp(ja->ja_name, "I82077") != 0)
121 return 0;
123 iot = ja->ja_bust;
124 rv = 0;
126 /* Map the I/O space. */
127 if (bus_space_map(iot, ja->ja_addr,
128 FDC_OFFSET + FDC_NPORT, 0, &base_ioh))
129 return 0;
131 if (bus_space_subregion(iot, base_ioh, FDC_OFFSET, FDC_NPORT, &ioh))
132 goto out;
134 /* reset */
135 bus_space_write_1(iot, ioh, FDOUT, 0);
136 delay(100);
137 bus_space_write_1(iot, ioh, FDOUT, FDO_FRST);
139 /* see if it can handle a command */
140 if (out_fdc(iot, ioh, NE7CMD_SPECIFY) < 0)
141 goto out;
142 out_fdc(iot, ioh, 0xdf); /* XXX */
143 out_fdc(iot, ioh, 2); /* XXX */
145 rv = 1;
147 out:
148 bus_space_unmap(iot, base_ioh, FDC_OFFSET + FDC_NPORT);
149 return rv;
152 static void
153 fdc_jazzio_attach(device_t parent, device_t self, void *aux)
155 struct fdc_jazzio_softc *jsc = device_private(self);
156 struct fdc_softc *fdc = &jsc->sc_fdc;
157 struct jazzio_attach_args *ja = aux;
159 fdc->sc_dev = self;
160 fdc->sc_iot = ja->ja_bust;
162 fdc->sc_maxiosize = MAXPHYS;
163 fdc->sc_dma_start = fdc_jazzio_dma_start;
164 fdc->sc_dma_abort = fdc_jazzio_dma_abort;
165 fdc->sc_dma_done = fdc_jazzio_dma_done;
167 jsc->sc_dmat = ja->ja_dmat;
169 if (bus_space_map(fdc->sc_iot, ja->ja_addr,
170 FDC_OFFSET + FDC_NPORT, 0, &jsc->sc_baseioh)) {
171 aprint_error(": unable to map I/O space\n");
172 return;
175 if (bus_space_subregion(fdc->sc_iot, jsc->sc_baseioh,
176 FDC_OFFSET, FDC_NPORT, &fdc->sc_ioh)) {
177 aprint_error(": unable to subregion I/O space\n");
178 goto out_unmap1;
181 if (bus_space_map(fdc->sc_iot, jazzio_conf->jc_fdcdmareg,
182 R4030_DMA_RANGE, 0, &jsc->sc_dmaioh)) {
183 aprint_error(": unable to map DMA I/O space\n");
184 goto out_unmap1;
187 if (bus_dmamap_create(jsc->sc_dmat, MAXPHYS, 1, MAXPHYS, 0,
188 BUS_DMA_ALLOCNOW|BUS_DMA_NOWAIT, &jsc->sc_dmamap)) {
189 aprint_error(": unable to create DMA map\n");
190 goto out_unmap2;
193 aprint_normal("\n");
195 jazzio_intr_establish(ja->ja_intr, fdcintr, fdc);
197 fdcattach(fdc);
198 return;
200 out_unmap2:
201 bus_space_unmap(fdc->sc_iot, jsc->sc_dmaioh, R4030_DMA_RANGE);
202 out_unmap1:
203 bus_space_unmap(fdc->sc_iot, jsc->sc_baseioh, FDC_OFFSET + FDC_NPORT);
206 static void
207 fdc_jazzio_dma_start(struct fdc_softc *fdc, void *addr, size_t size,
208 int datain)
210 struct fdc_jazzio_softc *jsc = (struct fdc_jazzio_softc *)fdc;
212 /* halt DMA */
213 bus_space_write_4(fdc->sc_iot, jsc->sc_dmaioh, R4030_DMA_ENAB, 0);
214 bus_space_write_4(fdc->sc_iot, jsc->sc_dmaioh, R4030_DMA_MODE, 0);
216 jsc->sc_datain = datain;
218 bus_dmamap_load(jsc->sc_dmat, jsc->sc_dmamap, addr, size, NULL,
219 BUS_DMA_NOWAIT | BUS_DMA_STREAMING |
220 (datain ? BUS_DMA_READ : BUS_DMA_WRITE));
221 bus_dmamap_sync(jsc->sc_dmat, jsc->sc_dmamap,
222 0, jsc->sc_dmamap->dm_mapsize,
223 datain ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
225 /* load new transfer parameters */
226 bus_space_write_4(fdc->sc_iot, jsc->sc_dmaioh,
227 R4030_DMA_ADDR, jsc->sc_dmamap->dm_segs[0].ds_addr);
228 bus_space_write_4(fdc->sc_iot, jsc->sc_dmaioh,
229 R4030_DMA_COUNT, jsc->sc_dmamap->dm_segs[0].ds_len);
230 bus_space_write_4(fdc->sc_iot, jsc->sc_dmaioh,
231 R4030_DMA_MODE, R4030_DMA_MODE_160NS | R4030_DMA_MODE_8);
233 /* start DMA */
234 bus_space_write_4(fdc->sc_iot, jsc->sc_dmaioh,
235 R4030_DMA_ENAB, R4030_DMA_ENAB_RUN |
236 (datain ? R4030_DMA_ENAB_READ : R4030_DMA_ENAB_WRITE));
239 static void
240 fdc_jazzio_dma_abort(struct fdc_softc *fdc)
242 struct fdc_jazzio_softc *jsc = (struct fdc_jazzio_softc *)fdc;
244 /* halt DMA */
245 bus_space_write_4(fdc->sc_iot, jsc->sc_dmaioh, R4030_DMA_ENAB, 0);
246 bus_space_write_4(fdc->sc_iot, jsc->sc_dmaioh, R4030_DMA_MODE, 0);
249 static void
250 fdc_jazzio_dma_done(struct fdc_softc *fdc)
252 struct fdc_jazzio_softc *jsc = (struct fdc_jazzio_softc *)fdc;
254 /* halt DMA */
255 bus_space_write_4(fdc->sc_iot, jsc->sc_dmaioh, R4030_DMA_COUNT, 0);
256 bus_space_write_4(fdc->sc_iot, jsc->sc_dmaioh, R4030_DMA_ENAB, 0);
257 bus_space_write_4(fdc->sc_iot, jsc->sc_dmaioh, R4030_DMA_MODE, 0);
259 bus_dmamap_sync(jsc->sc_dmat, jsc->sc_dmamap,
260 0, jsc->sc_dmamap->dm_mapsize,
261 jsc->sc_datain ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
262 bus_dmamap_unload(jsc->sc_dmat, jsc->sc_dmamap);