sys/arch/arm/at91/at91sam9261bus.c

   1 /*      $Id: at91sam9261bus.c,v 1.2 2008/07/03 01:15:38 matt Exp $      */
   2
   3 #include <sys/cdefs.h>
   4 __KERNEL_RCSID(0, "$NetBSD$");
   5
   6 #include <sys/types.h>
   7 #include <sys/param.h>
   8 #include <sys/systm.h>
   9 #include <sys/kernel.h>
  10 #include <sys/time.h>
  11 #include <sys/device.h>
  12 #include <uvm/uvm_extern.h>
  13
  14 #include <arm/at91/at91sam9261busvar.h>
  15
  16 const struct at91bus_machdep at91sam9261bus = {
  17         at91sam9261bus_init,
  18         at91sam9261bus_attach_cn,
  19         at91sam9261bus_devmap,
  20
  21         /* clocking support: */
  22         at91sam9261bus_peripheral_clock,
  23
  24         /* PIO support: */
  25         at91sam9261bus_pio_port,
  26         at91sam9261bus_gpio_mask,
  27
  28         /* interrupt handling support: */
  29         at91sam9261bus_intr_init,
  30         at91sam9261bus_intr_establish,
  31         at91sam9261bus_intr_disestablish,
  32         at91sam9261bus_intr_poll,
  33         at91sam9261bus_intr_dispatch,
  34
  35         /* configuration */
  36         at91sam9261bus_peripheral_name,
  37         at91sam9261bus_search_peripherals
  38 };
  39
  40 void at91sam9261bus_init(struct at91bus_clocks *clocks)
  41 {
  42         pmap_devmap_register(at91_devmap());
  43         at91pmc_get_clocks(clocks);
  44 }
  45
  46 const struct pmap_devmap *at91sam9261bus_devmap(void)
  47 {
  48         static const struct pmap_devmap devmap[] = {
  49             {
  50                 AT91SAM9261_APB_VBASE,
  51                 AT91SAM9261_APB_HWBASE,
  52                 AT91SAM9261_APB_SIZE,
  53                 VM_PROT_READ | VM_PROT_WRITE,
  54                 PTE_NOCACHE
  55             },
  56
  57             {
  58                 0,
  59                 0,
  60                 0,
  61                 0,
  62                 0
  63             }
  64         };
  65
  66         return devmap;
  67 }
  68
  69 void at91sam9261bus_peripheral_clock(int pid, int enable)
  70 {
  71         switch (pid) {
  72         case PID_UHP:
  73                 if (enable)
  74                         PMCREG(PMC_SCER) = PMC_SCSR_UHP;
  75                 else
  76                         PMCREG(PMC_SCDR) = PMC_SCSR_UHP;
  77                 break;
  78         }
  79         at91pmc_peripheral_clock(pid, enable);
  80 }
  81
  82 at91pio_port at91sam9261bus_pio_port(int pid)
  83 {
  84         switch (pid) {
  85         case PID_PIOA:  return AT91_PIOA;
  86         case PID_PIOB:  return AT91_PIOB;
  87         case PID_PIOC:  return AT91_PIOC;
  88         default:                panic("%s: pid %d not valid", __FUNCTION__, pid);
  89         }
  90
  91 }
  92
  93 uint32_t at91sam9261bus_gpio_mask(int pid)
  94 {
  95         return 0xFFFFFFFFUL;
  96 }
  97
  98 const char *at91sam9261bus_peripheral_name(int pid)
  99 {
 100         switch (pid) {
 101         case PID_FIQ:   return "FIQ";
 102         case PID_SYSIRQ:return "SYS";
 103         case PID_PIOA:  return "PIOA";
 104         case PID_PIOB:  return "PIOB";
 105         case PID_PIOC:  return "PIOC";
 106         case PID_US0:   return "USART0";
 107         case PID_US1:   return "USART1";
 108         case PID_US2:   return "USART2";
 109         case PID_MCI:   return "MCI";
 110         case PID_UDP:   return "UDP";
 111         case PID_TWI:   return "TWI";
 112         case PID_SPI0:  return "SPI0";
 113         case PID_SPI1:  return "SPI1";
 114         case PID_SSC0:  return "SSC0";
 115         case PID_SSC1:  return "SSC1";
 116         case PID_SSC2:  return "SSC2";
 117         case PID_TC0:   return "TC0";
 118         case PID_TC1:   return "TC1";
 119         case PID_TC2:   return "TC2";
 120         case PID_UHP:   return "UHP";
 121         case PID_LCDC:  return "LCDC";
 122         case PID_IRQ0:  return "IRQ0";
 123         case PID_IRQ1:  return "IRQ1";
 124         case PID_IRQ2:  return "IRQ2";
 125         default:        panic("%s: invalid pid %d", __FUNCTION__, pid);
 126         }
 127 }
 128
 129 void at91sam9261bus_search_peripherals(device_t self,
 130                                        device_t (*found_func)(device_t, bus_addr_t, int))
 131 {
 132         static const struct {
 133                 bus_addr_t      addr;
 134                 int             pid;
 135         } table[] = {
 136                 {AT91SAM9261_PMC_BASE,          -1},
 137                 {AT91SAM9261_AIC_BASE,          -1},
 138                 {AT91SAM9261_PIT_BASE,          PID_SYSIRQ},
 139                 {AT91SAM9261_TC0_BASE,          PID_TC0},
 140                 {AT91SAM9261_TC1_BASE,          PID_TC1},
 141                 {AT91SAM9261_TC2_BASE,          PID_TC2},
 142                 {AT91SAM9261_DBGU_BASE,         PID_SYSIRQ},
 143                 {AT91SAM9261_PIOA_BASE,         PID_PIOA},
 144                 {AT91SAM9261_PIOB_BASE,         PID_PIOB},
 145                 {AT91SAM9261_PIOC_BASE,         PID_PIOC},
 146                 {AT91SAM9261_USART0_BASE,       PID_US0},
 147                 {AT91SAM9261_USART1_BASE,       PID_US1},
 148                 {AT91SAM9261_USART2_BASE,       PID_US2},
 149                 {AT91SAM9261_SSC0_BASE,         PID_SSC0},
 150                 {AT91SAM9261_SSC1_BASE,         PID_SSC1},
 151                 {AT91SAM9261_SSC2_BASE,         PID_SSC2},
 152                 {AT91SAM9261_TWI_BASE,          PID_TWI},
 153                 {AT91SAM9261_SPI0_BASE,         PID_SPI0},
 154                 {AT91SAM9261_SPI1_BASE,         PID_SPI1},
 155                 {AT91SAM9261_UHP_BASE,          PID_UHP},
 156                 {AT91SAM9261_LCD_BASE,          PID_LCDC},
 157                 {AT91SAM9261_UDP_BASE,          PID_UDP},
 158                 {AT91SAM9261_MCI_BASE,          PID_MCI},
 159                 {0, 0}
 160         };
 161         int i;
 162
 163         for (i = 0; table[i].addr; i++)
 164                 (*found_func)(self, table[i].addr, table[i].pid);
 165 }
 166