No empty .Rs/.Re
[netbsd-mini2440.git] / sys / arch / arm / footbridge / footbridge_io.c
blob410616a4d6bf3a8307fbe2ba8d74033b4bae3e59
1 /* $NetBSD: footbridge_io.c,v 1.15 2009/03/14 21:04:05 dsl Exp $ */
3 /*
4 * Copyright (c) 1997 Causality Limited
5 * Copyright (c) 1997 Mark Brinicombe.
6 * All rights reserved.
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. All advertising materials mentioning features or use of this software
17 * must display the following acknowledgement:
18 * This product includes software developed by Mark Brinicombe
19 * for the NetBSD Project.
20 * 4. The name of the company nor the name of the author may be used to
21 * endorse or promote products derived from this software without specific
22 * prior written permission.
24 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
25 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
26 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
27 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
28 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
29 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 * SUCH DAMAGE.
38 * bus_space I/O functions for footbridge
41 #include <sys/cdefs.h>
42 __KERNEL_RCSID(0, "$NetBSD: footbridge_io.c,v 1.15 2009/03/14 21:04:05 dsl Exp $");
44 #include <sys/param.h>
45 #include <sys/systm.h>
46 #include <machine/bus.h>
47 #include <arm/footbridge/footbridge.h>
48 #include <arm/footbridge/dc21285mem.h>
49 #include <uvm/uvm_extern.h>
51 /* Proto types for all the bus_space structure functions */
53 bs_protos(footbridge);
54 bs_protos(generic);
55 bs_protos(generic_armv4);
56 bs_protos(bs_notimpl);
57 bs_map_proto(footbridge_mem);
58 bs_unmap_proto(footbridge_mem);
59 bs_mmap_proto(footbridge_mem);
61 /* Declare the footbridge bus space tag */
63 struct bus_space footbridge_bs_tag = {
64 /* cookie */
65 (void *) 0, /* Base address */
67 /* mapping/unmapping */
68 footbridge_bs_map,
69 footbridge_bs_unmap,
70 footbridge_bs_subregion,
72 /* allocation/deallocation */
73 footbridge_bs_alloc,
74 footbridge_bs_free,
76 /* get kernel virtual address */
77 footbridge_bs_vaddr,
79 /* Mmap bus space for user */
80 bs_notimpl_bs_mmap,
82 /* barrier */
83 footbridge_bs_barrier,
85 /* read (single) */
86 generic_bs_r_1,
87 generic_armv4_bs_r_2,
88 generic_bs_r_4,
89 bs_notimpl_bs_r_8,
91 /* read multiple */
92 generic_bs_rm_1,
93 generic_armv4_bs_rm_2,
94 generic_bs_rm_4,
95 bs_notimpl_bs_rm_8,
97 /* read region */
98 bs_notimpl_bs_rr_1,
99 generic_armv4_bs_rr_2,
100 generic_bs_rr_4,
101 bs_notimpl_bs_rr_8,
103 /* write (single) */
104 generic_bs_w_1,
105 generic_armv4_bs_w_2,
106 generic_bs_w_4,
107 bs_notimpl_bs_w_8,
109 /* write multiple */
110 generic_bs_wm_1,
111 generic_armv4_bs_wm_2,
112 generic_bs_wm_4,
113 bs_notimpl_bs_wm_8,
115 /* write region */
116 bs_notimpl_bs_wr_1,
117 generic_armv4_bs_wr_2,
118 generic_bs_wr_4,
119 bs_notimpl_bs_wr_8,
121 /* set multiple */
122 bs_notimpl_bs_sm_1,
123 bs_notimpl_bs_sm_2,
124 bs_notimpl_bs_sm_4,
125 bs_notimpl_bs_sm_8,
127 /* set region */
128 bs_notimpl_bs_sr_1,
129 generic_armv4_bs_sr_2,
130 bs_notimpl_bs_sr_4,
131 bs_notimpl_bs_sr_8,
133 /* copy */
134 bs_notimpl_bs_c_1,
135 generic_armv4_bs_c_2,
136 bs_notimpl_bs_c_4,
137 bs_notimpl_bs_c_8,
140 void footbridge_create_io_bs_tag(t, cookie)
141 struct bus_space *t;
142 void *cookie;
144 *t = footbridge_bs_tag;
145 t->bs_cookie = cookie;
148 void footbridge_create_mem_bs_tag(t, cookie)
149 struct bus_space *t;
150 void *cookie;
152 *t = footbridge_bs_tag;
153 t->bs_map = footbridge_mem_bs_map;
154 t->bs_unmap = footbridge_mem_bs_unmap;
155 t->bs_mmap = footbridge_mem_bs_mmap;
156 t->bs_cookie = cookie;
159 /* bus space functions */
162 footbridge_bs_map(void *t, bus_addr_t bpa, bus_size_t size, int cacheable, bus_space_handle_t *bshp)
165 * The whole 64K of PCI space is always completely mapped during
166 * boot.
168 * Eventually this function will do the mapping check overlapping /
169 * multiple mappings.
172 /* The cookie is the base address for the I/O area */
173 *bshp = bpa + (bus_addr_t)t;
174 return(0);
178 footbridge_mem_bs_map(void *t, bus_addr_t bpa, bus_size_t size, int flags, bus_space_handle_t *bshp)
180 bus_addr_t startpa, endpa, pa;
181 vaddr_t va;
183 /* Round the allocation to page boundries */
184 startpa = trunc_page(bpa);
185 endpa = round_page(bpa + size);
188 * Check for mappings below 1MB as we have this space already
189 * mapped. In practice it is only the VGA hole that takes
190 * advantage of this.
192 if (endpa < DC21285_PCI_ISA_MEM_VSIZE) {
193 /* Store the bus space handle */
194 *bshp = DC21285_PCI_ISA_MEM_VBASE + bpa;
195 return 0;
199 * Eventually this function will do the mapping check for overlapping /
200 * multiple mappings
203 va = uvm_km_alloc(kernel_map, endpa - startpa, 0,
204 UVM_KMF_VAONLY | UVM_KMF_NOWAIT);
205 if (va == 0)
206 return ENOMEM;
208 /* Store the bus space handle */
209 *bshp = va + (bpa & PGOFSET);
211 /* Now map the pages */
212 /* The cookie is the physical base address for the I/O area */
213 for (pa = startpa; pa < endpa; pa+=PAGE_SIZE, va += PAGE_SIZE)
215 pmap_enter(pmap_kernel(), va, (bus_addr_t)t + pa, VM_PROT_READ | VM_PROT_WRITE,
216 VM_PROT_READ | VM_PROT_WRITE| PMAP_WIRED);
217 if ((flags & BUS_SPACE_MAP_CACHEABLE) == 0) {
218 pt_entry_t *pte;
219 pte = vtopte(va);
220 *pte &= ~L2_S_CACHE_MASK;
221 PTE_SYNC(pte);
224 pmap_update(pmap_kernel());
226 /* if (bpa >= DC21285_PCI_MEM_VSIZE && bpa != DC21285_ARMCSR_VBASE)
227 panic("footbridge_bs_map: Address out of range (%08lx)", bpa);
229 return(0);
233 footbridge_bs_alloc(t, rstart, rend, size, alignment, boundary, cacheable,
234 bpap, bshp)
235 void *t;
236 bus_addr_t rstart, rend;
237 bus_size_t size, alignment, boundary;
238 int cacheable;
239 bus_addr_t *bpap;
240 bus_space_handle_t *bshp;
242 panic("footbridge_alloc(): Help!");
246 void
247 footbridge_bs_unmap(void *t, bus_space_handle_t bsh, bus_size_t size)
250 * Temporary implementation
254 void
255 footbridge_mem_bs_unmap(void *t, bus_space_handle_t bsh, bus_size_t size)
257 vaddr_t startva, endva;
260 * Check for mappings below 1MB as we have this space permenantly
261 * mapped. In practice it is only the VGA hole that takes
262 * advantage of this.
264 if (bsh >= DC21285_PCI_ISA_MEM_VBASE
265 && bsh < (DC21285_PCI_ISA_MEM_VBASE + DC21285_PCI_ISA_MEM_VSIZE)) {
266 return;
269 startva = trunc_page(bsh);
270 endva = round_page(bsh + size);
272 pmap_remove(pmap_kernel(), startva, endva);
273 pmap_update(pmap_kernel());
274 uvm_km_free(kernel_map, startva, endva - startva, UVM_KMF_VAONLY);
277 void
278 footbridge_bs_free(void *t, bus_space_handle_t bsh, bus_size_t size)
281 panic("footbridge_free(): Help!");
282 /* footbridge_bs_unmap() does all that we need to do. */
283 /* footbridge_bs_unmap(t, bsh, size);*/
287 footbridge_bs_subregion(void *t, bus_space_handle_t bsh, bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp)
290 *nbshp = bsh + (offset << ((int)t));
291 return (0);
294 void *
295 footbridge_bs_vaddr(void *t, bus_space_handle_t bsh)
298 return ((void *)bsh);
301 void
302 footbridge_bs_barrier(void *t, bus_space_handle_t bsh, bus_size_t offset, bus_size_t len, int flags)
307 paddr_t
308 footbridge_mem_bs_mmap(void *t, bus_addr_t addr, off_t offset,
309 int prot, int flags)
311 paddr_t pa;
313 if (addr >= DC21285_PCI_MEM_SIZE
314 || offset < 0
315 || offset >= DC21285_PCI_MEM_SIZE
316 || addr >= DC21285_PCI_MEM_SIZE - offset)
317 return -1;
319 pa = DC21285_PCI_MEM_BASE + addr + offset;
321 return arm_btop(pa);