sys/arch/arm/footbridge/footbridge_pci.c

   1 /*      $NetBSD: footbridge_pci.c,v 1.17 2009/03/14 15:36:02 dsl Exp $  */
   2
   3 /*
   4  * Copyright (c) 1997,1998 Mark Brinicombe.
   5  * Copyright (c) 1997,1998 Causality Limited
   6  * All rights reserved.
   7  *
   8  * Redistribution and use in source and binary forms, with or without
   9  * modification, are permitted provided that the following conditions
  10  * are met:
  11  * 1. Redistributions of source code must retain the above copyright
  12  *    notice, this list of conditions and the following disclaimer.
  13  * 2. Redistributions in binary form must reproduce the above copyright
  14  *    notice, this list of conditions and the following disclaimer in the
  15  *    documentation and/or other materials provided with the distribution.
  16  * 3. All advertising materials mentioning features or use of this software
  17  *    must display the following acknowledgement:
  18  *      This product includes software developed by Mark Brinicombe
  19  *      for the NetBSD Project.
  20  * 4. The name of the company nor the name of the author may be used to
  21  *    endorse or promote products derived from this software without specific
  22  *    prior written permission.
  23  *
  24  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
  25  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  26  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  27  * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
  28  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  29  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  30  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  31  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  32  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  33  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  34  * SUCH DAMAGE.
  35  */
  36
  37 #include <sys/cdefs.h>
  38 __KERNEL_RCSID(0, "$NetBSD: footbridge_pci.c,v 1.17 2009/03/14 15:36:02 dsl Exp $");
  39
  40 #include <sys/param.h>
  41 #include <sys/systm.h>
  42 #include <sys/conf.h>
  43 #include <sys/malloc.h>
  44 #include <sys/device.h>
  45
  46 #define _ARM32_BUS_DMA_PRIVATE
  47 #include <machine/bus.h>
  48 #include <machine/intr.h>
  49
  50 #include <dev/pci/pcireg.h>
  51 #include <dev/pci/pcivar.h>
  52
  53 #include <arm/footbridge/dc21285reg.h>
  54 #include <arm/footbridge/dc21285mem.h>
  55
  56 #include "isa.h"
  57 #if NISA > 0
  58 #include <dev/isa/isavar.h>
  59 #endif
  60
  61 void            footbridge_pci_attach_hook(struct device *,
  62                     struct device *, struct pcibus_attach_args *);
  63 int             footbridge_pci_bus_maxdevs(void *, int);
  64 pcitag_t        footbridge_pci_make_tag(void *, int, int, int);
  65 void            footbridge_pci_decompose_tag(void *, pcitag_t, int *,
  66                     int *, int *);
  67 pcireg_t        footbridge_pci_conf_read(void *, pcitag_t, int);
  68 void            footbridge_pci_conf_write(void *, pcitag_t, int,
  69                     pcireg_t);
  70 int             footbridge_pci_intr_map(struct pci_attach_args *,
  71                     pci_intr_handle_t *);
  72 const char      *footbridge_pci_intr_string(void *, pci_intr_handle_t);
  73 void            *footbridge_pci_intr_establish(void *, pci_intr_handle_t,
  74                     int, int (*)(void *), void *);
  75 void            footbridge_pci_intr_disestablish(void *, void *);
  76 const struct evcnt *footbridge_pci_intr_evcnt(void *, pci_intr_handle_t);
  77
  78 struct arm32_pci_chipset footbridge_pci_chipset = {
  79         NULL,   /* conf_v */
  80 #ifdef netwinder
  81         netwinder_pci_attach_hook,
  82 #else
  83         footbridge_pci_attach_hook,
  84 #endif
  85         footbridge_pci_bus_maxdevs,
  86         footbridge_pci_make_tag,
  87         footbridge_pci_decompose_tag,
  88         footbridge_pci_conf_read,
  89         footbridge_pci_conf_write,
  90         NULL,   /* intr_v */
  91         footbridge_pci_intr_map,
  92         footbridge_pci_intr_string,
  93         footbridge_pci_intr_evcnt,
  94         footbridge_pci_intr_establish,
  95         footbridge_pci_intr_disestablish
  96 };
  97
  98 struct arm32_dma_range footbridge_dma_ranges[1];
  99
 100 /*
 101  * PCI doesn't have any special needs; just use the generic versions
 102  * of these functions.
 103  */
 104 struct arm32_bus_dma_tag footbridge_pci_bus_dma_tag = {
 105         footbridge_dma_ranges,
 106         1,
 107         NULL,
 108         _bus_dmamap_create,
 109         _bus_dmamap_destroy,
 110         _bus_dmamap_load,
 111         _bus_dmamap_load_mbuf,
 112         _bus_dmamap_load_uio,
 113         _bus_dmamap_load_raw,
 114         _bus_dmamap_unload,
 115         _bus_dmamap_sync,       /* pre */
 116         NULL,                   /* post */
 117         _bus_dmamem_alloc,
 118         _bus_dmamem_free,
 119         _bus_dmamem_map,
 120         _bus_dmamem_unmap,
 121         _bus_dmamem_mmap,
 122 };
 123
 124 /*
 125  * Currently we only support 12 devices as we select directly in the
 126  * type 0 config cycle
 127  * (See conf_{read,write} for more detail
 128  */
 129 #define MAX_PCI_DEVICES 21
 130
 131 /*static int
 132 pci_intr(void *arg)
 133 {
 134         printf("pci int %x\n", (int)arg);
 135         return(0);
 136 }*/
 137
 138
 139 void
 140 footbridge_pci_attach_hook(struct device *parent, struct device *self, struct pcibus_attach_args *pba)
 141 {
 142 #ifdef PCI_DEBUG
 143         printf("footbridge_pci_attach_hook()\n");
 144 #endif
 145
 146 /*      intr_claim(18, IPL_NONE, "pci int 0", pci_intr, (void *)0x10000);
 147         intr_claim(8, IPL_NONE, "pci int 1", pci_intr, (void *)0x10001);
 148         intr_claim(9, IPL_NONE, "pci int 2", pci_intr, (void *)0x10002);
 149         intr_claim(11, IPL_NONE, "pci int 3", pci_intr, (void *)0x10003);*/
 150 }
 151
 152 int
 153 footbridge_pci_bus_maxdevs(void *pcv, int busno)
 154 {
 155 #ifdef PCI_DEBUG
 156         printf("footbridge_pci_bus_maxdevs(pcv=%p, busno=%d)\n", pcv, busno);
 157 #endif
 158         return(MAX_PCI_DEVICES);
 159 }
 160
 161 pcitag_t
 162 footbridge_pci_make_tag(void *pcv, int bus, int device, int function)
 163 {
 164 #ifdef PCI_DEBUG
 165         printf("footbridge_pci_make_tag(pcv=%p, bus=%d, device=%d, function=%d)\n",
 166             pcv, bus, device, function);
 167 #endif
 168         return ((bus << 16) | (device << 11) | (function << 8));
 169 }
 170
 171 void
 172 footbridge_pci_decompose_tag(void *pcv, pcitag_t tag, int *busp, int *devicep, int *functionp)
 173 {
 174 #ifdef PCI_DEBUG
 175         printf("footbridge_pci_decompose_tag(pcv=%p, tag=0x%08x, bp=%p, dp=%p, fp=%p)\n",
 176             pcv, (uint32_t)tag, busp, devicep, functionp);
 177 #endif
 178
 179         if (busp != NULL)
 180                 *busp = (tag >> 16) & 0xff;
 181         if (devicep != NULL)
 182                 *devicep = (tag >> 11) & 0x1f;
 183         if (functionp != NULL)
 184                 *functionp = (tag >> 8) & 0x7;
 185 }
 186
 187 pcireg_t
 188 footbridge_pci_conf_read(void *pcv, pcitag_t tag, int reg)
 189 {
 190         int bus, device, function;
 191         u_int address;
 192         pcireg_t data;
 193
 194         footbridge_pci_decompose_tag(pcv, tag, &bus, &device, &function);
 195         if (bus == 0)
 196                 /* Limited to 12 devices or we exceed type 0 config space */
 197                 address = DC21285_PCI_TYPE_0_CONFIG_VBASE | (3 << 22) | (device << 11);
 198         else
 199                 address = DC21285_PCI_TYPE_1_CONFIG_VBASE | (device << 11) |
 200                     (bus << 16);
 201
 202         address |= (function << 8) | reg;
 203
 204         data = *((unsigned int *)address);
 205 #ifdef PCI_DEBUG
 206         printf("footbridge_pci_conf_read(pcv=%p tag=0x%08x reg=0x%02x)=0x%08x\n",
 207             pcv, (uint32_t)tag, reg, data);
 208 #endif
 209         return(data);
 210 }
 211
 212 void
 213 footbridge_pci_conf_write(void *pcv, pcitag_t tag, int reg, pcireg_t data)
 214 {
 215         int bus, device, function;
 216         u_int address;
 217
 218         footbridge_pci_decompose_tag(pcv, tag, &bus, &device, &function);
 219         if (bus == 0)
 220                 address = DC21285_PCI_TYPE_0_CONFIG_VBASE | (3 << 22) | (device << 11);
 221         else
 222                 address = DC21285_PCI_TYPE_1_CONFIG_VBASE | (device << 11) |
 223                     (bus << 16);
 224
 225         address |= (function << 8) | reg;
 226
 227 #ifdef PCI_DEBUG
 228         printf("footbridge_pci_conf_write(pcv=%p tag=0x%08x reg=0x%02x, 0x%08x)\n",
 229             pcv, (uint32_t)tag, reg, data);
 230 #endif
 231
 232         *((unsigned int *)address) = data;
 233 }
 234
 235 int
 236 footbridge_pci_intr_map(struct pci_attach_args *pa, pci_intr_handle_t *ihp)
 237 {
 238         int pin = pa->pa_intrpin, line = pa->pa_intrline;
 239         int intr = -1;
 240
 241 #ifdef PCI_DEBUG
 242         void *pcv = pa->pa_pc;
 243         pcitag_t intrtag = pa->pa_intrtag;
 244         int bus, device, function;
 245
 246         footbridge_pci_decompose_tag(pcv, intrtag, &bus, &device, &function);
 247         printf("footbridge_pci_intr_map: pcv=%p, tag=%08x pin=%d line=%d dev=%d\n",
 248             pcv, (uint32_t)intrtag, pin, line, device);
 249 #endif
 250
 251         /*
 252          * Only the line is used to map the interrupt.
 253          * The firmware is expected to setup up the interrupt
 254          * line as seen from the CPU
 255          * This means the firmware deals with the interrupt rotation
 256          * between slots etc.
 257          *
 258          * Perhaps the firmware should also to the final mapping
 259          * to a 21285 interrupt bit so the code below would be
 260          * completely MI.
 261          */
 262
 263         switch (line) {
 264         case PCI_INTERRUPT_PIN_NONE:
 265         case 0xff:
 266                 /* No IRQ */
 267                 printf("pci_intr_map: no mapping for pin %c\n", '@' + pin);
 268                 *ihp = -1;
 269                 return(1);
 270                 break;
 271 #ifdef cats
 272         /* This is machine dependant and needs to be moved */
 273         case PCI_INTERRUPT_PIN_A:
 274                 intr = IRQ_PCI;
 275                 break;
 276         case PCI_INTERRUPT_PIN_B:
 277                 intr = IRQ_IN_L0;
 278                 break;
 279         case PCI_INTERRUPT_PIN_C:
 280                 intr = IRQ_IN_L1;
 281                 break;
 282         case PCI_INTERRUPT_PIN_D:
 283                 intr = IRQ_IN_L3;
 284                 break;
 285 #endif
 286         default:
 287                 /*
 288                  * Experimental firmware feature ...
 289                  *
 290                  * If the interrupt line is in the range 0x80 to 0x8F
 291                  * then the lower 4 bits indicate the ISA interrupt
 292                  * bit that should be used.
 293                  * If the interrupt line is in the range 0x40 to 0x5F
 294                  * then the lower 5 bits indicate the actual DC21285
 295                  * interrupt bit that should be used.
 296                  */
 297
 298                 if (line >= 0x40 && line <= 0x5f)
 299                         intr = line & 0x1f;
 300                 else if (line >= 0x80 && line <= 0x8f)
 301                         intr = line;
 302                 else {
 303                         printf("footbridge_pci_intr_map: out of range interrupt"
 304                                "pin %d line %d (%#x)\n", pin, line, line);
 305                         *ihp = -1;
 306                         return(1);
 307                 }
 308                 break;
 309         }
 310
 311 #ifdef PCI_DEBUG
 312         printf("pin %d, line %d mapped to int %d\n", pin, line, intr);
 313 #endif
 314
 315         *ihp = intr;
 316         return(0);
 317 }
 318
 319 const char *
 320 footbridge_pci_intr_string(void *pcv, pci_intr_handle_t ih)
 321 {
 322         static char irqstr[7+2+3]; /* "isairq dd" + NULL + sanity */
 323
 324 #ifdef PCI_DEBUG
 325         printf("footbridge_pci_intr_string(pcv=%p, ih=0x%lx)\n", pcv, ih);
 326 #endif
 327         if (ih == 0)
 328                 panic("footbridge_pci_intr_string: bogus handle 0x%lx", ih);
 329
 330 #if NISA > 0
 331         if (ih >= 0x80 && ih <= 0x8f) {
 332                 sprintf(irqstr, "isairq %ld", (ih & 0x0f));
 333                 return(irqstr);
 334         }
 335 #endif
 336         sprintf(irqstr, "irq %ld", ih);
 337         return(irqstr);
 338 }
 339
 340 void *
 341 footbridge_pci_intr_establish(pcv, ih, level, func, arg)
 342         void *pcv;
 343         pci_intr_handle_t ih;
 344         int level, (*func)(void *);
 345         void *arg;
 346 {
 347         void *intr;
 348         int length;
 349         char *string;
 350
 351 #ifdef PCI_DEBUG
 352         printf("footbridge_pci_intr_establish(pcv=%p, ih=0x%lx, level=%d, func=%p, arg=%p)\n",
 353             pcv, ih, level, func, arg);
 354 #endif
 355
 356         /* Copy the interrupt string to a private buffer */
 357         length = strlen(footbridge_pci_intr_string(pcv, ih));
 358         string = malloc(length + 1, M_DEVBUF, M_WAITOK);
 359         strcpy(string, footbridge_pci_intr_string(pcv, ih));
 360 #if NISA > 0
 361         /*
 362          * XXX the IDE driver will attach the interrupts in compat mode and
 363          * thus we need to fail this here.
 364          * This assumes that the interrupts are 14 and 15 which they are for
 365          * IDE compat mode.
 366          * Really the firmware should make this clear in the interrupt reg.
 367          */
 368         if (ih >= 0x80 && ih <= 0x8d) {
 369                 intr = isa_intr_establish(NULL, (ih & 0x0f), IST_EDGE,
 370                     level, func, arg);
 371         } else
 372 #endif
 373         intr = footbridge_intr_claim(ih, level, string, func, arg);
 374
 375         return(intr);
 376 }
 377
 378 void
 379 footbridge_pci_intr_disestablish(void *pcv, void *cookie)
 380 {
 381 #ifdef PCI_DEBUG
 382         printf("footbridge_pci_intr_disestablish(pcv=%p, cookie=0x%p)\n",
 383             pcv, cookie);
 384 #endif
 385         /* XXXX Need to free the string */
 386         footbridge_intr_disestablish(cookie);
 387 }